初版
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huxi
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#include "asm/includes.h"
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#include "system/includes.h"
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#include "app_config.h"
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#define LOG_TAG "[SETUP]"
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#define LOG_ERROR_ENABLE
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#define LOG_DEBUG_ENABLE
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#define LOG_INFO_ENABLE
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#define LOG_CLI_ENABLE
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#include "debug.h"
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extern void sys_timer_init(void);
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extern void tick_timer_init(void);
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extern void exception_irq_handler(void);
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extern int __crc16_mutex_init();
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extern void debug_uart_init();
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extern void boot_power_init();
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extern void perf_counter_init(void);
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/* --------------------------------------------------------------------------*/
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/**
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* @brief 裸机程序入口
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*/
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/* ----------------------------------------------------------------------------*/
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void system_main(void)
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{
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//分支预测
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q32DSP(core_num())->PMU_CON1 &= ~BIT(8);
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wdt_close();
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#if (TCFG_MAX_LIMIT_SYS_CLOCK==MAX_LIMIT_SYS_CLOCK_160M)
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clk_early_init(PLL_REF_XOSC_DIFF, TCFG_CLOCK_OSC_HZ, 240 * MHz);// 240:max clock 160
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#else
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clk_early_init(PLL_REF_XOSC_DIFF, TCFG_CLOCK_OSC_HZ, 192 * MHz);
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#endif
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//heap内存管理，STDIO需要heap
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memory_init();
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//uart init
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debug_uart_init();
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//STDIO init
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log_early_init(1024 * 2);
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//debug info
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printf("%s : %s %s", __FUNCTION__, __DATE__, __TIME__);
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while (1) {
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asm("idle");
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}
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}
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/* --------------------------------------------------------------------------*/
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/**
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* @brief 裸机环境启动，进入无操作系统环境
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*/
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/* ----------------------------------------------------------------------------*/
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#define SYSTEM_SSP_SIZE 512
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u32 system_ssp_stack[SYSTEM_SSP_SIZE];//2Kbyte
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void system_start(void)
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{
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asm("ssp = %0"::"i"(system_ssp_stack + SYSTEM_SSP_SIZE));
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asm("r0 = %0"::"i"(system_main));
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asm("reti = r0");
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asm("rti");
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}
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#if CONFIG_DEBUG_ENABLE || CONFIG_DEBUG_LITE_ENABLE
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#endif
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#if 0
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___interrupt
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void exception_irq_handler(void)
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{
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___trig;
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exception_analyze();
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log_flush();
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while (1);
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}
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#endif
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/*
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* 此函数在cpu0上电后首先被调用,负责初始化cpu内部模块
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*
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* 此函数返回后，操作系统才开始初始化并运行
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*
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*/
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#if 0
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static void early_putchar(char a)
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{
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if (a == '\n') {
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UT2_BUF = '\r';
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__asm_csync();
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while ((UT2_CON & BIT(15)) == 0);
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}
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UT2_BUF = a;
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__asm_csync();
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while ((UT2_CON & BIT(15)) == 0);
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}
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void early_puts(char *s)
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{
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do {
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early_putchar(*s);
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} while (*(++s));
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}
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#endif
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void cpu_assert_debug()
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{
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#if CONFIG_DEBUG_ENABLE
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log_flush();
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local_irq_disable();
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while (1);
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#else
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P3_PCNT_SET0 = 0xac;
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cpu_reset();
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#endif
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}
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extern void sputchar(char c);
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extern void sput_buf(const u8 *buf, int len);
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void sput_u32hex(u32 dat);
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__attribute__((weak))
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void maskrom_init(void)
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{
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return;
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}
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extern u32 FREE_DACHE_WAY;
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extern u32 FREE_IACHE_WAY;
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extern u32 dcache_ram_bss_begin;
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extern u32 dcache_ram_bss_size;
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extern u32 dcache_ram_bss_end;
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extern u32 dcache_ram_data_addr;
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extern u32 dcache_ram_data_begin;
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extern u32 dcache_ram_data_size;
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extern u32 icache_ram_bss_begin;
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extern u32 icache_ram_bss_size;
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extern u32 icache_ram_bss_end;
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extern u32 icache_ram_data_code_addr;
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extern u32 icache_ram_data_code_begin;
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extern u32 icache_ram_data_code_size;
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__attribute__((weak))
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AT(.must_ram_code)
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void cache_ram_init(void)
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{
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#if (TCFG_FREE_ICACHE_WAY || TCFG_FREE_DCACHE_WAY)
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// 用 volatile 避免被优化而导致出错
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volatile u8 dcache_way = 4 - (u32)(&FREE_DACHE_WAY);
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volatile u8 icache_way = 4 - (u32)(&FREE_IACHE_WAY);
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if (dcache_way != 4) {
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/* memset((void *)(0x370000 + 0xF800), 0, 0xFC00 - 0xF800); // 清空 lru */
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DcuInitial();
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// 空出way当ram用
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DcuSetWayNum(dcache_way);
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memset((u8 *)(&dcache_ram_bss_begin), 0, (u32)&dcache_ram_bss_size);
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memcpy((u8 *)&dcache_ram_data_addr, (u8 *)&dcache_ram_data_begin, (u32)&dcache_ram_data_size);
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}
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if (icache_way != 4) {
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IcuFlushinvAll();
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DcuFlushinvAll();
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IcuDisable();
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/* memset((void *)(0x3c0000 + 0xF800), 0, 0xFC00 - 0xF800); // 清空 lru */
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IcuInitial();
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// 空出way当ram用
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IcuSetWayNum(icache_way);
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memset((u8 *)(&icache_ram_bss_begin), 0, (u32)&icache_ram_bss_size);
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memcpy((u8 *)&icache_ram_data_code_addr, (u8 *)&icache_ram_data_code_begin, (u32)&icache_ram_data_code_size);
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}
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#endif
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}
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AT(.must_ram_code)
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void icache_way_switch(u8 num)
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{
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local_irq_disable();
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IcuFlushinvAll();
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IcuDisable();
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IcuInitial();
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IcuSetWayNum(num);
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IcuEnable();
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local_irq_enable();
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}
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#if (CPU_CORE_NUM > 1)
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void cpu1_setup_arch()
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{
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q32DSP(core_num())->PMU_CON1 &= ~BIT(8); //open bpu
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request_irq(IRQ_EXCEPTION_IDX, 7, exception_irq_handler, 1);
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//用于控制其他核进入停止状态。
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extern void cpu_suspend_handle(void);
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request_irq(IRQ_SOFT0_IDX, 7, cpu_suspend_handle, 0);
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request_irq(IRQ_SOFT1_IDX, 7, cpu_suspend_handle, 1);
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irq_unmask_set(IRQ_SOFT0_IDX, 0, 0); //设置CPU0软中断0为不可屏蔽中断
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irq_unmask_set(IRQ_SOFT1_IDX, 0, 1); //设置CPU1软中断1为不可屏蔽中断
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debug_init();
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}
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void cpu1_main()
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{
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extern void cpu1_run_notify(void);
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cpu1_run_notify();
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interrupt_init();
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q32DSP(core_num())->PMU_CON1 &= ~BIT(8); //分支预测
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cpu1_setup_arch();
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os_start();
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log_e("os err \r\n") ;
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while (1) {
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__asm__ volatile("idle");
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}
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}
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#else
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void cpu1_main()
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{
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}
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#endif /* #if (CPU_CORE_NUM > 1) */
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//==================================================//
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/* extern void gpio_longpress_pin0_reset_config(u32 pin, u32 level, u32 time); */
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void memory_init(void);
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__attribute__((weak))
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void app_main()
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{
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while (1) {
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asm("idle");
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}
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}
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#define IIO_DEBUG_TOGGLE(i,x) {JL_PORT##i->DIR &= ~BIT(x), JL_PORT##i->OUT ^= BIT(x);}
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void io_toggle(void)
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{
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while (1) {
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IIO_DEBUG_TOGGLE(A, 6);
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IIO_DEBUG_TOGGLE(A, 6);
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}
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}
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// 读取示例
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int get_clk_trim_val(void)
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{
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int ret = 0;
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u32 trim_val = 0;
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ret = sdfile_early_init();
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if (ret) {
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printf("sdfile_early_init ret %d\n", ret);
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}
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ret = syscfg_tools_early_init();
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if (ret) {
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printf("syscfg_tools_early_init ret %d\n", ret);
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}
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// ID号必需满足 CFG_STORE_VM_ONLY_BEGIN < id < CFG_STORE_VM_ONLY_END
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ret = syscfg_early_read(53, &trim_val, sizeof(trim_val));
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printf("trim read ret %d, val 0x%x\n", ret, trim_val);
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return ret;
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}
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// 读取示例
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int set_clk_trim_val(u32 trim_val)
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{
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// !!! 必须要注意, trim值只能写一次, 即只有读取trim失败, 重新trim完后再写到vm; 如果是读取trim值成功了,则不能再次trim并写vm(需要擦除vm后才可再次写)
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// ID号必需满足 CFG_STORE_VM_ONLY_BEGIN < id < CFG_STORE_VM_ONLY_END
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int ret = syscfg_write(53, &trim_val, sizeof(trim_val));
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printf("clk trim val set ret %d\n", ret);
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return 0;
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}
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void setup_arch(void)
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{
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boot_power_init();
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//system_start();
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//关闭所有timer的ie使能
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bit_clr_ie(IRQ_TIME0_IDX);
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bit_clr_ie(IRQ_TIME1_IDX);
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bit_clr_ie(IRQ_TIME2_IDX);
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bit_clr_ie(IRQ_TIME3_IDX);
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/* gpio_longpress_pin0_reset_config(IO_PORTB_01, 0, 0); */
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memory_init();
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#if CONFIG_DEBUG_ENABLE || CONFIG_DEBUG_LITE_ENABLE
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debug_uart_init();
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#if CONFIG_DEBUG_ENABLE
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log_early_init(1024 * 2);
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#endif
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#endif
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wdt_init(WDT_APP_INIT_TIME);
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/* wdt_close(); */
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q32DSP(core_num())->PMU_CON1 &= ~BIT(8); //分支预测
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efuse_init();
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/* clk_voltage_init(TCFG_CLOCK_MODE, SYSVDD_VOL_SEL_126V); */
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/* xosc_hcs_trim(); */
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debug_init();
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sdfile_init();
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syscfg_tools_init();
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/* clk_early_init(PLL_REF_XOSC_DIFF, TCFG_CLOCK_OSC_HZ, 480 * MHz); */
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clk_early_init(PLL_REF_XOSC_DIFF, TCFG_CLOCK_OSC_HZ, 576 * MHz);
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#if 0
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//临时添加：by IC wangjie
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SFR(JL_LSBCLK->PRP_CON1, 0, 3, 1);
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SFR(JL_LSBCLK->PRP_CON1, 26, 1, 1);
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// bt clk config by IC luokaijie
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SFR(JL_LSBCLK->PRP_CON2, 0, 2, 1);
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SFR(JL_LSBCLK->PRP_CON2, 2, 2, 1);
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SFR(JL_LSBCLK->PRP_CON2, 4, 2, 1);
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SFR(JL_LSBCLK->PRP_CON2, 8, 1, 1);
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asm("csync");
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#endif
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perf_counter_init();
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os_init();
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tick_timer_init();
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sys_timer_init();
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log_i("\n~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~");
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log_i(" setup_arch %s %s", __DATE__, __TIME__);
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log_i("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");
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power_early_flowing();
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clock_dump();
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#if 0
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void mvbg_current_trim(); //pmu used
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mvbg_current_trim();
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void audio_vbg_current_trim(); //audio used
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audio_vbg_current_trim();
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#endif
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//Register debugger interrupt
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request_irq(0, 2, exception_irq_handler, 0);
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request_irq(1, 2, exception_irq_handler, 0);
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#ifdef CONFIG_CODE_MOVABLE_ENABLE
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code_movable_init();
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#endif
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__crc16_mutex_init();
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app_main();
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}
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