初版
This commit is contained in:
huxi
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#ifndef __CLOCK_H__
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#define __CLOCK_H__
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#include "asm/clock_hal.h"
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#include "gpcnt_trim.h"
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#define KHz_UNIT (1000L)
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#define MHz (1000000L)
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enum pll_ref_source : u8 {
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PLL_REF_XOSC, //外部晶振，单端模式
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PLL_REF_XOSC_DIFF, //外部晶振，差分模式
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PLL_REF_LRC,
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PLL_REF_HRC,
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PLL_REF_RTC_OSC,
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PLL_REF_XCLK,
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PLL_REF_STD24M,
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};
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extern const int clock_sys_src_use_lrc_hw;
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///VAD时钟源
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#define VAD_CLOCK_USE_CLOSE 0 //VAD关闭
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#define VAD_CLOCK_USE_BTOSC 1 //DVAD、ANALOG使用BTOSC
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#define VAD_CLOCK_USE_RC_AND_BTOSC 2 //DVAD使用RC、BTOSC直连ANALOG
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#define VAD_CLOCK_USE_PMU_STD12M 3 //DVAD使用BTOSC通过PMU配置的STD12M
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#define VAD_CLOCK_USE_LRC 4 //DVAD使用LRC
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//ANC时钟源
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#define ANC_CLOCK_USE_CLOSE 0 //ANC关闭，无需保持相关时钟
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#define ANC_CLOCK_USE_BTOSC 1 //ANC使用BTOSCX2时钟
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#define ANC_CLOCK_USE_PLL 2 //ANC使用PLL时钟
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#define SYS_24M (24 * MHz)
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#define SYS_48M (48 * MHz)
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#define SYS_60M (60 * MHz)
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#define SYS_64M (64 * MHz)
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#define SYS_96M (96 * MHz)
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#define SYS_128M (128 * MHz)
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#define SYS_160M (160 * MHz)
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#define SPI0_MAX_CLK (12 * MHz)
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void clock_dump(void);
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void clock_core_voltage_dump();
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//返回芯片支持的最高时钟频率
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u32 clk_get_max_frequency();
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int clk_early_init(enum pll_ref_source pll_ref, u32 ref_frequency, u32 pll_frequency);
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/**
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* @brief clk_set 设置对应name时钟节点的时钟频率，实际频率会大于等于配置频率
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*
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* @param name
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* @param frequency 单位为Hz
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*
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* @return 小于0，标识对应时钟节点频率设置失败,整数为实际频率,
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*/
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int clk_set_api(const char *name, u32 frequency);
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/**
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* @brief clk_get 获取对应name的时钟节点时钟频率
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*
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* @param name
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*
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* @return 返回频率，单位为Hz
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*/
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u32 clk_get(const char *name);
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/**
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* @brief clock_set_sfc_max_freq
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* 使用前需要保证所使用的flash支持4bit 100Mhz 模式
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*
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* @param dual_max_freq for cmd 3BH BBH
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* @param quad_max_freq for cmd 6BH EBH
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*/
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void clk_set_sfc_max_freq(u32 dual_max_freq, u32 quad_max_freq);
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enum clk_mode {
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CLOCK_MODE_ADAPTIVE = 0,
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CLOCK_MODE_USR,
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};
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/* ***************************************************************************/
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/**
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* \Brief : 频率电压适配模式接口，支持动态配置频率电压为自适应或用户设置
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*
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* \Param : mode : CLOCK_MODE_ADAPTIVE 频率电压自适应使能 / CLOCK_MODE_USR 频率电压用户控制
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* \Param : sys_dvdd: 用户设置值
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*/
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/* *****************************************************************************/
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void clk_voltage_init(u8 mode, u8 sys_dvdd);
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void clk_voltage_mode(u8 mode, u8 sys_dvdd);
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/**
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* @brief clk_set_lowest_voltage 设置dvdd工作的最低 工作电压
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*
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* @param dvdd_lev mic 工作时候 建议 SYSVDD_VOL_SEL_105V，关闭的时候设置为 SYSVDD_VOL_SEL_084V
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*/
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void clk_set_lowest_voltage(u32 dvdd_lev);
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/*
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* system enter critical and exit critical handle
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* */
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struct clock_critical_handler {
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void (*enter)();
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void (*exit)();
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};
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#define CLOCK_CRITICAL_HANDLE_REG(name, enter, exit) \
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const struct clock_critical_handler clock_##name \
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SEC_USED(.clock_critical_txt) = {enter, exit};
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extern struct clock_critical_handler clock_critical_handler_begin[];
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extern struct clock_critical_handler clock_critical_handler_end[];
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#define list_for_each_loop_clock_critical(h) \
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for (h=clock_critical_handler_begin; h<clock_critical_handler_end; h++)
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#ifdef CLK_TREE_MODE
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extern struct clock_critical_handler hsb_critical_handler_begin[];
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extern struct clock_critical_handler hsb_critical_handler_end[];
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#define HSB_CRITICAL_HANDLE_REG(name, enter, exit) \
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const struct clock_critical_handler hsb_##name \
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SEC_USED(.hsb_critical_txt) = {enter, exit};
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extern struct clock_critical_handler hsb_critical_handler_begin[];
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extern struct clock_critical_handler hsb_critical_handler_end[];
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#define list_for_each_loop_hsb_critical(h) \
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for (h=hsb_critical_handler_begin; h<hsb_critical_handler_end; h++)
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#define LSB_CRITICAL_HANDLE_REG(name, enter, exit) \
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const struct clock_critical_handler lsb_##name \
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SEC_USED(.lsb_critical_txt) = {enter, exit};
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extern struct clock_critical_handler lsb_critical_handler_begin[];
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extern struct clock_critical_handler lsb_critical_handler_end[];
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#define list_for_each_loop_lsb_critical(h) \
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for (h=lsb_critical_handler_begin; h<lsb_critical_handler_end; h++)
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#else
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#define HSB_CRITICAL_HANDLE_REG CLOCK_CRITICAL_HANDLE_REG
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#define list_for_each_loop_hsb_critical list_for_each_loop_clock_critical
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#define LSB_CRITICAL_HANDLE_REG CLOCK_CRITICAL_HANDLE_REG
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#define list_for_each_loop_lsb_critical list_for_each_loop_clock_critical
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#endif
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// 阻塞式延时
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void delay_nops(u32 nops);
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//delay function does not guarantee accuracy. The application may sleep longer than msecs under heavy load conditions.
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void udelay(u32 us);
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void mdelay(u32 ms);
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/**
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* @brief 不需要输出时钟时需调clk_out_close关闭,否则一直占用och
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* @param gpio:参见枚举,固定io带入固定io; 有chx的可以选择任意io; 都有选择任意io
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* @param clk_src:详见枚举,备注多通道的可同时输出多路clk
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* @param div:详见枚举各通道div注释
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* return: 0:error(通道被占用,无法输出)
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*/
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int clk_out(u32 gpio, enum CLK_OUT_SOURCE clk_src, u32 div);
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/**
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* @brief clk_out_close将关闭所有正在输出的clk_src时钟
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* @param gpio:不检查gpio,当clk_src正确直接配置高祖
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* @param clk_src:详见枚举,关闭该时钟输出
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*return: 0:error(时钟未曾输出)*/
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int clk_out_close(u32 gpio, enum CLK_OUT_SOURCE clk_src);
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/**
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* @brief 设置电压频率电压表最大挡位
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*/
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void clock_voltage_rising_step_max();
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/**
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* @brief 设置电压频率电压表最小挡位
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*/
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void clock_voltage_falling_step_min();
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void update_vdd_table(u8 val);
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#endif /*CLOCK_H*/
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,41 @@
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#ifndef __Q32DSP_CACHE__
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#define __Q32DSP_CACHE__
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#include "icache.h"
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#include "dcache.h"
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//#include "generic/typedef.h"
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typedef struct __cache_info {
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unsigned int cache_type; // 0:icache; 1:dcache
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unsigned int cpu_id;
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unsigned int efficiency;
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} CACHE_INFO;
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#if 0 // 供外界使用的接口,已经在 icache.h 和 rocache.h 中定义
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// void flush_dcache(void *ptr, int len);
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// void flushinv_dcache(void *ptr, int len);
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void IcuEnable(void);
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void DcuEnable(void);
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void IcuWaitIdle(void);
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void DcuWaitIdle(void);
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void IcuDisable(void);
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void DcuDisable(void);
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void IcuFlushinvAll(void);
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void IcuUnlockAll(void);
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void IcuFlushinvRegion(int *beg, int len);
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void IcuUnlockRegion(int *beg, int len);
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void IcuLockRegion(int *beg, int len);
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void IcuPfetchRegion(int *beg, int len);
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void DcuFlushinvAll(void);
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void DcuFlushinvRegion(int *beg, int len);
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void DcuPfetchRegion(int *beg, int len);
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void IcuInitial(void);
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void DcuInitial(void);
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#endif
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#define WAIT_DCACHE_IDLE do {DcuWaitIdle();} while(0);
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#define WAIT_ICACHE_IDLE do {IcuWaitIdle();} while(0);
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//#define WAIT_DCACHE_IDLE do{asm volatile("csync"); while(!(JL_DCU->CON & BIT(31)));} while(0);
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#endif
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@@ -0,0 +1,169 @@
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#ifndef _CHARGE_H_
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#define _CHARGE_H_
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#include "typedef.h"
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#include "device.h"
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/*------充满电电压选择 4.044V-4.634V-------*/
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//4.2V电池配置0~15
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#define CHARGE_FULL_V_4040_4P2V 0
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#define CHARGE_FULL_V_4060_4P2V 1
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#define CHARGE_FULL_V_4080_4P2V 2
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#define CHARGE_FULL_V_4100_4P2V 3
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#define CHARGE_FULL_V_4120_4P2V 4
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#define CHARGE_FULL_V_4140_4P2V 5
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#define CHARGE_FULL_V_4160_4P2V 6
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#define CHARGE_FULL_V_4180_4P2V 7
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#define CHARGE_FULL_V_4200_4P2V 8
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#define CHARGE_FULL_V_4220_4P2V 9
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#define CHARGE_FULL_V_4240_4P2V 10
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#define CHARGE_FULL_V_4260_4P2V 11
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#define CHARGE_FULL_V_4280_4P2V 12
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#define CHARGE_FULL_V_4300_4P2V 13
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#define CHARGE_FULL_V_4320_4P2V 14
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#define CHARGE_FULL_V_4340_4P2V 15
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//4.4V电池配置16~31
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#define CHARGE_FULL_V_4240_4P4V 16
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#define CHARGE_FULL_V_4260_4P4V 17
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#define CHARGE_FULL_V_4280_4P4V 18
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#define CHARGE_FULL_V_4300_4P4V 19
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#define CHARGE_FULL_V_4320_4P4V 20
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#define CHARGE_FULL_V_4340_4P4V 21
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#define CHARGE_FULL_V_4360_4P4V 22
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#define CHARGE_FULL_V_4380_4P4V 23
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#define CHARGE_FULL_V_4400_4P4V 24
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#define CHARGE_FULL_V_4420_4P4V 25
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#define CHARGE_FULL_V_4440_4P4V 26
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#define CHARGE_FULL_V_4460_4P4V 27
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#define CHARGE_FULL_V_4480_4P4V 28
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#define CHARGE_FULL_V_4500_4P4V 29
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#define CHARGE_FULL_V_4520_4P4V 30
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#define CHARGE_FULL_V_4540_4P4V 31
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//4.5V电池配置32-47
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#define CHARGE_FULL_V_4340_4P5V 32
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#define CHARGE_FULL_V_4360_4P5V 33
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#define CHARGE_FULL_V_4380_4P5V 34
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#define CHARGE_FULL_V_4400_4P5V 35
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#define CHARGE_FULL_V_4420_4P5V 36
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#define CHARGE_FULL_V_4440_4P5V 37
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#define CHARGE_FULL_V_4460_4P5V 38
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#define CHARGE_FULL_V_4480_4P5V 39
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#define CHARGE_FULL_V_4500_4P5V 40
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#define CHARGE_FULL_V_4520_4P5V 41
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#define CHARGE_FULL_V_4540_4P5V 42
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#define CHARGE_FULL_V_4560_4P5V 43
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#define CHARGE_FULL_V_4580_4P5V 44
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#define CHARGE_FULL_V_4600_4P5V 45
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#define CHARGE_FULL_V_4620_4P5V 46
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#define CHARGE_FULL_V_4640_4P5V 47
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#define CHARGE_FULL_V_MAX 48
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/*
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充电电流选择
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恒流：40-300mA
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*/
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#define CHARGE_mA_40 0
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#define CHARGE_mA_50 1
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#define CHARGE_mA_60 2
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#define CHARGE_mA_70 3
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#define CHARGE_mA_80 4
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#define CHARGE_mA_100 5
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#define CHARGE_mA_120 6
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#define CHARGE_mA_140 7
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#define CHARGE_mA_160 8
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#define CHARGE_mA_180 9
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#define CHARGE_mA_200 10
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#define CHARGE_mA_220 11
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#define CHARGE_mA_240 12
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#define CHARGE_mA_260 13
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#define CHARGE_mA_280 14
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#define CHARGE_mA_300 15
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#define CHARGE_mA_4 (BIT(4)|CHARGE_mA_40)
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#define CHARGE_mA_5 (BIT(4)|CHARGE_mA_50)
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#define CHARGE_mA_6 (BIT(4)|CHARGE_mA_60)
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#define CHARGE_mA_7 (BIT(4)|CHARGE_mA_70)
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#define CHARGE_mA_8 (BIT(4)|CHARGE_mA_80)
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#define CHARGE_mA_10 (BIT(4)|CHARGE_mA_100)
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#define CHARGE_mA_12 (BIT(4)|CHARGE_mA_120)
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#define CHARGE_mA_14 (BIT(4)|CHARGE_mA_140)
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#define CHARGE_mA_16 (BIT(4)|CHARGE_mA_160)
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#define CHARGE_mA_18 (BIT(4)|CHARGE_mA_180)
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#define CHARGE_mA_20 (BIT(4)|CHARGE_mA_200)
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#define CHARGE_mA_22 (BIT(4)|CHARGE_mA_220)
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#define CHARGE_mA_24 (BIT(4)|CHARGE_mA_240)
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#define CHARGE_mA_26 (BIT(4)|CHARGE_mA_260)
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#define CHARGE_mA_28 (BIT(4)|CHARGE_mA_280)
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#define CHARGE_mA_30 (BIT(4)|CHARGE_mA_300)
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/* 充电口下拉电阻 50k ~ 200k */
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#define CHARGE_PULLDOWN_50K 0
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#define CHARGE_PULLDOWN_100K 1
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#define CHARGE_PULLDOWN_150K 2
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#define CHARGE_PULLDOWN_200K 3
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#define CHARGE_CCVOL_V 300 //涓流充电向恒流充电的转换点
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#define DEVICE_EVENT_FROM_CHARGE (('C' << 24) | ('H' << 16) | ('G' << 8) | '\0')
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struct charge_platform_data {
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u8 charge_en; //内置充电使能
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u8 charge_poweron_en; //开机充电使能
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u8 charge_full_V; //充满电电压大小
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u8 charge_full_mA; //充满电电流大小
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u16 charge_mA; //恒流充电电流大小
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u16 charge_trickle_mA; //涓流充电电流大小
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u8 ldo5v_pulldown_en; //下拉使能位
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u8 ldo5v_pulldown_lvl; //ldo5v的下拉电阻配置项,若充电舱需要更大的负载才能检测到插入时，请将该变量置为对应阻值
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u8 ldo5v_pulldown_keep; //下拉电阻在softoff时是否保持,ldo5v_pulldown_en=1时有效
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u16 ldo5v_off_filter; //ldo5v拔出过滤值，过滤时间 = (filter*2 + 20)ms,ldoin<0.6V且时间大于过滤时间才认为拔出,对于充满直接从5V掉到0V的充电仓，该值必须设置成0，对于充满由5V先掉到0V之后再升压到xV的充电仓，需要根据实际情况设置该值大小
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u16 ldo5v_on_filter; //ldo5v>vbat插入过滤值,电压的过滤时间 = (filter*2)ms
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u16 ldo5v_keep_filter; //1V<ldo5v<vbat维持电压过滤值,过滤时间= (filter*2)ms
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u16 charge_full_filter; //充满过滤值,连续检测充满信号恒为1才认为充满,过滤时间 = (filter*2)ms
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};
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#define CHARGE_PLATFORM_DATA_BEGIN(data) \
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struct charge_platform_data data = {
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#define CHARGE_PLATFORM_DATA_END() \
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};
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enum {
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CHARGE_EVENT_CHARGE_START,
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CHARGE_EVENT_CHARGE_CLOSE,
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CHARGE_EVENT_CHARGE_FULL,
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CHARGE_EVENT_LDO5V_KEEP,
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CHARGE_EVENT_LDO5V_IN,
|
||||
CHARGE_EVENT_LDO5V_OFF,
|
||||
};
|
||||
|
||||
//使用的电池类型
|
||||
enum {
|
||||
BAT_4P2, //4.2V的电池
|
||||
BAT_4P4,
|
||||
BAT_4P5,
|
||||
};
|
||||
|
||||
void set_charge_event_flag(u8 flag);
|
||||
void set_charge_online_flag(u8 flag);
|
||||
void set_charge_event_flag(u8 flag);
|
||||
u8 get_charge_online_flag(void);
|
||||
u8 get_charge_poweron_en(void);
|
||||
void set_charge_poweron_en(u32 onOff);
|
||||
void charge_start(void);
|
||||
void charge_close(void);
|
||||
u8 get_charge_mA_config(void);
|
||||
void set_charge_mA(u8 charge_mA);
|
||||
u8 get_ldo5v_pulldown_en(void);
|
||||
u8 get_ldo5v_pulldown_res(void);
|
||||
u8 get_ldo5v_online_hw(void);
|
||||
u8 get_lvcmp_det(void);
|
||||
void charge_check_and_set_pinr(u8 mode);
|
||||
u16 get_charge_full_value(void);
|
||||
void charge_module_stop(void);
|
||||
void charge_module_restart(void);
|
||||
void ldoin_wakeup_isr(void);
|
||||
int charge_init(const struct charge_platform_data *data);
|
||||
void charge_set_ldo5v_detect_stop(u8 stop);
|
||||
u8 check_pinr_shutdown_enable(void);
|
||||
|
||||
#endif //_CHARGE_H_
|
||||
@@ -0,0 +1,83 @@
|
||||
#ifndef __BR28_CHARGESTORE_H__
|
||||
#define __BR28_CHARGESTORE_H__
|
||||
#include "generic/typedef.h"
|
||||
|
||||
enum {
|
||||
CMD_COMPLETE,
|
||||
CMD_RECVDATA,
|
||||
};
|
||||
|
||||
enum {
|
||||
MODE_RECVDATA,
|
||||
MODE_SENDDATA,
|
||||
};
|
||||
|
||||
enum {
|
||||
TYPE_NORMAL,
|
||||
TYPE_F95,
|
||||
};
|
||||
|
||||
#define PROTOCAL_DEFAULT 0
|
||||
#define PROTOCAL_LOADER 1
|
||||
|
||||
#define LDOIN_BIND_IO IO_PORTP_00
|
||||
|
||||
struct chargestore_platform_data {
|
||||
u32 baudrate;
|
||||
u32 io_port;
|
||||
u8 uart_irq;
|
||||
void (*init)(const struct chargestore_platform_data *);
|
||||
void (*open)(u8 mode);
|
||||
void (*close)(void);
|
||||
void (*write)(u8 *, u8);
|
||||
};
|
||||
|
||||
struct chargestore_data_handler {
|
||||
int (*data_cb)(u8 *buf, u8 len);
|
||||
};
|
||||
|
||||
#define CHARGESTORE_HANDLE_REG(name, data_callback) \
|
||||
const struct chargestore_data_handler chargestore_##name \
|
||||
SEC_USED(.chargestore_callback_txt) = {data_callback};
|
||||
|
||||
extern struct chargestore_data_handler chargestore_handler_begin[];
|
||||
extern struct chargestore_data_handler chargestore_handler_end[];
|
||||
|
||||
#define list_for_each_loop_chargestore(h) \
|
||||
for (h=chargestore_handler_begin; h<chargestore_handler_end; h++)
|
||||
|
||||
|
||||
#define CHARGESTORE_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct chargestore_platform_data data = {
|
||||
|
||||
#define CHARGESTORE_PLATFORM_DATA_END() \
|
||||
.baudrate = 9600, \
|
||||
.init = chargestore_init, \
|
||||
.open = chargestore_open, \
|
||||
.close = chargestore_close, \
|
||||
.write = chargestore_write, \
|
||||
};
|
||||
|
||||
void chargestore_open(u8 mode);
|
||||
void chargestore_close(void);
|
||||
void chargestore_write(u8 *data, u8 len);
|
||||
void chargestore_init(const struct chargestore_platform_data *);
|
||||
void chargestore_set_update_ram(void);
|
||||
u8 chargestore_get_det_level(u8 chip_type);
|
||||
|
||||
//app层使用的接口
|
||||
void chargestore_api_close(void);
|
||||
int chargestore_api_write(u8 *buf, u8 len);
|
||||
void chargestore_api_init(const struct chargestore_platform_data *arg);
|
||||
void chargestore_api_wait_complete(void);
|
||||
void chargestore_api_set_timeout(u16 timeout);
|
||||
void chargestore_api_stop(void);
|
||||
void chargestore_api_restart(void);
|
||||
u8 chargestore_api_crc8(u8 *ptr, u8 len);
|
||||
|
||||
int loader_uart_write(u8 *buf, u8 len);
|
||||
void chargestore_set_protocal(u8 protocal);
|
||||
void chargestore_set_loader_update_callback(void (*loader_callback)(void *p, void *buf, u32 len));
|
||||
void chargestore_ldo5v_fall_deal(void);
|
||||
void chargestore_set_baudrate(u32 baudrate);
|
||||
#endif
|
||||
@@ -0,0 +1,124 @@
|
||||
#ifndef __CLOCK_HAL_H__
|
||||
#define __CLOCK_HAL_H__
|
||||
|
||||
#include "typedef.h"
|
||||
enum CLK_OUT_SOURCE0 {
|
||||
CLK_OUT_SRC0_NULL = 0,
|
||||
CLK_OUT_SRC0_LRC_CLK,
|
||||
CLK_OUT_SRC0_STD_12M,
|
||||
CLK_OUT_SRC0_STD_24M,
|
||||
CLK_OUT_SRC0_STD_48M,
|
||||
CLK_OUT_SRC0_BTOSC_24M,
|
||||
CLK_OUT_SRC0_BTOSC_48M,
|
||||
CLK_OUT_SRC0_HSB_CLK,
|
||||
CLK_OUT_SRC0_LSB_CLK,
|
||||
CLK_OUT_SRC0_PLL_96M,
|
||||
CLK_OUT_SRC0_RC_250K,
|
||||
CLK_OUT_SRC0_RC_16M,
|
||||
CLK_OUT_SRC0_LRC_24M,
|
||||
CLK_OUT_SRC0_ALNK0_CLK,
|
||||
CLK_OUT_SRC0_RF_CKO_CLK,
|
||||
CLK_OUT_SRC0_USB_CLK,
|
||||
};
|
||||
|
||||
enum CLK_OUT_SOURCE1 {
|
||||
CLK_OUT_SRC2_NULL = 0,
|
||||
CLK_OUT_SRC2_SYS_PLL_D3P5 = 4,
|
||||
CLK_OUT_SRC2_SYS_PLL_D2P5,
|
||||
CLK_OUT_SRC2_SYS_PLL_D2P0,
|
||||
CLK_OUT_SRC2_SYS_PLL_D1P5,
|
||||
CLK_OUT_SRC2_SYS_PLL_D1P0,
|
||||
};
|
||||
void clk_out0(u8 gpio, enum CLK_OUT_SOURCE0 clk);
|
||||
void clk_out2(u8 gpio, enum CLK_OUT_SOURCE1 clk, u8 div);
|
||||
//无 clk_out1
|
||||
|
||||
void clk_out0_close(u8 gpio);
|
||||
void clk_out2_close(u8 gpio);
|
||||
|
||||
|
||||
|
||||
enum CLK_OUT_SOURCE {
|
||||
//ch0,ch1. no div
|
||||
CLK_OUT_NULL = 0x0100,
|
||||
CLK_OUT_LRC_CLK,
|
||||
CLK_OUT_STD_12M,
|
||||
CLK_OUT_STD_24M,
|
||||
CLK_OUT_STD_48M,
|
||||
CLK_OUT_BTOSC_24M,
|
||||
CLK_OUT_BTOSC_48M,
|
||||
CLK_OUT_HSB_CLK,
|
||||
CLK_OUT_LSB_CLK,
|
||||
CLK_OUT_PLL_96M,
|
||||
CLK_OUT_RC_250K,
|
||||
CLK_OUT_RC_16M,
|
||||
CLK_OUT_LRC_24M,
|
||||
CLK_OUT_ALNK0_CLK,
|
||||
CLK_OUT_RF_CKO_CLK,
|
||||
CLK_OUT_USB_CLK,
|
||||
|
||||
//ch2. div:0~63(div1~div64)
|
||||
CLK_OUT_NULL_DIV = 0x0400,
|
||||
CLK_OUT_SYS_PLL_D3P5_DIV = 0x0404,
|
||||
CLK_OUT_SYS_PLL_D2P5_DIV,
|
||||
CLK_OUT_SYS_PLL_D2P0_DIV,
|
||||
CLK_OUT_SYS_PLL_D1P5_DIV,
|
||||
CLK_OUT_SYS_PLL_D1P0_DIV,
|
||||
};
|
||||
|
||||
#define CLK_OUT_CH_MASK 0b111
|
||||
#define CLK_OUT_CH0_SEL(clk) SFR(JL_LSBCLK->STD_CON1,0,5,clk)
|
||||
#define CLK_OUT_CH0_GET_CLK() ((JL_LSBCLK->STD_CON1>>0)&0x01f)
|
||||
#define CLK_OUT_CH0_DIV(div) //no div
|
||||
#define CLK_OUT_CH0_EN(en) //no en
|
||||
#define CLK_OUT0_FIXED_IO_EN(en) //no en
|
||||
#define IS_CLK_OUT0_FIXED_IO() (0)//no fix
|
||||
|
||||
#define CLK_OUT_CH1_SEL(clk) SFR(JL_LSBCLK->STD_CON1,5,5,clk)
|
||||
#define CLK_OUT_CH1_GET_CLK() ((JL_LSBCLK->STD_CON1>>5)&0x01f)
|
||||
#define CLK_OUT_CH1_DIV(div) //no div
|
||||
#define CLK_OUT_CH1_EN(en) //no en
|
||||
#define CLK_OUT1_FIXED_IO_EN(en) //no en
|
||||
#define IS_CLK_OUT1_FIXED_IO() (0)//no fix
|
||||
|
||||
#define CLK_OUT_CH2_SEL(clk) SFR(JL_LSBCLK->STD_CON1,10,4,clk)
|
||||
#define CLK_OUT_CH2_GET_CLK() ((JL_LSBCLK->STD_CON1>>10)&0x0f)
|
||||
#define CLK_OUT_CH2_DIV(div) SFR(JL_LSBCLK->STD_CON1,14,6,div)
|
||||
#define CLK_OUT_CH2_EN(en) //no en
|
||||
#define CLK_OUT2_FIXED_IO_EN(en) //no en
|
||||
#define IS_CLK_OUT2_FIXED_IO() (0)//no fix
|
||||
|
||||
#define CLK_OUT_CH3_SEL(clk) //no ch3
|
||||
#define CLK_OUT_CH3_GET_CLK() (0)//no ch3
|
||||
#define CLK_OUT_CH3_DIV(div) //no div
|
||||
#define CLK_OUT_CH3_EN(en) //no en
|
||||
#define CLK_OUT3_FIXED_IO_EN(en) //no en
|
||||
#define IS_CLK_OUT3_FIXED_IO() (0)//no fix
|
||||
|
||||
#define CLK_OUT_CH4_SEL(clk) //no ch4
|
||||
#define CLK_OUT_CH4_GET_CLK() (0)//no ch4
|
||||
#define CLK_OUT_CH4_DIV(div) //no div
|
||||
#define CLK_OUT_CH4_EN(en) //no en
|
||||
#define CLK_OUT4_FIXED_IO_EN(en) //no en
|
||||
#define IS_CLK_OUT4_FIXED_IO() (0)//no fix
|
||||
u32 clk_out_fixed_io_check(u32 gpio);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//for bt
|
||||
void clk_set_osc_cap(u8 sel_l, u8 sel_r);
|
||||
u32 clk_get_osc_cap();
|
||||
|
||||
#define BT_CLOCK_IN(x) //SFR(JL_CLOCK->CLK_CON1, 14, 2, x)
|
||||
//for MACRO - BT_CLOCK_IN
|
||||
enum {
|
||||
BT_CLOCK_IN_PLL48M = 0,
|
||||
BT_CLOCK_IN_HSB,
|
||||
BT_CLOCK_IN_LSB,
|
||||
BT_CLOCK_IN_DISABLE,
|
||||
};
|
||||
|
||||
|
||||
#endif /*CLOCK_HAL_H*/
|
||||
@@ -0,0 +1,278 @@
|
||||
|
||||
#ifndef ASM_CPU_H
|
||||
#define ASM_CPU_H
|
||||
|
||||
|
||||
#include "br35.h"
|
||||
#include "csfr.h"
|
||||
#include "cache.h"
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#if ((!defined __cplusplus) && (!defined BOOL_DEFINE_CONFLICT))
|
||||
typedef unsigned char bool;
|
||||
#endif
|
||||
typedef unsigned char u8, BOOL;
|
||||
typedef char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
typedef unsigned long long u64;
|
||||
typedef u32 FOURCC;
|
||||
typedef long long s64;
|
||||
typedef unsigned long long u64;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define ___trig __asm__ volatile ("trigger")
|
||||
|
||||
|
||||
#ifndef BIG_ENDIAN
|
||||
#define BIG_ENDIAN 0x3021
|
||||
#endif
|
||||
#ifndef LITTLE_ENDIAN
|
||||
#define LITTLE_ENDIAN 0x4576
|
||||
#endif
|
||||
#define CPU_ENDIAN LITTLE_ENDIAN
|
||||
|
||||
|
||||
#define CPU_CORE_NUM 1
|
||||
|
||||
#define CONFIG_SPINLOCK_ENABLE 0
|
||||
|
||||
#define OS_CORE_AFFINITY_ENABLE CONFIG_OS_AFFINITY_ENABLE //app_cfg.mk中定义, Modify Me: 0: 自由分配, 1: 固定核
|
||||
|
||||
extern const int CONFIG_CPU_UNMASK_IRQ_ENABLE;
|
||||
///屏蔽的优先级, < N的优先级不可以响应
|
||||
#define CPU_IRQ_IPMASK_LEVEL 6
|
||||
|
||||
#define CPU_TASK_CLR(a)
|
||||
#define CPU_TASK_SW(a) \
|
||||
do { \
|
||||
q32DSP(a)->ILAT_SET |= BIT(3-a); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define CPU_INT_NESTING 2
|
||||
|
||||
#define CORE_IDLE_TICK_TIMER_PERIOD 4000 //10 ~ 16000 ms
|
||||
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#if CPU_CORE_NUM > 1
|
||||
__attribute__((always_inline))
|
||||
static int current_cpu_id()
|
||||
{
|
||||
unsigned id;
|
||||
asm volatile("%0 = cnum" : "=r"(id) ::);
|
||||
return id ;
|
||||
}
|
||||
|
||||
__attribute__((always_inline))
|
||||
static int core_num(void)
|
||||
{
|
||||
u32 num;
|
||||
asm volatile("%0 = cnum" : "=r"(num) :);
|
||||
return num;
|
||||
}
|
||||
|
||||
#else
|
||||
static inline int current_cpu_id()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int core_num(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int cpu_in_irq()
|
||||
{
|
||||
int flag;
|
||||
__asm__ volatile("%0 = icfg" : "=r"(flag));
|
||||
return flag & 0xff;
|
||||
}
|
||||
|
||||
extern int __cpu_irq_disabled();
|
||||
static inline int cpu_irq_disabled()
|
||||
{
|
||||
int flag;
|
||||
int ret;
|
||||
|
||||
if (CONFIG_CPU_UNMASK_IRQ_ENABLE) {
|
||||
return __cpu_irq_disabled();
|
||||
} else {
|
||||
__asm__ volatile("%0 = icfg" : "=r"(flag));
|
||||
ret = ((flag & 0x300) != 0x300);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static inline int data_sat_s16(int ind)
|
||||
{
|
||||
if (ind > 32767) {
|
||||
ind = 32767;
|
||||
} else if (ind < -32768) {
|
||||
ind = -32768;
|
||||
}
|
||||
return ind;
|
||||
}
|
||||
|
||||
#else
|
||||
static inline int data_sat_s16(int ind)
|
||||
{
|
||||
__asm__ volatile(
|
||||
" %0 = sat16(%0)(s) \t\n"
|
||||
: "=&r"(ind)
|
||||
: "0"(ind)
|
||||
:);
|
||||
return ind;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static inline u32 reverse_u32(u32 data32)
|
||||
{
|
||||
#if 0
|
||||
u8 *dataptr = (u8 *)(&data32);
|
||||
data32 = (((u32)dataptr[0] << 24) | ((u32)dataptr[1] << 16) | ((u32)dataptr[2] << 8) | (u32)dataptr[3]);
|
||||
#else
|
||||
__asm__ volatile("%0 = rev8(%0) \t\n" : "=&r"(data32) : "0"(data32) :);
|
||||
#endif
|
||||
return data32;
|
||||
}
|
||||
|
||||
static inline u32 reverse_u16(u16 data16)
|
||||
{
|
||||
u32 retv;
|
||||
#if 0
|
||||
u8 *dataptr = (u8 *)(&data16);
|
||||
retv = (((u32)dataptr[0] << 8) | ((u32)dataptr[1]));
|
||||
#else
|
||||
retv = ((u32)data16) << 16;
|
||||
__asm__ volatile("%0 = rev8(%0) \t\n" : "=&r"(retv) : "0"(retv) :);
|
||||
#endif
|
||||
return retv;
|
||||
}
|
||||
|
||||
static inline u32 rand32()
|
||||
{
|
||||
return JL_RAND->R64L;
|
||||
}
|
||||
|
||||
#define __asm_sine(s64, precision) \
|
||||
({ \
|
||||
u64 ret; \
|
||||
u8 sel = 0; \
|
||||
__asm__ volatile ("%0 = copex(%1) (%2)" : "=r"(ret) : "r"(s64), "i"(sel)); \
|
||||
ret = ret>>32; \
|
||||
ret;\
|
||||
})
|
||||
|
||||
void p33_soft_reset(void);
|
||||
static inline void cpu_reset(void)
|
||||
{
|
||||
// JL_CLOCK->PWR_CON |= (1 << 4);
|
||||
p33_soft_reset();
|
||||
}
|
||||
|
||||
#define __asm_csync() \
|
||||
do { \
|
||||
asm volatile("csync;"); \
|
||||
} while (0)
|
||||
|
||||
#include "asm/irq.h"
|
||||
#include "generic/printf.h"
|
||||
#include "generic/log.h"
|
||||
|
||||
|
||||
#define arch_atomic_read(v) \
|
||||
({ \
|
||||
__asm_csync(); \
|
||||
(*(volatile int *)&(v)->counter); \
|
||||
})
|
||||
|
||||
static inline void q32DSP_testset(u8 volatile *ptr)
|
||||
{
|
||||
asm volatile(
|
||||
" 1: \n\t "
|
||||
" testset b[%0] \n\t "
|
||||
" ifeq goto 1b \n\t "
|
||||
:
|
||||
: "p"(ptr)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
static inline void q32DSP_testclr(u8 volatile *ptr)
|
||||
{
|
||||
asm volatile(
|
||||
" b[%0] = %1 \n\t "
|
||||
:
|
||||
: "p"(ptr), "r"(0)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
#define arch_spin_lock(lock) \
|
||||
do { \
|
||||
q32DSP_testset(&lock->rwlock);\
|
||||
}while(0)
|
||||
|
||||
#define arch_spin_unlock(lock) \
|
||||
do{ \
|
||||
q32DSP_testclr(&lock->rwlock) ;\
|
||||
}while(0)
|
||||
|
||||
|
||||
|
||||
extern void local_irq_disable();
|
||||
extern void local_irq_enable();
|
||||
|
||||
#define CPU_SR_ALLOC() \
|
||||
// int flags
|
||||
|
||||
#define CPU_CRITICAL_ENTER() \
|
||||
do { \
|
||||
local_irq_disable(); \
|
||||
}while(0)
|
||||
|
||||
|
||||
#define CPU_CRITICAL_EXIT() \
|
||||
do { \
|
||||
local_irq_enable(); \
|
||||
}while(0)
|
||||
|
||||
|
||||
|
||||
extern void cpu_assert_debug();
|
||||
extern const int config_asser;
|
||||
#define ASSERT(a,...) \
|
||||
do { \
|
||||
if(config_asser){\
|
||||
if(!(a)){ \
|
||||
printf("cpu %d file:%s, line:%d",current_cpu_id(), __FILE__, __LINE__); \
|
||||
printf("ASSERT-FAILD: "#a" "__VA_ARGS__); \
|
||||
cpu_assert_debug(); \
|
||||
} \
|
||||
}else {\
|
||||
if(!(a)){ \
|
||||
cpu_reset(); \
|
||||
}\
|
||||
}\
|
||||
}while(0);
|
||||
|
||||
|
||||
|
||||
#endif //__ASSEMBLY__
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,35 @@
|
||||
#ifndef __CPU_CRC16_H__
|
||||
#define __CPU_CRC16_H__
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
|
||||
u16 CRC16(const void *ptr, u32 len);
|
||||
|
||||
/* i_val: CRC校验初值 */
|
||||
u16 CRC16_with_initval(const void *ptr, u32 len, u16 i_val);
|
||||
|
||||
u16 CRC16_with_code(const void *ptr, u32 len, u16 code);
|
||||
|
||||
void spi_crc16_set(u16 crc);
|
||||
u16 spi_crc16_get(void);
|
||||
|
||||
void CrcDecode(void *buf, u16 len);
|
||||
|
||||
u16 get_page_efuse(u32 page, u32 delay_cnt);
|
||||
void init_enc_key(u8 cmd);
|
||||
u32 get_sfc_enc_key(void);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,425 @@
|
||||
//*********************************************************************************//
|
||||
// Module name : csfr.h //
|
||||
// Description : q32DSP core sfr define //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
#ifndef __Q32DSP_CSFR__
|
||||
#define __Q32DSP_CSFR__
|
||||
|
||||
#define __RW volatile // read write
|
||||
#define __RO volatile const // only read
|
||||
#define __WO volatile // only write
|
||||
|
||||
#define __u8 unsigned int // u8 to u32 special for struct
|
||||
#define __u16 unsigned int // u16 to u32 special for struct
|
||||
#define __u32 unsigned int
|
||||
|
||||
#define csfr_base 0xff0000
|
||||
|
||||
//*********************************************************************************
|
||||
//
|
||||
// hcore_sfr
|
||||
//
|
||||
//*********************************************************************************
|
||||
|
||||
//............. 0x0000 - 0x00ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 FTMAX;
|
||||
} JL_CMNG_TypeDef;
|
||||
|
||||
#define JL_CMNG_BASE (csfr_base + map_adr(0x00, 0x00))
|
||||
#define JL_CMNG ((JL_CMNG_TypeDef *)JL_CMNG_BASE)
|
||||
|
||||
//............. 0x0100 - 0x01ff............
|
||||
//typedef struct {
|
||||
// __RW __u32 CON;
|
||||
// __RW __u32 KEY;
|
||||
//} JL_SDTAP_TypeDef;
|
||||
|
||||
//#define JL_SDTAP_BASE (csfr_base + map_adr(0x01, 0x00))
|
||||
//#define JL_SDTAP ((JL_SDTAP_TypeDef *)JL_SDTAP_BASE)
|
||||
|
||||
//............. 0x0200 - 0x02ff............
|
||||
typedef struct {
|
||||
__RW __u32 WREN;
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
__RW __u32 CON3;
|
||||
__RW __u32 MSG0;
|
||||
__RW __u32 MSG1;
|
||||
__RW __u32 MSG2;
|
||||
__RW __u32 MSG3;
|
||||
__RO __u32 ID;
|
||||
} JL_CEMU_TypeDef;
|
||||
|
||||
#define JL_CEMU_BASE (csfr_base + map_adr(0x02, 0x00))
|
||||
#define JL_CEMU ((JL_CEMU_TypeDef *)JL_CEMU_BASE)
|
||||
|
||||
//............. 0x0300 - 0x03ff............
|
||||
|
||||
#define MPU_INV (1<<31)
|
||||
#define MPU_PWEN (1<<16)
|
||||
#define MPU_PREN (1<<8)
|
||||
#define MPU_PEN (MPU_PWEN | MPU_PREN)
|
||||
#define MPU_XEN (1<<2)
|
||||
#define MPU_WEN (1<<1)
|
||||
#define MPU_REN (1<<0)
|
||||
|
||||
#define MPU_IDx_cfg(n, id) (id<<(n*8))
|
||||
#define MPU_IDx_pen(n, pr, pw) ((pr<<(9+n)) | (pw<<(17+n)))
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON[15]; // 0-1 used in br35
|
||||
__RO __u32 REV0;
|
||||
__RW __u32 CID[15]; // 0-1 used in br35
|
||||
__RO __u32 REV1;
|
||||
__RW __u32 BEG[15]; // 0-1 used in br35
|
||||
__RO __u32 REV2;
|
||||
__RW __u32 END[15]; // 0-1 used in br35
|
||||
__RW __u32 WREN;
|
||||
} JL_MPU_TypeDef;
|
||||
|
||||
#define JL_MPU_BASE (csfr_base + map_adr(0x03, 0x00))
|
||||
#define JL_MPU ((JL_MPU_TypeDef *)JL_MPU_BASE)
|
||||
|
||||
//............. 0x0400 - 0x04ff............
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 TLB1_BEG;
|
||||
__RW __u32 TLB1_END;
|
||||
} JL_MMU_TypeDef;
|
||||
|
||||
#define JL_MMU_BASE (csfr_base + map_adr(0x04, 0x00))
|
||||
#define JL_MMU ((JL_MMU_TypeDef *)JL_MMU_BASE)
|
||||
|
||||
typedef struct {
|
||||
short page: 14;
|
||||
short vld: 1;
|
||||
} JL_MMU_TLB1_TypeDef;
|
||||
|
||||
#define JL_MMU_TLB1 ((JL_MMU_TLB1_TypeDef *)(JL_MMU->TLB1_BEG))
|
||||
|
||||
//............. 0x0500 - 0x05ff............
|
||||
//#define JL_TypeDef_L1P JL_TypeDef_q32DSP_ICU
|
||||
#define JL_TypeDef_L1P JL_TypeDef_q32DSP_DCU
|
||||
#define JL_L1P_BASE (csfr_base + map_adr(0x05, 0x00))
|
||||
#define JL_L1P ((JL_TypeDef_L1P *)JL_L1P_BASE)
|
||||
|
||||
//............. 0x0600 - 0x06ff............
|
||||
#define JL_TypeDef_L2I JL_TypeDef_q32DSP_ICU
|
||||
#define JL_L2I_BASE (csfr_base + map_adr(0x06, 0x00))
|
||||
#define JL_L2I ((JL_TypeDef_L2I *)JL_L2I_BASE)
|
||||
|
||||
//............. 0x0700 - 0x07ff............
|
||||
#define JL_TypeDef_L2D JL_TypeDef_q32DSP_DCU
|
||||
#define JL_L2D_BASE (csfr_base + map_adr(0x07, 0x00))
|
||||
#define JL_L2D ((JL_TypeDef_L2D *)JL_L2D_BASE)
|
||||
|
||||
//............. 0x0800 - 0x08ff............
|
||||
typedef struct {
|
||||
__RO __u32 CHIP_ID;
|
||||
__RO __u32 CHIP_VER;
|
||||
} JL_SYSTEM_TypeDef;
|
||||
|
||||
#define JL_SYSTEM_BASE (csfr_base + map_adr(0x08, 0x00))
|
||||
#define JL_SYSTEM ((JL_SYSTEM_TypeDef *)JL_SYSTEM_BASE)
|
||||
|
||||
//............. 0x0900 - 0x09ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 BEG;
|
||||
__RW __u32 END;
|
||||
__RW __u32 DAT_VLD0;
|
||||
__RW __u32 DAT_VLD1;
|
||||
__RW __u32 DAT_VLD2;
|
||||
__RW __u32 DAT_VLD3;
|
||||
__RO __u32 ROM_CRC;
|
||||
__RW __u32 MCFG0_SEL;
|
||||
__RW __u32 MCFG1_SEL;
|
||||
__RW __u32 MCFG0_RF1P;
|
||||
__RW __u32 MCFG0_RF2P;
|
||||
__RW __u32 MCFG0_RM1P;
|
||||
__RW __u32 MCFG0_RM2P;
|
||||
__RW __u32 MCFG0_VROM;
|
||||
__RW __u32 MCFG1_RM1P;
|
||||
__RW __u32 MCFG0_CON[2];
|
||||
__RW __u32 MCFG1_CON[2];
|
||||
} JL_MBIST_TypeDef;
|
||||
|
||||
#define JL_MBIST_BASE (csfr_base + map_adr(0x09, 0x00))
|
||||
#define JL_MBIST ((JL_MBIST_TypeDef *)JL_MBIST_BASE)
|
||||
|
||||
//............. 0x0a00 - 0x0aff............
|
||||
//typedef struct {
|
||||
// __RW __u32 CON;
|
||||
// __RW __u32 CADR;
|
||||
// __RW __u32 ACC0L;
|
||||
// __RW __u32 ACC0H;
|
||||
// __RW __u32 ACC1L;
|
||||
// __RW __u32 ACC1H;
|
||||
// __RW __u32 CONST;
|
||||
// __RW __u32 TEST1;
|
||||
//} JL_FFT_TypeDef;
|
||||
//
|
||||
//#define JL_FFT_BASE (csfr_base + map_adr(0x0a, 0x00))
|
||||
//#define JL_FFT ((JL_FFT_TypeDef *)JL_FFT_BASE)
|
||||
|
||||
//............. 0x0b00 - 0x0bff............
|
||||
//typedef struct {
|
||||
///* 00 */ __RW __u32 CON0;
|
||||
///* 01 */ __RW __u32 LPEN_CON;
|
||||
///* 02 */ __RW __u32 LSEN_CON;
|
||||
///* 03 */ __RO __u32 LS_PND;
|
||||
///* 04 */ __RO __u32 CE_PND;
|
||||
///* 05 */ __RW __u32 LS_PRD_32K;
|
||||
///* 06 */ __RW __u32 CE_PRD_32K;
|
||||
///* 07 */ __RW __u32 LS_PRD_64K;
|
||||
///* 08 */ __RW __u32 CE_PRD_64K;
|
||||
///* 09 */ __RW __u32 LS_PRD_ROM;
|
||||
///* 0a */ __RW __u32 CE_PRD_ROM;
|
||||
//} JL_ATOLP_TypeDef;
|
||||
|
||||
//#define JL_ATOLP_BASE (csfr_base + map_adr(0x0b, 0x00))
|
||||
//#define JL_ATOLP ((JL_ATOLP_TypeDef *)JL_ATOLP_BASE)
|
||||
|
||||
//*********************************************************************************
|
||||
//
|
||||
// q32DSP_sfr
|
||||
//
|
||||
//*********************************************************************************
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP define
|
||||
//---------------------------------------------//
|
||||
|
||||
#define q32DSP_sfr_offset 0x000800
|
||||
#define q32DSP_sfr_base (csfr_base + 0xe000)
|
||||
|
||||
#define q32DSP_cpu_base (q32DSP_sfr_base + 0x0000)
|
||||
#define q32DSP_icu_base (q32DSP_sfr_base + 0x0400)
|
||||
|
||||
#define q32DSP(n) ((JL_TypeDef_q32DSP *)(q32DSP_sfr_base + q32DSP_sfr_offset*n))
|
||||
#define q32DSP_icu(n) ((JL_TypeDef_q32DSP_ICU *)(q32DSP_icu_base + q32DSP_sfr_offset*n))
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP core sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
/* 00 */ __RO __u32 DR00;
|
||||
/* 01 */ __RO __u32 DR01;
|
||||
/* 02 */ __RO __u32 DR02;
|
||||
/* 03 */ __RO __u32 DR03;
|
||||
/* 04 */ __RO __u32 DR04;
|
||||
/* 05 */ __RO __u32 DR05;
|
||||
/* 06 */ __RO __u32 DR06;
|
||||
/* 07 */ __RO __u32 DR07;
|
||||
/* 08 */ __RO __u32 DR08;
|
||||
/* 09 */ __RO __u32 DR09;
|
||||
/* 0a */ __RO __u32 DR10;
|
||||
/* 0b */ __RO __u32 DR11;
|
||||
/* 0c */ __RO __u32 DR12;
|
||||
/* 0d */ __RO __u32 DR13;
|
||||
/* 0e */ __RO __u32 DR14;
|
||||
/* 0f */ __RO __u32 DR15;
|
||||
|
||||
/* 10 */ __RO __u32 RETI;
|
||||
/* 11 */ __RO __u32 RETE;
|
||||
/* 12 */ __RO __u32 RETX;
|
||||
/* 13 */ __RO __u32 RETS;
|
||||
/* 14 */ __RO __u32 SR04;
|
||||
/* 15 */ __RO __u32 PSR;
|
||||
/* 16 */ __RO __u32 CNUM;
|
||||
/* 17 */ __RO __u32 SR07;
|
||||
/* 18 */ __RO __u32 SR08;
|
||||
/* 19 */ __RO __u32 SR09;
|
||||
/* 1a */ __RO __u32 SR10;
|
||||
/* 1b */ __RO __u32 ICFG;
|
||||
/* 1c */ __RO __u32 USP;
|
||||
/* 1d */ __RO __u32 SSP;
|
||||
/* 1e */ __RO __u32 SP;
|
||||
/* 1f */ __RO __u32 PCRS;
|
||||
|
||||
/* 20 */ __RW __u32 BPCON;
|
||||
/* 21 */ __RW __u32 BSP;
|
||||
/* 22 */ __RW __u32 BP0;
|
||||
/* 23 */ __RW __u32 BP1;
|
||||
/* 24 */ __RW __u32 BP2;
|
||||
/* 25 */ __RW __u32 BP3;
|
||||
/* 26 */ __WO __u32 CMD_PAUSE;
|
||||
/* 27 */ __RW __u32 BP4;
|
||||
/* 28 */ __RW __u32 BP5;
|
||||
/* 29 */ __RW __u32 BP6;
|
||||
/* 2a */ __RW __u32 BP7;
|
||||
/* */ __RO __u32 REV2a[0x30 - 0x2a - 1];
|
||||
|
||||
/* 30 */ __RW __u32 PMU_CON0;
|
||||
/* 31 */ __RW __u32 PMU_CON1;
|
||||
/* 32 */ __RO __u32 RST_ADDR;
|
||||
/* */ __RO __u32 REV32[0x3b - 0x32 - 1];
|
||||
/* 3b */ __RW __u8 TTMR_CON;
|
||||
/* 3c */ __RW __u32 TTMR_CNT;
|
||||
/* 3d */ __RW __u32 TTMR_PRD;
|
||||
/* */ __RO __u32 REV3d[0x40 - 0x3d - 1];
|
||||
|
||||
/* 40 */ __RW __u32 ICFG00;
|
||||
/* 41 */ __RW __u32 ICFG01;
|
||||
/* 42 */ __RW __u32 ICFG02;
|
||||
/* 43 */ __RW __u32 ICFG03;
|
||||
/* 44 */ __RW __u32 ICFG04;
|
||||
/* 45 */ __RW __u32 ICFG05;
|
||||
/* 46 */ __RW __u32 ICFG06;
|
||||
/* 47 */ __RW __u32 ICFG07;
|
||||
/* 48 */ __RW __u32 ICFG08;
|
||||
/* 49 */ __RW __u32 ICFG09;
|
||||
/* 4a */ __RW __u32 ICFG10;
|
||||
/* 4b */ __RW __u32 ICFG11;
|
||||
/* 4c */ __RW __u32 ICFG12;
|
||||
/* 4d */ __RW __u32 ICFG13;
|
||||
/* 4e */ __RW __u32 ICFG14;
|
||||
/* 4f */ __RW __u32 ICFG15;
|
||||
|
||||
/* 50 */ __RW __u32 ICFG16;
|
||||
/* 51 */ __RW __u32 ICFG17;
|
||||
/* 52 */ __RW __u32 ICFG18;
|
||||
/* 53 */ __RW __u32 ICFG19;
|
||||
/* 54 */ __RW __u32 ICFG20;
|
||||
/* 55 */ __RW __u32 ICFG21;
|
||||
/* 56 */ __RW __u32 ICFG22;
|
||||
/* 57 */ __RW __u32 ICFG23;
|
||||
/* 58 */ __RW __u32 ICFG24;
|
||||
/* 59 */ __RW __u32 ICFG25;
|
||||
/* 5a */ __RW __u32 ICFG26;
|
||||
/* 5b */ __RW __u32 ICFG27;
|
||||
/* 5c */ __RW __u32 ICFG28;
|
||||
/* 5d */ __RW __u32 ICFG29;
|
||||
/* 5e */ __RW __u32 ICFG30;
|
||||
/* 5f */ __RW __u32 ICFG31;
|
||||
|
||||
/* 60 */ __RO __u32 IPND0;
|
||||
/* 61 */ __RO __u32 IPND1;
|
||||
/* 62 */ __RO __u32 IPND2;
|
||||
/* 63 */ __RO __u32 IPND3;
|
||||
/* 64 */ __RO __u32 IPND4;
|
||||
/* 65 */ __RO __u32 IPND5;
|
||||
/* 66 */ __RO __u32 IPND6;
|
||||
/* 67 */ __RO __u32 IPND7;
|
||||
/* 68 */ __WO __u32 ILAT_SET;
|
||||
/* 69 */ __WO __u32 ILAT_CLR;
|
||||
/* 6a */ __RW __u32 IPMASK;
|
||||
/* 6b */ __RW __u32 GIEMASK;
|
||||
/* 6c */ __RW __u32 IWKUP_NUM;
|
||||
/* */ __RO __u32 REV6c[0x70 - 0x6c - 1];
|
||||
|
||||
/* 70 */ __RW __u32 ETM_CON;
|
||||
/* 71 */ __RO __u32 ETM_PC0;
|
||||
/* 72 */ __RO __u32 ETM_PC1;
|
||||
/* 73 */ __RO __u32 ETM_PC2;
|
||||
/* 74 */ __RO __u32 ETM_PC3;
|
||||
/* 75 */ __RW __u32 WP0_ADRH;
|
||||
/* 76 */ __RW __u32 WP0_ADRL;
|
||||
/* 77 */ __RW __u32 WP0_DATH;
|
||||
/* 78 */ __RW __u32 WP0_DATL;
|
||||
/* 79 */ __RO __u32 WP0_PC;
|
||||
/* 7a */ __RO __u32 WP0_AMSG;
|
||||
/* */ __RO __u32 REV7b[0x80 - 0x7a - 1];
|
||||
|
||||
/* 80 */ __RW __u32 EMU_CON;
|
||||
/* 81 */ __RW __u32 EMU_MSG;
|
||||
/* 82 */ __RW __u32 EMU_SSP_H;
|
||||
/* 83 */ __RW __u32 EMU_SSP_L;
|
||||
/* 84 */ __RW __u32 EMU_USP_H;
|
||||
/* 85 */ __RW __u32 EMU_USP_L;
|
||||
/* 86 */ __RW __u32 LIM_PC0_H;
|
||||
/* 87 */ __RW __u32 LIM_PC0_L;
|
||||
/* 88 */ __RW __u32 LIM_PC1_H;
|
||||
/* 89 */ __RW __u32 LIM_PC1_L;
|
||||
/* 8a */ __RW __u32 LIM_PC2_H;
|
||||
/* 8b */ __RW __u32 LIM_PC2_L;
|
||||
/* */ __RO __u32 REV8b[0x90 - 0x8b - 1];
|
||||
|
||||
/* 90 */ __RW __u32 ESU_CON;
|
||||
/* 91 */ __RO __u32 CNT_CHIT;
|
||||
/* 92 */ __RO __u32 CNT_CMIS;
|
||||
/* 93 */ __RO __u32 CNT_FILL;
|
||||
/* 94 */ __RO __u32 CNT_IHIT;
|
||||
/* 95 */ __RO __u32 CNT_IMIS;
|
||||
/* 96 */ __RO __u32 CNT_RHIT;
|
||||
/* 97 */ __RO __u32 CNT_RMIS;
|
||||
/* 98 */ __RO __u32 CNT_WHIT;
|
||||
/* 99 */ __RO __u32 CNT_WMIS;
|
||||
} JL_TypeDef_q32DSP;
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP icache sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 EMU_CON;
|
||||
__RW __u32 EMU_MSG;
|
||||
__RW __u32 EMU_ID;
|
||||
__RW __u32 CMD_CON;
|
||||
__RW __u32 CMD_BEG;
|
||||
__RW __u32 CMD_END;
|
||||
__RW __u32 CNT_RACK;
|
||||
__RW __u32 CNT_RNAK;
|
||||
__RW __u32 MBIST_SEL;
|
||||
__RW __u32 MCFG0_CON[2];
|
||||
} JL_TypeDef_q32DSP_ICU;
|
||||
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP dcache sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 EMU_CON;
|
||||
__RW __u32 EMU_MSG;
|
||||
__RW __u32 EMU_ID;
|
||||
__RW __u32 CNT_WACK;
|
||||
__RW __u32 CNT_WNAK;
|
||||
__RW __u32 CNT_RACK;
|
||||
__RW __u32 CNT_RNAK;
|
||||
__RW __u32 CMD_CON[4];
|
||||
__RW __u32 CMD_BEG[4];
|
||||
__RW __u32 CMD_END[4];
|
||||
__RW __u32 MBIST_SEL;
|
||||
__RW __u32 MCFG0_CON[2];
|
||||
__RO __u32 REV1[0x20 - 0x16 - 1];
|
||||
__WO __u32 CMO[32];
|
||||
} JL_TypeDef_q32DSP_DCU;
|
||||
|
||||
|
||||
//*********************************************************************************//
|
||||
|
||||
#define TICK_CON (q32DSP(0)->TTMR_CON)
|
||||
#define TICK_PRD (q32DSP(0)->TTMR_PRD)
|
||||
#define TICK_CNT (q32DSP(0)->TTMR_CNT)
|
||||
|
||||
#define SOFT_CLEAR_PENDING (q32DSP(0)->ILAT_CLR)
|
||||
|
||||
#define CPU_MSG (q32DSP(0)->EMU_MSG)
|
||||
#define CPU_CON (q32DSP(0)->EMU_CON)
|
||||
|
||||
#undef __RW
|
||||
#undef __RO
|
||||
#undef __WO
|
||||
|
||||
#undef __u8
|
||||
#undef __u16
|
||||
#undef __u32
|
||||
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,45 @@
|
||||
#ifndef _CTMU_DRV_H_
|
||||
#define _CTMU_DRV_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define CTMU_KEY_CH_MAX 3
|
||||
|
||||
typedef struct _CTMU_KEY_VAR {
|
||||
s32 touch_release_buf[CTMU_KEY_CH_MAX]; //按键释放值滤波器buffer
|
||||
u16 touch_cnt_buf[CTMU_KEY_CH_MAX]; //按键计数值滤波器buffer
|
||||
s16 FLT1CFG1; //滤波器1配置参数1
|
||||
s16 FLT1CFG2; //滤波器1配置参数2, 等于(-RELEASECFG0)<<FLT1CFG0
|
||||
s16 PRESSCFG; //按下判决门限
|
||||
s16 RELEASECFG0; //释放判决门限0
|
||||
s16 RELEASECFG1; //释放判决门限1
|
||||
s8 FLT0CFG; //滤波器0配置参数(0/1/2/3)
|
||||
s8 FLT1CFG0; //滤波器1配置参数0
|
||||
u16 touch_key_state; //按键状态标志，随时可能被中断改写，按键处理程序需要将此标志复制出来再行处理
|
||||
u8 touch_init_cnt[CTMU_KEY_CH_MAX]; //初始化计数器，非0时进行初始化
|
||||
} sCTMU_KEY_VAR;
|
||||
|
||||
|
||||
struct ctmu_key_port {
|
||||
u8 port; //触摸按键IO
|
||||
u8 key_value; //按键返回值
|
||||
};
|
||||
|
||||
struct ctmu_touch_key_platform_data {
|
||||
u8 num; //触摸按键个数
|
||||
s16 press_cfg; //按下判决门限
|
||||
s16 release_cfg0; //释放判决门限0
|
||||
s16 release_cfg1; //释放判决门限1
|
||||
const struct ctmu_key_port *port_list;
|
||||
};
|
||||
|
||||
/* =========== ctmu API ============= */
|
||||
//ctmu 初始化
|
||||
int ctmu_init(void *_data);
|
||||
|
||||
//获取plcnt按键状态
|
||||
u8 get_ctmu_value(void);
|
||||
|
||||
|
||||
#endif /* #ifndef _CTMU_DRV_H_ */
|
||||
|
||||
@@ -0,0 +1,150 @@
|
||||
#ifndef __Q32DSP_DCACHE__
|
||||
#define __Q32DSP_DCACHE__
|
||||
|
||||
//*********************************************************************************//
|
||||
// Module name : dcache.h //
|
||||
// Description : q32DSP dcache control head file //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
#define INCLUDE_DCU_RPT 0
|
||||
#define INCLUDE_DCU_EMU 0
|
||||
#define INCLUDE_L1D 0
|
||||
#define INCLUDE_L2D 0
|
||||
|
||||
//------------------------------------------------------//
|
||||
// peripheral level 1 function
|
||||
//------------------------------------------------------//
|
||||
|
||||
#if (INCLUDE_L1D)
|
||||
|
||||
void L1pEnable(void);
|
||||
void L1pDisable(void);
|
||||
void L1pInitial(void);
|
||||
void L1pSetWayNum(unsigned int way);
|
||||
|
||||
void L1pInvalidAll(void);
|
||||
void L1pInvalidRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L1pFlushAll(void);
|
||||
void L1pFlushRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L1pFlushinvAll(void);
|
||||
void L1pFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L1pPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
|
||||
void L1pReportEnable(void);
|
||||
void L1pReportDisable(void);
|
||||
void L1pReportClear(void);
|
||||
void L1pReportPrintf(void);
|
||||
|
||||
void L1pEmuEnable(void);
|
||||
void L1pEmuDisable(void);
|
||||
void L1pEmuMessage(void);
|
||||
|
||||
void L1pWrThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
void L1pRwThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
void L1pPrivateRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
|
||||
#else
|
||||
|
||||
#define L1pEnable DcuEnable
|
||||
#define L1pDisable DcuDisable
|
||||
#define L1pInitial DcuInitial
|
||||
#define L1pWaitIdle DcuWaitIdle
|
||||
#define L1pSetWayNum DcuSetWayNum
|
||||
|
||||
#define L1pInvalidAll DcuInvalidAll
|
||||
#define L1pInvalidRegion DcuInvalidRegion
|
||||
#define L1pFlushAll DcuFlushAll
|
||||
#define L1pFlushRegion DcuFlushRegion
|
||||
#define L1pFlushinvAll DcuFlushinvAll
|
||||
#define L1pFlushinvRegion DcuFlushinvRegion
|
||||
#define L1pPfetchRegion DcuPfetchRegion
|
||||
|
||||
#define L1pReportEnable DcuReportEnable
|
||||
#define L1pReportDisable DcuReportDisable
|
||||
#define L1pReportClear DcuReportClear
|
||||
#define L1pReportPrintf DcuReportPrintf
|
||||
|
||||
#define L1pEmuEnable DcuEmuEnable
|
||||
#define L1pEmuDisable DcuEmuDisable
|
||||
#define L1pEmuMessage DcuEmuMessage
|
||||
|
||||
#define L1pWrThroughRegion DcuWrThroughRegion
|
||||
#define L1pRwThroughRegion DcuRwThroughRegion
|
||||
#define L1pPrivateRegion DcuPrivateRegion
|
||||
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------//
|
||||
// dcache level 1 function
|
||||
//------------------------------------------------------//
|
||||
|
||||
void DcuEnable(void);
|
||||
void DcuDisable(void);
|
||||
void DcuInitial(void);
|
||||
void DcuWaitIdle(void);
|
||||
void DcuSetWayNum(unsigned int way);
|
||||
|
||||
void DcuInvalidAll(void);
|
||||
void DcuInvalidRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void DcuFlushAll(void);
|
||||
void DcuFlushRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void DcuFlushinvAll(void);
|
||||
void DcuFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void DcuPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
|
||||
void DcuReportEnable(void);
|
||||
void DcuReportDisable(void);
|
||||
void DcuReportClear(void);
|
||||
void DcuReportPrintf(void);
|
||||
|
||||
void DcuEmuEnable(void);
|
||||
void DcuEmuDisable(void);
|
||||
void DcuEmuMessage(void);
|
||||
|
||||
void DcuWrThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
void DcuRwThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
void DcuPrivateRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
|
||||
//------------------------------------------------------//
|
||||
// dcache level 2 function
|
||||
//------------------------------------------------------//
|
||||
|
||||
#if (INCLUDE_L2D)
|
||||
|
||||
void L2dEnable(void);
|
||||
void L2dDisable(void);
|
||||
void L2dInitial(void);
|
||||
void L2dSetWayNum(unsigned int way);
|
||||
|
||||
void L2dInvalidAll(void);
|
||||
void L2dInvalidRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L2dFlushAll(void);
|
||||
void L2dFlushRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L2dFlushinvAll(void);
|
||||
void L2dFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L2dPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
|
||||
void L2dReportEnable(void);
|
||||
void L2dReportDisable(void);
|
||||
void L2dReportClear(void);
|
||||
void L2dReportPrintf(void);
|
||||
|
||||
void L2dEmuEnable(void);
|
||||
void L2dEmuDisable(void);
|
||||
void L2dEmuMessage(void);
|
||||
|
||||
void L2dWrThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
void L2dRwThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
void L2dPrivateRegion(unsigned int num, unsigned int *beg, unsigned int len);
|
||||
|
||||
#endif
|
||||
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,91 @@
|
||||
#ifndef __DEBUG_H__
|
||||
#define __DEBUG_H__
|
||||
|
||||
|
||||
typedef enum etm_detect_mode {
|
||||
CPU_SFR_DETECT_MODE = 1,
|
||||
CPU_RD_BUS_DETECT_MODE,
|
||||
CPU_WR_BUS_DETECT_MODE,
|
||||
CPU_RD_WR_BUS_DETECT_MODE,
|
||||
} ETM_DETECT_MODE;
|
||||
|
||||
|
||||
#define CDBG_IDx(n, id) ((1<<(n+4)) | (id<<(n*8+8)))
|
||||
#define CDBG_INV (1<<7)
|
||||
#define CDBG_PEN (1<<3)
|
||||
#define CDBG_XEN (1<<2)
|
||||
#define CDBG_WEN (1<<1)
|
||||
#define CDBG_REN (1<<0)
|
||||
|
||||
void debug_init();
|
||||
void exception_analyze();
|
||||
|
||||
/********************************** DUBUG SFR *****************************************/
|
||||
|
||||
u32 get_dev_id(char *name);
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief Memory权限保护设置
|
||||
*
|
||||
* @param idx: 保护框索引, 范围: 0 ~ 3, 目前系统默认使用0和3, 用户可用1和2
|
||||
* @param begin: Memory开始地址
|
||||
* @param end: Memory结束地址
|
||||
* @param inv: 0: 保护框内, 1: 保护框外
|
||||
* @param format: "Cxwr0rw1rw2rw3rw", CPU:外设0:外设1:外设2:外设3,
|
||||
* @param ...: 外设ID号索引, 如: DBG_EQ, 见debug.h
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void mpu_set(int idx, u32 begin, u32 end, u32 inv, const char *format, ...);
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief 取消指定框的mpu保护
|
||||
*
|
||||
* @param idx: 保护框索引号
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void mpu_disable_by_index(u8 idx);
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief :取消所有保护框mpu保护
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void mpu_diasble(void);
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief flash PC范围设置为Flash外区域, 调用该接口后调用flash里的函数将触发异常
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void flash_pc_limit_disable();
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief flash PC范围限制恢复为flash代码区域, 调用该接口后可调用flash里的函数
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void flash_pc_limit_enable();
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief CPU内存监测点设置
|
||||
*
|
||||
* @param low_addr: 监测区域起始地址
|
||||
* @param high_addr: 监测区域结束地址
|
||||
* @param low_limit_value: 监测内存下限值
|
||||
* @param high_limit_value: 监测内存上限值
|
||||
* @param mode: 监测模式(ETM_DETECT_MODE)
|
||||
* @param limit_range_out: 0(框内触发中断) 1(框外触发中断)
|
||||
* @param trigger_exception: 0(触发普通中断) 1(触发异常中断)
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void cpu_etm_range_value_limit_detect(void *low_addr, void *high_addr, u32 low_limit_value, u32 high_limit_value, int mode, int limit_range_out, int trigger_exception);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,69 @@
|
||||
#ifndef _DMA_COPY_H_
|
||||
#define _DMA_COPY_H_
|
||||
|
||||
//=============================================================//
|
||||
//使用硬件dma模块搬运数据, 注意:
|
||||
// 1) 注意:本接口是异步接口，不适用dma读
|
||||
// 2) dest和src地址需要4byte对齐
|
||||
// 3)目前支持单模块使用;
|
||||
// 4)典型应用: IMB 乒乓buf搬数到psram;
|
||||
//=============================================================//
|
||||
void dma_memcpy_async(void *dest, void *src, u32 len);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 等待dma_copy完成, 用于同步操作
|
||||
//=============================================================//
|
||||
void dma_memcpy_wait_idle(void);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 注意:本接口是异步接口，用户可以注册完成信息的回调，priv 用户自行定义用户信息，例如信号量激活等
|
||||
//=============================================================//
|
||||
void dma_memcpy_async_with_callback(void *dest, void *src, u32 len, void (*callback)(void *priv), void *priv);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 注意:本接口是同步接口
|
||||
// dest和src地址需要4byte对齐
|
||||
//=============================================================//
|
||||
void dma_memcpy_sync(void *dest, void *src, u32 len);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 中断使用
|
||||
//=============================================================//
|
||||
void dma_memcpy_async_inirq(void *dest, void *src, u32 len);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 注意:sync_wait 配置dma 是否等结束,1:等待dma结束 0：不等结束
|
||||
// 1) dest和src地址需要4byte对齐
|
||||
// 2) 按int的格式进行memset,len = n byte
|
||||
//=============================================================//
|
||||
void dma_memset_int32(void *dest, u32 data, u32 len, int sync_wait);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 注意:sync_wait 配置dma 是否等结束,1:等待dma结束 0：不等结束
|
||||
// 1) dest和src地址需要4byte对齐
|
||||
// 2) 按short的格式进行memset,len = n byte
|
||||
//=============================================================//
|
||||
void dma_memset_short(void *dest, u16 data, u32 len, int sync_wait);
|
||||
|
||||
|
||||
//=============================================================//
|
||||
// 注意:sync_wait 配置dma 是否等结束,1:等待dma结束 0：不等结束
|
||||
// 1) dest和src地址需要4byte对齐
|
||||
// 2) 按u8的格式进行memset,len = n byte
|
||||
//=============================================================//
|
||||
void dma_memset_byte(void *dest, u8 data, u32 len, int sync_wait);
|
||||
|
||||
|
||||
|
||||
//dma_memcpy 锁,杰理内部使用
|
||||
void dma_memcpy_lock();
|
||||
|
||||
void dma_memcpy_unlock();
|
||||
|
||||
#endif /* #ifndef _DMA_COPY_H_ */
|
||||
@@ -0,0 +1,50 @@
|
||||
#ifndef __EFUSE_H__
|
||||
#define __EFUSE_H__
|
||||
|
||||
#define CHIP_VERSION_A 0x00
|
||||
#define CHIP_VERSION_B 0x01
|
||||
#define CHIP_VERSION_C 0x02
|
||||
|
||||
|
||||
u32 get_chip_version();
|
||||
u32 efuse_get_chip_id();
|
||||
u16 get_chip_id();
|
||||
u32 efuse_get_gpadc_vbg_trim();
|
||||
void efuse_init();
|
||||
|
||||
u8 get_en_act();
|
||||
u8 get_vddio_lvd_en();
|
||||
u8 efuse_get_lvd_act();
|
||||
u8 efuse_get_vddio_lvd_lev();
|
||||
u8 efuse_get_vio_act();
|
||||
u8 efuse_get_vddio_lev();
|
||||
u8 efuse_get_mclr_en_dis();
|
||||
u8 efuse_get_xosc_pin_auto();
|
||||
u8 efuse_get_xosc_pin_mode();
|
||||
u8 efuse_get_sfc_fast_boot_dis();
|
||||
u8 efuse_get_pin_reset_en();
|
||||
u8 efuse_get_fast_up();
|
||||
u8 efuse_get_flash_io_select();
|
||||
u8 efuse_get_vbg_act();
|
||||
u8 efuse_get_lvd_bg_trim();
|
||||
u8 efuse_get_mvbg_lev();
|
||||
u8 efuse_get_en_wvbg_lev();
|
||||
|
||||
u8 efuse_get_cp_pass();
|
||||
u8 efuse_get_ft_pass();
|
||||
u8 efuse_get_wvdd_level_trim();
|
||||
u8 efuse_get_vbat_trim_4p2(void);
|
||||
u8 efuse_get_vbat_trim_4p4(void);
|
||||
u8 efuse_get_vbat_trim_4p5(void);
|
||||
u8 efuse_get_charge_cur_trim(void);
|
||||
u8 efuse_get_io_pu_100k(void);
|
||||
u8 efuse_get_sys_pll_ldo(void);
|
||||
u8 efuse_get_flash_type_select(void);//1: NOR 0:NAND
|
||||
|
||||
u8 efuse_get_apa_vb17_vbg();
|
||||
u8 efuse_get_xosc_ldo();
|
||||
u8 efuse_get_xosc_ext_init();
|
||||
u8 efuse_get_lrc24m_caps();
|
||||
u8 efuse_get_lrc24m_rs();
|
||||
|
||||
#endif /*EFUSE_H*/
|
||||
@@ -0,0 +1,101 @@
|
||||
#ifndef __ESPI_H__
|
||||
#define __ESPI_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
|
||||
#define ESPI_PORTA_CS IO_PORTC_06 //pd0
|
||||
#define ESPI_PORTA_CLK IO_PORTC_05 //pd4
|
||||
#define ESPI_PORTA_D0 IO_PORTC_09
|
||||
#define ESPI_PORTA_D1 IO_PORTC_07
|
||||
#define ESPI_PORTA_D2 IO_PORTC_08
|
||||
#define ESPI_PORTA_D3 IO_PORTC_04
|
||||
|
||||
|
||||
#define ESPI_STAGE_DIS 0
|
||||
#define ESPI_1_LINE 1
|
||||
#define ESPI_2_LINE 2
|
||||
#define ESPI_4_LINE 3
|
||||
#define ESPI_8_LINE 4
|
||||
|
||||
#define ESPI_INST_8_BIT 0
|
||||
#define ESPI_INST_16_BIT 1
|
||||
#define ESPI_INST_24_BIT 2
|
||||
#define ESPI_INST_32_BIT 3
|
||||
|
||||
#define ESPI_STR 0
|
||||
#define ESPI_DTR 1
|
||||
|
||||
#define ESPI_WRITE_MODE 0
|
||||
#define ESPI_READ_MODE 1
|
||||
#define ESPI_MMP_MODE 2
|
||||
|
||||
#define ESPI_MMP_CACHE_ADDR2FLASH_ADDR(x) ((x)&0x7ffffff)//64Mb
|
||||
#define ESPI_FLASH_ADDR2MMP_CACHE_ADDR(x) ((x)+0x8000000)//64Mb
|
||||
|
||||
struct espi_io_t {
|
||||
u32 data;
|
||||
u16 len: 4;
|
||||
u16 dtr: 1;
|
||||
u16 line: 3;
|
||||
};
|
||||
|
||||
struct espi_data_t {
|
||||
u16 len: 4;
|
||||
u16 dtr: 1;
|
||||
u16 line: 3;
|
||||
u8 data[8];
|
||||
};
|
||||
|
||||
struct espi_control {
|
||||
u8 width[4];
|
||||
u8 cmd;
|
||||
u8 dummy;
|
||||
};
|
||||
|
||||
struct psram_trim_cfg {
|
||||
u16 adapt;
|
||||
u8 phase;
|
||||
};
|
||||
|
||||
void hw_open_espi_power(u8 power_io, u8 power_level, u16 wait_us, u8 espi_width);
|
||||
void hw_close_espi_power(u8 power_io, u8 power_level, u16 wait_us);
|
||||
|
||||
void espi_cpu_mode_resume(void);
|
||||
void espi_cpu_mode_suspend(void);
|
||||
u8 espi_get_cpu_mode(void);
|
||||
u32 clock_espi_switching(u32 espi_io_freq);
|
||||
void espi_hw_init(u32 espi_io_freq, u8 tshsl, u8 page_size, u8 width);
|
||||
void espi_hw_clk_change(u8 read, u32 clk);
|
||||
void espi_hw_manual_cs_out(u8 sta);
|
||||
void espi_hw_cs_io_cfg(u8 en);
|
||||
void espi_hw_clk_io_cfg(u8 en);
|
||||
void espi_hw_resume_cfg(void);
|
||||
void espi_hw_suspend_cfg(void);
|
||||
void espi_wait_pnd(void);
|
||||
void update_psram_trim_cfg(const struct psram_trim_cfg *cfg);
|
||||
|
||||
void espi_hw_ioctrl(const struct espi_io_t *const instruction,
|
||||
const struct espi_io_t *const address,
|
||||
const struct espi_io_t *const alby,
|
||||
const struct espi_data_t *const tx_data,
|
||||
struct espi_data_t *const rx_data,
|
||||
u32 dummy_cycle);
|
||||
void espi_hw_ioctrl_read(const struct espi_io_t *const inst,
|
||||
const struct espi_io_t *const address,
|
||||
struct espi_data_t *const rx_data,
|
||||
u32 dummy_cycle);
|
||||
void espi_hw_ioctrl_write(const struct espi_io_t *const inst,
|
||||
const struct espi_io_t *const address,
|
||||
const struct espi_data_t *const tx_data,
|
||||
u32 dummy_cycle);
|
||||
|
||||
void espi_hw_send_cmd(const struct espi_io_t *const inst);
|
||||
|
||||
void espi_hw_transfer_data_cfg(struct espi_data_t *const data, u8 dir);//dir:0:tx; 1:rx
|
||||
void espi_hw_transfer_data(u32 *data, u8 len, u8 dir);//dir:0:tx; 1:rx
|
||||
|
||||
void espi_mmp_mode_xn_init(const struct espi_control *r_cmd, const struct espi_control *w_cmd, u8 is4byte_mode);//no continue no write
|
||||
void espi_hw_info_dump();
|
||||
#endif /*ESPI_H*/
|
||||
|
||||
@@ -0,0 +1,186 @@
|
||||
#ifndef __GPADC_HW_H__
|
||||
#define __GPADC_HW_H__
|
||||
//br35
|
||||
#include "gpadc_hw_v4.h"
|
||||
#include "generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
#include "clock.h"
|
||||
|
||||
#define ADC_CH_MASK_TYPE_SEL 0xffff0000
|
||||
#define ADC_CH_MASK_CH_SEL 0x000000ff
|
||||
#define ADC_CH_MASK_PMU_VBG_CH_SEL 0x0000ff00
|
||||
|
||||
#define ADC_CH_TYPE_BT (0x0<<16)
|
||||
#define ADC_CH_TYPE_AUDIO (0x1<<16)
|
||||
#define ADC_CH_TYPE_PMU (0x2<<16)
|
||||
#define ADC_CH_TYPE_LRC200K (0x3<<16)
|
||||
#define ADC_CH_TYPE_LRC24M (0x4<<16)
|
||||
#define ADC_CH_TYPE_SYSPLL (0x5<<16)
|
||||
#define ADC_CH_TYPE_LPCTM (0x6<<16)
|
||||
#define ADC_CH_TYPE_CALSSD (0x7<<16)
|
||||
#define ADC_CH_TYPE_WAT (0x8<<16)
|
||||
#define ADC_CH_TYPE_IO (0x10<<16)
|
||||
#define ADC_CH_TYPE_DIFF (0x11<<16)
|
||||
|
||||
#define ADC_CH_BT_ (ADC_CH_TYPE_BT | 0x0)
|
||||
#define ADC_CH_AUDIO_IREF (ADC_CH_TYPE_AUDIO | 0x0)
|
||||
#define ADC_CH_AUDIO_VCM (ADC_CH_TYPE_AUDIO | 0x1)
|
||||
#define ADC_CH_AUDIO_MICBIAS (ADC_CH_TYPE_AUDIO | 0x2)
|
||||
#define ADC_CH_AUDIO_MICLDO (ADC_CH_TYPE_AUDIO | 0x3)
|
||||
#define ADC_CH_AUDIO_ADCVDD (ADC_CH_TYPE_AUDIO | 0x4)
|
||||
#define ADC_CH_AUDIO_QTLDO (ADC_CH_TYPE_AUDIO | 0x5)
|
||||
#define ADC_CH_AUDIO_QTREF (ADC_CH_TYPE_AUDIO | 0x6)
|
||||
#define ADC_CH_AUDIO_BUFOUT (ADC_CH_TYPE_AUDIO | 0x7)
|
||||
#define ADC_CH_PMU_VBG_WBG04 (ADC_CH_TYPE_PMU | (0x0<<8) | 0x0)//WBG04
|
||||
#define ADC_CH_PMU_VBG_MBG08 (ADC_CH_TYPE_PMU | (0x1<<8) | 0x0)//MBG08
|
||||
#define ADC_CH_PMU_VBG_LVDVBG (ADC_CH_TYPE_PMU | (0x2<<8) | 0x0)//LVDVBG
|
||||
#define ADC_CH_PMU_VBG_MVBG (ADC_CH_TYPE_PMU | (0x3<<8) | 0x0)//MVBG
|
||||
#define ADC_CH_PMU_VSW (ADC_CH_TYPE_PMU | 0x1)
|
||||
#define ADC_CH_PMU_PROGI (ADC_CH_TYPE_PMU | 0x2)
|
||||
#define ADC_CH_PMU_OCP_OUT (ADC_CH_TYPE_PMU | 0x3)
|
||||
#define ADC_CH_PMU_VTEMP (ADC_CH_TYPE_PMU | 0x4)
|
||||
#define ADC_CH_PMU_VPWR_4 (ADC_CH_TYPE_PMU | 0x5) //1/4vpwr
|
||||
#define ADC_CH_PMU_VBAT_4 (ADC_CH_TYPE_PMU | 0x6) //1/4vbat
|
||||
#define ADC_CH_PMU_VBAT_2 (ADC_CH_TYPE_PMU | 0x7)
|
||||
#define ADC_CH_PMU_VP17_DCDC (ADC_CH_TYPE_PMU | 0x8)
|
||||
#define ADC_CH_PMU_PVDD (ADC_CH_TYPE_PMU | 0x9)
|
||||
#define ADC_CH_PMU_DCVDD (ADC_CH_TYPE_PMU | 0xa)
|
||||
#define ADC_CH_PMU_DVDD (ADC_CH_TYPE_PMU | 0xb)
|
||||
#define ADC_CH_PMU_WVDD (ADC_CH_TYPE_PMU | 0xc)
|
||||
#define ADC_CH_PMU_PADC0 (ADC_CH_TYPE_PMU | 0xd)
|
||||
#define ADC_CH_PMU_PVD_PORB_11V (ADC_CH_TYPE_PMU | 0xe)
|
||||
#define ADC_CH_PMU_VIN_4 (ADC_CH_TYPE_PMU | 0xf) //1/4VIN
|
||||
|
||||
#define ADC_CH_LRC200K_ (ADC_CH_TYPE_LRC200K | 0x0)
|
||||
#define ADC_CH_LRC24M_ (ADC_CH_TYPE_LRC24M | 0x0)
|
||||
#define ADC_CH_SYSPLL_ (ADC_CH_TYPE_SYSPLL | 0x0)
|
||||
#define ADC_CH_LPCTM_ (ADC_CH_TYPE_LPCTM | 0x0)
|
||||
#define ADC_CH_CALSSD_ (ADC_CH_TYPE_CALSSD | 0x0)
|
||||
#define ADC_CH_WAT_ (ADC_CH_TYPE_WAT | 0x0)
|
||||
|
||||
#define ADC_CH_IO_PA0 (ADC_CH_TYPE_IO | 0x0)
|
||||
#define ADC_CH_IO_PA1 (ADC_CH_TYPE_IO | 0x1)
|
||||
#define ADC_CH_IO_PA5 (ADC_CH_TYPE_IO | 0x2)
|
||||
#define ADC_CH_IO_PA6 (ADC_CH_TYPE_IO | 0x3)
|
||||
#define ADC_CH_IO_PA10 (ADC_CH_TYPE_IO | 0x4)
|
||||
#define ADC_CH_IO_PA11 (ADC_CH_TYPE_IO | 0x5)
|
||||
#define ADC_CH_IO_PA13 (ADC_CH_TYPE_IO | 0x6)
|
||||
#define ADC_CH_IO_PB0 (ADC_CH_TYPE_IO | 0x7)
|
||||
#define ADC_CH_IO_PB1 (ADC_CH_TYPE_IO | 0x8)
|
||||
#define ADC_CH_IO_PC2 (ADC_CH_TYPE_IO | 0x9)
|
||||
#define ADC_CH_IO_PC3 (ADC_CH_TYPE_IO | 0xa)
|
||||
#define ADC_CH_IO_PC10 (ADC_CH_TYPE_IO | 0xb)
|
||||
#define ADC_CH_IO_PC11 (ADC_CH_TYPE_IO | 0xc)
|
||||
#define ADC_CH_IO_DP (ADC_CH_TYPE_IO | 0xd)
|
||||
#define ADC_CH_IO_DM (ADC_CH_TYPE_IO | 0xe)
|
||||
#define ADC_CH_IO_FSPG (ADC_CH_TYPE_IO | 0xf)
|
||||
|
||||
#define ADC_CH_DIFF_ (ADC_CH_TYPE_DIFF | 0x0)
|
||||
|
||||
enum AD_CH {
|
||||
AD_CH_BT = ADC_CH_BT_,
|
||||
|
||||
AD_CH_AUDIO_IREF = ADC_CH_AUDIO_IREF,
|
||||
AD_CH_AUDIO_VCM = ADC_CH_AUDIO_VCM,
|
||||
AD_CH_AUDIO_MICBIAS = ADC_CH_AUDIO_MICBIAS,
|
||||
AD_CH_AUDIO_MICLDO = ADC_CH_AUDIO_MICLDO,
|
||||
AD_CH_AUDIO_ADCVDD = ADC_CH_AUDIO_ADCVDD,
|
||||
AD_CH_AUDIO_QTLDO = ADC_CH_AUDIO_QTLDO,
|
||||
AD_CH_AUDIO_QTREF = ADC_CH_AUDIO_QTREF,
|
||||
AD_CH_AUDIO_BUFOUT = ADC_CH_AUDIO_BUFOUT,
|
||||
|
||||
AD_CH_PMU_VBG_WBG04 = ADC_CH_PMU_VBG_WBG04, //WBG04
|
||||
AD_CH_PMU_VBG_MBG08 = ADC_CH_PMU_VBG_MBG08, //MBG08
|
||||
AD_CH_PMU_VBG_LVDVBG = ADC_CH_PMU_VBG_LVDVBG, //LVDVBG
|
||||
AD_CH_PMU_VBG_MVBG = ADC_CH_PMU_VBG_MVBG, //MVBG
|
||||
|
||||
AD_CH_PMU_VSW,
|
||||
AD_CH_PMU_PROGI,
|
||||
AD_CH_PMU_OCP_OUT,
|
||||
AD_CH_PMU_VTEMP,
|
||||
AD_CH_PMU_VPWR_4, //1/4vpwr
|
||||
AD_CH_PMU_VBAT_4, //1/4vbat
|
||||
AD_CH_PMU_VBAT_2,
|
||||
AD_CH_PMU_VP17_DCDC,
|
||||
AD_CH_PMU_PVDD,
|
||||
AD_CH_PMU_DCVDD,
|
||||
AD_CH_PMU_DVDD,
|
||||
AD_CH_PMU_WVDD,
|
||||
AD_CH_PMU_PADC0,
|
||||
AD_CH_PMU_PVD_PORB_11V,
|
||||
AD_CH_PMU_VIN_4, //1/4VIN
|
||||
|
||||
AD_CH_LRC200K = ADC_CH_LRC200K_,
|
||||
|
||||
AD_CH_LRC24M = ADC_CH_LRC24M_,
|
||||
|
||||
AD_CH_SYSPLL = ADC_CH_SYSPLL_,
|
||||
|
||||
AD_CH_LPCTM = ADC_CH_LPCTM_,
|
||||
|
||||
AD_CH_CALSSD_ = ADC_CH_CALSSD_,
|
||||
|
||||
AD_CH_WAT = ADC_CH_WAT_,
|
||||
|
||||
AD_CH_IO_PA0 = ADC_CH_IO_PA0,
|
||||
AD_CH_IO_PA1,
|
||||
AD_CH_IO_PA5,
|
||||
AD_CH_IO_PA6,
|
||||
AD_CH_IO_PA10,
|
||||
AD_CH_IO_PA11,
|
||||
AD_CH_IO_PA13,
|
||||
AD_CH_IO_PB0,
|
||||
AD_CH_IO_PB1,
|
||||
AD_CH_IO_PC2,
|
||||
AD_CH_IO_PC3,
|
||||
AD_CH_IO_PC10,
|
||||
AD_CH_IO_PC11,
|
||||
AD_CH_IO_DP,
|
||||
AD_CH_IO_DM,
|
||||
AD_CH_IO_FSPG,
|
||||
|
||||
AD_CH_DIFF = ADC_CH_DIFF_,
|
||||
|
||||
AD_CH_IOVDD = 0xffffffff,
|
||||
};
|
||||
|
||||
#define ADC_VBG_CENTER 800
|
||||
#define ADC_VBG_TRIM_STEP 3
|
||||
#define ADC_VBG_DATA_WIDTH 0
|
||||
|
||||
//防编译报错
|
||||
#define AD_CH_PMU_VBG AD_CH_PMU_VBG_MVBG
|
||||
#define AD_CH_LDOREF AD_CH_PMU_VBG
|
||||
#define AD_CH_PMU_VBAT AD_CH_PMU_VBAT_2
|
||||
#define AD_CH_LPCTMU AD_CH_LPCTM
|
||||
#define AD_CH_PMU_VBAT_DIV 2
|
||||
|
||||
#define AD_CH_IO_PB7 AD_CH_PMU_PADC0
|
||||
|
||||
//gpadc_hw.c 实现
|
||||
void adc_pmu_vbg_enable();
|
||||
void adc_pmu_vbg_disable();
|
||||
void adc_pmu_ch_select(u32 ch);
|
||||
void adc_audio_ch_select(u32 ch_sel);
|
||||
void adc_adjust_div(void);
|
||||
_INLINE_ u8 adc_get_clk_div();
|
||||
|
||||
|
||||
//gpadc_hw_v4.c 实现
|
||||
void adc_close();
|
||||
void adc_sample(enum AD_CH ch, u32 ie, u32 calibrate_en);
|
||||
void adc_wait_enter_idle();
|
||||
u32 adc_wait_pnd();
|
||||
void adc_set_enter_idle();
|
||||
u32 adc_get_res();
|
||||
_INLINE_ u32 adc_idle_query();
|
||||
_INLINE_ void adc_register_clear();
|
||||
void adc_data_res_check();
|
||||
void adc_suspend();
|
||||
void adc_resume();
|
||||
void adc_internal_signal_to_io(enum AD_CH analog_ch, u16 gpio);
|
||||
void adc_delay_init();
|
||||
void adc_delay_set(enum AD_CH ch, u32 trig_delay_us, u32 sample_delay);
|
||||
|
||||
#endif /*GPADC_HW_H*/
|
||||
|
||||
@@ -0,0 +1,594 @@
|
||||
#ifndef __GPIO_HW_H__
|
||||
#define __GPIO_HW_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "asm/power_interface.h"
|
||||
|
||||
|
||||
#define IO_GROUP_NUM 16
|
||||
#define IO_PORTA_00 (IO_GROUP_NUM * 0 + 0)
|
||||
#define IO_PORTA_01 (IO_GROUP_NUM * 0 + 1)
|
||||
#define IO_PORTA_02 (IO_GROUP_NUM * 0 + 2)
|
||||
#define IO_PORTA_03 (IO_GROUP_NUM * 0 + 3)
|
||||
#define IO_PORTA_04 (IO_GROUP_NUM * 0 + 4)
|
||||
#define IO_PORTA_05 (IO_GROUP_NUM * 0 + 5)
|
||||
#define IO_PORTA_06 (IO_GROUP_NUM * 0 + 6)
|
||||
#define IO_PORTA_07 (IO_GROUP_NUM * 0 + 7)
|
||||
#define IO_PORTA_08 (IO_GROUP_NUM * 0 + 8)
|
||||
#define IO_PORTA_09 (IO_GROUP_NUM * 0 + 9)
|
||||
#define IO_PORTA_10 (IO_GROUP_NUM * 0 + 10)
|
||||
#define IO_PORTA_11 (IO_GROUP_NUM * 0 + 11)
|
||||
#define IO_PORTA_12 (IO_GROUP_NUM * 0 + 12)
|
||||
#define IO_PORTA_13 (IO_GROUP_NUM * 0 + 13)
|
||||
#define IO_PORT_PA_MASK 0x3fff
|
||||
|
||||
#define IO_PORTB_00 (IO_GROUP_NUM * 1 + 0)
|
||||
#define IO_PORTB_01 (IO_GROUP_NUM * 1 + 1)
|
||||
#define IO_PORTB_02 (IO_GROUP_NUM * 1 + 2)
|
||||
#define IO_PORTB_03 (IO_GROUP_NUM * 1 + 3)
|
||||
#define IO_PORTB_04 (IO_GROUP_NUM * 1 + 4)
|
||||
#define IO_PORTB_05 (IO_GROUP_NUM * 1 + 5)
|
||||
#define IO_PORTB_06 (IO_GROUP_NUM * 1 + 6)
|
||||
#define IO_PORTB_07 (IO_GROUP_NUM * 1 + 7)
|
||||
#define IO_PORTB_08 (IO_GROUP_NUM * 1 + 8)
|
||||
#define IO_PORT_PB_MASK 0x01ff
|
||||
|
||||
#define IO_PORTC_00 (IO_GROUP_NUM * 2 + 0)
|
||||
#define IO_PORTC_01 (IO_GROUP_NUM * 2 + 1)
|
||||
#define IO_PORTC_02 (IO_GROUP_NUM * 2 + 2)
|
||||
#define IO_PORTC_03 (IO_GROUP_NUM * 2 + 3)
|
||||
#define IO_PORTC_04 (IO_GROUP_NUM * 2 + 4)
|
||||
#define IO_PORTC_05 (IO_GROUP_NUM * 2 + 5)
|
||||
#define IO_PORTC_06 (IO_GROUP_NUM * 2 + 6)
|
||||
#define IO_PORTC_07 (IO_GROUP_NUM * 2 + 7)
|
||||
#define IO_PORTC_08 (IO_GROUP_NUM * 2 + 8)
|
||||
#define IO_PORTC_09 (IO_GROUP_NUM * 2 + 9)
|
||||
#define IO_PORTC_10 (IO_GROUP_NUM * 2 + 10)
|
||||
#define IO_PORTC_11 (IO_GROUP_NUM * 2 + 11)
|
||||
#define IO_PORT_PC_MASK 0x0fff
|
||||
|
||||
#define IO_PORTD_00 (IO_GROUP_NUM * 3 + 0)
|
||||
#define IO_PORTD_01 (IO_GROUP_NUM * 3 + 1)
|
||||
#define IO_PORTD_02 (IO_GROUP_NUM * 3 + 2)
|
||||
#define IO_PORTD_03 (IO_GROUP_NUM * 3 + 3)
|
||||
// #define IO_PORTD_04 (IO_GROUP_NUM * 3 + 4)
|
||||
// #define IO_PORTD_05 (IO_GROUP_NUM * 3 + 5)
|
||||
// #define IO_PORTD_06 (IO_GROUP_NUM * 3 + 6)
|
||||
// #define IO_PORTD_07 (IO_GROUP_NUM * 3 + 7)
|
||||
// #define IO_PORTD_08 (IO_GROUP_NUM * 3 + 8)
|
||||
#define IO_PORTD_09 (IO_GROUP_NUM * 3 + 9)
|
||||
#define IO_PORT_PD_MASK 0x0000
|
||||
|
||||
#define IO_PORTF_00 (IO_GROUP_NUM * 5 + 0)
|
||||
#define IO_PORTF_01 (IO_GROUP_NUM * 5 + 1)
|
||||
#define IO_PORTF_02 (IO_GROUP_NUM * 5 + 2)
|
||||
#define IO_PORTF_03 (IO_GROUP_NUM * 5 + 3)
|
||||
#define IO_PORTF_04 (IO_GROUP_NUM * 5 + 4)
|
||||
#define IO_PORTF_05 (IO_GROUP_NUM * 5 + 5)
|
||||
#define IO_PORT_PF_MASK 0x003f
|
||||
|
||||
#define IO_PORTP_00 (IO_GROUP_NUM * 13 + 0)
|
||||
#define IO_PORT_PP_MASK 0x0001
|
||||
|
||||
#define IO_PORT_LDOIN IO_PORTP_00
|
||||
|
||||
#define IO_MAX_NUM (IO_PORTP_00 + 1)
|
||||
|
||||
#define IO_PORT_DP (IO_GROUP_NUM * 14 + 0)
|
||||
#define IO_PORT_DM (IO_GROUP_NUM * 14 + 1)
|
||||
#define IO_PORT_USB_MASK 0x03
|
||||
#define IS_PORT_USB(x) (x <= IO_PORT_DM)//无usb赋0
|
||||
|
||||
//br35无pr
|
||||
// #define IO_PORT_PR_00 (IO_GROUP_NUM * 15 + 0)//pr固定15
|
||||
// #define IO_PORT_PR_01 (IO_GROUP_NUM * 15 + 1)
|
||||
// #define IO_PORT_PR_MASK 0x03
|
||||
|
||||
#define IO_PORT_MAX (IO_PORT_DM + 1)
|
||||
|
||||
#define P33_IO_OFFSET 0
|
||||
#define IO_CHGFL_DET (IO_PORT_MAX + P33_IO_OFFSET + 0)
|
||||
#define IO_VBGOK_DET (IO_PORT_MAX + P33_IO_OFFSET + 1)
|
||||
#define IO_VBTCH_DET (IO_PORT_MAX + P33_IO_OFFSET + 2)
|
||||
#define IO_LDOIN_DET (IO_PORT_MAX + P33_IO_OFFSET + 3)
|
||||
#define IO_VBATDT_DET (IO_PORT_MAX + P33_IO_OFFSET + 4)
|
||||
|
||||
#define PG_IO_OFFSET 5
|
||||
#define IO_LCD_PG (IO_PORT_MAX + PG_IO_OFFSET + 0)
|
||||
#define IO_MT_PG (IO_PORT_MAX + PG_IO_OFFSET + 1)
|
||||
#define IO_FS_PG2 (IO_PORT_MAX + PG_IO_OFFSET + 2)
|
||||
|
||||
|
||||
|
||||
#define GPIOA (IO_GROUP_NUM * 0)
|
||||
#define GPIOB (IO_GROUP_NUM * 1)
|
||||
#define GPIOC (IO_GROUP_NUM * 2)
|
||||
// #define GPIOD (IO_GROUP_NUM * 3)//br35无PDx_OUT/IN
|
||||
// #define GPIOE (IO_GROUP_NUM * 4)//无
|
||||
#define GPIOF (IO_GROUP_NUM * 5)
|
||||
#define GPIOP (IO_GROUP_NUM * 13)
|
||||
#define GPIOUSB (IO_GROUP_NUM * 14)
|
||||
// #define GPIOR (IO_GROUP_NUM * 15) //br35 no pr
|
||||
#define GPIOP33 (IO_PORT_MAX + P33_IO_OFFSET)
|
||||
|
||||
enum gpio_port {
|
||||
PORTA = 0,
|
||||
PORTB = 1,
|
||||
PORTC = 2,
|
||||
PORTF = 5,
|
||||
PORTP = 13,
|
||||
PORTUSB = 14,
|
||||
// PORTR = 15, //br35 无pr
|
||||
};
|
||||
#define IS_PORT_ALL_PERIPH(PORT) (((PORT) == PORTA) || \
|
||||
((PORT) == PORTB) || \
|
||||
((PORT) == PORTC) || \
|
||||
((PORT) == PORTF) || \
|
||||
((PORT) == PORTP) || \
|
||||
((PORT) == PORTUSB))
|
||||
|
||||
enum port_op_mode {
|
||||
PORT_SET = 1,
|
||||
PORT_AND,
|
||||
PORT_OR,
|
||||
PORT_XOR,
|
||||
};
|
||||
|
||||
struct port_reg {
|
||||
volatile unsigned int in;
|
||||
volatile unsigned int out;
|
||||
volatile unsigned int dir;
|
||||
volatile unsigned int die;
|
||||
volatile unsigned int dieh;
|
||||
volatile unsigned int pu0;
|
||||
volatile unsigned int pu1;
|
||||
volatile unsigned int pd0;
|
||||
volatile unsigned int pd1;
|
||||
volatile unsigned int hd0;
|
||||
volatile unsigned int hd1;
|
||||
volatile unsigned int spl;
|
||||
volatile unsigned int con;
|
||||
volatile unsigned int out_bsr;
|
||||
volatile unsigned int dir_bsr;
|
||||
volatile unsigned int die_bsr;
|
||||
volatile unsigned int dieh_bsr;
|
||||
volatile unsigned int pu0_bsr;
|
||||
volatile unsigned int pu1_bsr;
|
||||
volatile unsigned int pd0_bsr;
|
||||
volatile unsigned int pd1_bsr;
|
||||
volatile unsigned int hd0_bsr;
|
||||
volatile unsigned int hd1_bsr;
|
||||
volatile unsigned int spl_bsr;
|
||||
volatile unsigned int con_bsr;
|
||||
};
|
||||
#define GPIO_PX_PU_REG_NUM 2
|
||||
#define GPIO_PX_PD_REG_NUM 2
|
||||
#define GPIO_PX_HD_REG_NUM 2
|
||||
#define GPIO_PX_DIEH_REG_NUM 1
|
||||
#define GPIO_PX_SPL_REG_NUM 1
|
||||
#define GPIO_PX_BSR_REG_NUM 1
|
||||
#define usb_reg port_reg
|
||||
#define GPIO_USB_PU_REG_NUM 1
|
||||
#define GPIO_USB_PD_REG_NUM 1
|
||||
#define GPIO_USB_HD_REG_NUM 0
|
||||
#define GPIO_USB_DIEH_REG_NUM 1
|
||||
#define GPIO_USB_SPL_REG_NUM 1
|
||||
#define GPIO_USB_BSR_REG_NUM 1
|
||||
//无PR
|
||||
// struct port_pr_reg {
|
||||
// volatile unsigned int in;
|
||||
// volatile unsigned int out;
|
||||
// volatile unsigned int dir;
|
||||
// volatile unsigned int die;
|
||||
// volatile unsigned int pu0;
|
||||
// // volatile unsigned int pu1;
|
||||
// volatile unsigned int pd0;
|
||||
// // volatile unsigned int pd1;
|
||||
// volatile unsigned int hd0;
|
||||
// // volatile unsigned int hd1;
|
||||
// };
|
||||
// #define GPIO_PR_PU_REG_NUM 0
|
||||
// #define GPIO_PR_PD_REG_NUM 0
|
||||
// #define GPIO_PR_HD_REG_NUM 0
|
||||
// #define GPIO_PR_DIEH_REG_NUM 0
|
||||
// #define GPIO_PR_SPL_REG_NUM 0
|
||||
|
||||
#define GPIO_PU_REG_NUM 2 //max_num
|
||||
#define GPIO_PD_REG_NUM 2 //max_num
|
||||
#define GPIO_HD_REG_NUM 2 //max_num
|
||||
|
||||
|
||||
//===================================================//
|
||||
// BR35 Crossbar API
|
||||
//===================================================//
|
||||
enum PFI_TABLE {
|
||||
PFI_GP_ICH0 = ((u32)(&(JL_IMAP->FI_GP_ICH0))),
|
||||
PFI_GP_ICH1 = ((u32)(&(JL_IMAP->FI_GP_ICH1))),
|
||||
PFI_GP_ICH2 = ((u32)(&(JL_IMAP->FI_GP_ICH2))),
|
||||
PFI_GP_ICH3 = ((u32)(&(JL_IMAP->FI_GP_ICH3))),
|
||||
PFI_GP_ICH4 = ((u32)(&(JL_IMAP->FI_GP_ICH4))),
|
||||
PFI_GP_ICH5 = ((u32)(&(JL_IMAP->FI_GP_ICH5))),
|
||||
|
||||
// PFI_SPI0_CLK = ((u32)(&(JL_IMAP->FI_SPI0_CLK))),
|
||||
// PFI_SPI0_DA0 = ((u32)(&(JL_IMAP->FI_SPI0_DA0))),
|
||||
// PFI_SPI0_DA1 = ((u32)(&(JL_IMAP->FI_SPI0_DA1))),
|
||||
// PFI_SPI0_DA2 = ((u32)(&(JL_IMAP->FI_SPI0_DA2))),
|
||||
// PFI_SPI0_DA3 = ((u32)(&(JL_IMAP->FI_SPI0_DA3))),
|
||||
PFI_SPI1_CLK = ((u32)(&(JL_IMAP->FI_SPI1_CLK))),
|
||||
PFI_SPI1_DA0 = ((u32)(&(JL_IMAP->FI_SPI1_DA0))),
|
||||
PFI_SPI1_DA1 = ((u32)(&(JL_IMAP->FI_SPI1_DA1))),
|
||||
PFI_SPI1_DA2 = ((u32)(&(JL_IMAP->FI_SPI1_DA2))),
|
||||
PFI_SPI1_DA3 = ((u32)(&(JL_IMAP->FI_SPI1_DA3))),
|
||||
PFI_SPI2_CLK = ((u32)(&(JL_IMAP->FI_SPI2_CLK))),
|
||||
PFI_SPI2_DA0 = ((u32)(&(JL_IMAP->FI_SPI2_DA0))),
|
||||
PFI_SPI2_DA1 = ((u32)(&(JL_IMAP->FI_SPI2_DA1))),
|
||||
PFI_SPI2_DA2 = ((u32)(&(JL_IMAP->FI_SPI2_DA2))),
|
||||
PFI_SPI2_DA3 = ((u32)(&(JL_IMAP->FI_SPI2_DA3))),
|
||||
|
||||
PFI_SD0_CMD = ((u32)(&(JL_IMAP->FI_SD0_CMD))),
|
||||
PFI_SD0_DA0 = ((u32)(&(JL_IMAP->FI_SD0_DA0))),
|
||||
PFI_SD0_DA1 = ((u32)(&(JL_IMAP->FI_SD0_DA1))),
|
||||
PFI_SD0_DA2 = ((u32)(&(JL_IMAP->FI_SD0_DA2))),
|
||||
PFI_SD0_DA3 = ((u32)(&(JL_IMAP->FI_SD0_DA3))),
|
||||
|
||||
PFI_IIC0_SCL = ((u32)(&(JL_IMAP->FI_IIC0_SCL))),
|
||||
PFI_IIC0_SDA = ((u32)(&(JL_IMAP->FI_IIC0_SDA))),
|
||||
PFI_UART0_RX = ((u32)(&(JL_IMAP->FI_UART0_RX))),
|
||||
PFI_UART1_RX = ((u32)(&(JL_IMAP->FI_UART1_RX))),
|
||||
// PFI_UART1_CTS = ((u32)(&(JL_IMAP->FI_UART1_CTS))),
|
||||
PFI_UART2_RX = ((u32)(&(JL_IMAP->FI_UART2_RX))),
|
||||
|
||||
// PFI_TDM_S_WCK = ((u32)(&(JL_IMAP->FI_TDM_S_WCK))),
|
||||
// PFI_TDM_S_BCK = ((u32)(&(JL_IMAP->FI_TDM_S_BCK))),
|
||||
// PFI_TDM_M_DA = ((u32)(&(JL_IMAP->FI_TDM_M_DA))),
|
||||
// PFI_RDEC0_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC0_DAT0))),
|
||||
// PFI_RDEC0_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC0_DAT1))),
|
||||
// PFI_RDEC1_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC1_DAT0))),
|
||||
// PFI_RDEC1_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC1_DAT1))),
|
||||
// PFI_RDEC2_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC2_DAT0))),
|
||||
// PFI_RDEC2_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC2_DAT1))),
|
||||
// PFI_ALNK0_MCLK = ((u32)(&(JL_IMAP->FI_ALNK0_MCLK))),
|
||||
// PFI_ALNK0_LRCK = ((u32)(&(JL_IMAP->FI_ALNK0_LRCK))),
|
||||
// PFI_ALNK0_SCLK = ((u32)(&(JL_IMAP->FI_ALNK0_SCLK))),
|
||||
// PFI_ALNK0_DAT0 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT0))),
|
||||
// PFI_ALNK0_DAT1 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT1))),
|
||||
// PFI_ALNK0_DAT2 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT2))),
|
||||
// PFI_ALNK0_DAT3 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT3))),
|
||||
// PFI_PLNK_DAT0 = ((u32)(&(JL_IMAP->FI_PLNK_DAT0))),
|
||||
// PFI_PLNK_DAT1 = ((u32)(&(JL_IMAP->FI_PLNK_DAT1))),
|
||||
// PFI_SPDIF_DIA = ((u32)(&(JL_IMAP->FI_SPDIF_DIA))),
|
||||
// PFI_SPDIF_DIB = ((u32)(&(JL_IMAP->FI_SPDIF_DIB))),
|
||||
// PFI_SPDIF_DIC = ((u32)(&(JL_IMAP->FI_SPDIF_DIC))),
|
||||
// PFI_SPDIF_DID = ((u32)(&(JL_IMAP->FI_SPDIF_DID))),
|
||||
// PFI_CAN_RX = ((u32)(&(JL_IMAP->FI_CAN_RX))),
|
||||
PFI_QDEC0_A = ((u32)(&(JL_IMAP->FI_QDEC0_A))),
|
||||
PFI_QDEC0_B = ((u32)(&(JL_IMAP->FI_QDEC0_B))),
|
||||
PFI_CHAIN_IN0 = ((u32)(&(JL_IMAP->FI_CHAIN_IN0))),
|
||||
PFI_CHAIN_IN1 = ((u32)(&(JL_IMAP->FI_CHAIN_IN1))),
|
||||
PFI_CHAIN_IN2 = ((u32)(&(JL_IMAP->FI_CHAIN_IN2))),
|
||||
PFI_CHAIN_IN3 = ((u32)(&(JL_IMAP->FI_CHAIN_IN3))),
|
||||
PFI_CHAIN_RST = ((u32)(&(JL_IMAP->FI_CHAIN_RST))),
|
||||
PFI_TOTAl = ((u32)(&(JL_IMAP->FI_TOTAL))),
|
||||
};
|
||||
|
||||
#define INPUT_GP_ICH_MAX 6
|
||||
#define OUTPUT_GP_OCH_MAX 8
|
||||
|
||||
enum OUTPUT_CH_SIGNAL {
|
||||
OUTPUT_CH_SIGNAL_TIMER0_PWM,//8
|
||||
OUTPUT_CH_SIGNAL_TIMER1_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER2_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER3_PWM,
|
||||
// OUTPUT_CH_SIGNAL_TIMER4_PWM,
|
||||
// OUTPUT_CH_SIGNAL_TIMER5_PWM,
|
||||
OUTPUT_CH_SIGNAL_GP_ICH0,
|
||||
OUTPUT_CH_SIGNAL_GP_ICH1,
|
||||
OUTPUT_CH_SIGNAL_UART1_RTS,
|
||||
OUTPUT_CH_SIGNAL_PLNK_CLK,
|
||||
OUTPUT_CH_SIGNAL_WL_AMPE,
|
||||
OUTPUT_CH_SIGNAL_WL_LNAE,
|
||||
OUTPUT_CH_SIGNAL_WLC_INT_ACTIVE,
|
||||
OUTPUT_CH_SIGNAL_WLC_INT_STATUS,
|
||||
OUTPUT_CH_SIGNAL_WLC_INT_FREQ,
|
||||
OUTPUT_CH_SIGNAL_AUD_DBG_CLKO,
|
||||
OUTPUT_CH_SIGNAL_AUD_DBG_DATO0,
|
||||
OUTPUT_CH_SIGNAL_AUD_DBG_DATO1,
|
||||
OUTPUT_CH_SIGNAL_AUD_DBG_DATO2,
|
||||
OUTPUT_CH_SIGNAL_AUD_DBG_DATO3,
|
||||
OUTPUT_CH_SIGNAL_AUD_DBG_DATO4,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT0,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT1,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT2,
|
||||
OUTPUT_CH_SIGNAL_P33_CLK_DBG,
|
||||
OUTPUT_CH_SIGNAL_P33_SIG_DBG0,
|
||||
OUTPUT_CH_SIGNAL_P33_SIG_DBG1,
|
||||
OUTPUT_CH_SIGNAL_USB_DBG_OUT,
|
||||
OUTPUT_CH_SIGNAL_P11_DBG_OUT,
|
||||
OUTPUT_CH_SIGNAL_WL_DBG_PORTx,//fix wl0~7对应och0~7
|
||||
|
||||
// OUTPUT_CH_SIGNAL_MCPWM0_H,
|
||||
// OUTPUT_CH_SIGNAL_MCPWM0_L,
|
||||
// OUTPUT_CH_SIGNAL_MCPWM1_H,
|
||||
// OUTPUT_CH_SIGNAL_MCPWM1_L,
|
||||
// OUTPUT_CH_SIGNAL_LEDC0_OUT,
|
||||
// OUTPUT_CH_SIGNAL_LEDC1_OUT,
|
||||
};
|
||||
|
||||
enum INPUT_CH_TYPE {
|
||||
INPUT_CH_TYPE_GP_ICH = 0,
|
||||
INPUT_CH_TYPE_TIME2_PWM = 6,
|
||||
INPUT_CH_TYPE_TIME3_PWM,
|
||||
INPUT_CH_TYPE_WL_AMPE,
|
||||
INPUT_CH_TYPE_WL_LNAE,
|
||||
INPUT_CH_TYPE_MAX,
|
||||
};
|
||||
|
||||
enum INPUT_CH_SIGNAL {
|
||||
//ICH_CON0
|
||||
INPUT_CH_SIGNAL_TIMER0_CIN = 0,//5
|
||||
INPUT_CH_SIGNAL_TIMER1_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER2_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER3_CIN,
|
||||
// INPUT_CH_SIGNAL_TIMER4_CIN,
|
||||
// INPUT_CH_SIGNAL_TIMER5_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER0_CAPTURE,
|
||||
INPUT_CH_SIGNAL_TIMER1_CAPTURE,
|
||||
//ICH_CON1
|
||||
INPUT_CH_SIGNAL_TIMER2_CAPTURE,
|
||||
INPUT_CH_SIGNAL_TIMER3_CAPTURE,
|
||||
// INPUT_CH_SIGNAL_TIMER4_CAPTURE,
|
||||
// INPUT_CH_SIGNAL_TIMER5_CAPTURE,
|
||||
INPUT_CH_SIGNAL_MCPWM0_CK,
|
||||
INPUT_CH_SIGNAL_MCPWM1_CK,
|
||||
INPUT_CH_SIGNAL_MCPWM0_FP,
|
||||
INPUT_CH_SIGNAL_MCPWM1_FP,
|
||||
//ICH_CON2
|
||||
INPUT_CH_SIGNAL_UART1_CTS,
|
||||
INPUT_CH_SIGNAL_PLNK_IDAT0,
|
||||
INPUT_CH_SIGNAL_PLNK_IDAT1,
|
||||
INPUT_CH_SIGNAL_CAP,//CAP_MUX_OUT
|
||||
INPUT_CH_SIGNAL_CLK_PIN, //CLK_MUX_IN
|
||||
INPUT_CH_SIGNAL_EXT_CLK, //EXT_CLK_P
|
||||
// INPUT_CH_SIGNAL_IRFLT,
|
||||
//ICH_CON3
|
||||
INPUT_CH_SIGNAL_IMD_TE,
|
||||
INPUT_CH_SIGNAL_WLC_EXT_ACT,
|
||||
INPUT_CH_SIGNAL_AUD_DBG_DATI,
|
||||
INPUT_CH_SIGNAL_SPI1_CS,
|
||||
INPUT_CH_SIGNAL_SPI2_CS,
|
||||
INPUT_CH_SIGNAL_RESERVE0,
|
||||
//ICH_CON4
|
||||
// INPUT_CH_SIGNAL_QDEC_SIN0,
|
||||
// INPUT_CH_SIGNAL_QDEC_SIN1,
|
||||
};
|
||||
enum gpio_function {
|
||||
PORT_FUNC_NULL, //null
|
||||
//uart
|
||||
PORT_FUNC_UART0_TX, //out
|
||||
PORT_FUNC_UART0_RX,//in
|
||||
PORT_FUNC_UART1_TX, //out
|
||||
PORT_FUNC_UART1_RX,//in
|
||||
PORT_FUNC_UART2_TX, //out
|
||||
PORT_FUNC_UART2_RX,//in
|
||||
PORT_FUNC_UART1_RTS,//out
|
||||
PORT_FUNC_UART1_CTS,//in
|
||||
|
||||
//spi
|
||||
// PORT_FUNC_SPI0_CLK,
|
||||
// PORT_FUNC_SPI0_DA0,
|
||||
// PORT_FUNC_SPI0_DA1,
|
||||
// PORT_FUNC_SPI0_DA2,
|
||||
// PORT_FUNC_SPI0_DA3,
|
||||
PORT_FUNC_SPI1_CS,//ich slave
|
||||
PORT_FUNC_SPI1_CLK,
|
||||
PORT_FUNC_SPI1_DA0,
|
||||
PORT_FUNC_SPI1_DA1,
|
||||
PORT_FUNC_SPI1_DA2,
|
||||
PORT_FUNC_SPI1_DA3,
|
||||
PORT_FUNC_SPI2_CS,//ich slave
|
||||
PORT_FUNC_SPI2_CLK,
|
||||
PORT_FUNC_SPI2_DA0,
|
||||
PORT_FUNC_SPI2_DA1,
|
||||
PORT_FUNC_SPI2_DA2,
|
||||
PORT_FUNC_SPI2_DA3,
|
||||
|
||||
//iic
|
||||
PORT_FUNC_IIC_SCL,
|
||||
PORT_FUNC_IIC_SDA,
|
||||
|
||||
//sd
|
||||
PORT_FUNC_SD0_CLK,//out
|
||||
PORT_FUNC_SD0_CMD,
|
||||
PORT_FUNC_SD0_DA0,
|
||||
PORT_FUNC_SD0_DA1,
|
||||
PORT_FUNC_SD0_DA2,
|
||||
PORT_FUNC_SD0_DA3,
|
||||
|
||||
//timer
|
||||
PORT_FUNC_TIMER0_PWM,
|
||||
PORT_FUNC_TIMER1_PWM,
|
||||
PORT_FUNC_TIMER2_PWM,
|
||||
PORT_FUNC_TIMER3_PWM,
|
||||
// PORT_FUNC_TIMER4_PWM,
|
||||
// PORT_FUNC_TIMER5_PWM,
|
||||
PORT_FUNC_TIMER0_CAPTURE,
|
||||
PORT_FUNC_TIMER1_CAPTURE,
|
||||
PORT_FUNC_TIMER2_CAPTURE,
|
||||
PORT_FUNC_TIMER3_CAPTURE,
|
||||
// PORT_FUNC_TIMER4_CAPTURE,
|
||||
// PORT_FUNC_TIMER5_CAPTURE,
|
||||
PORT_FUNC_TIMER0_CIN,
|
||||
PORT_FUNC_TIMER1_CIN,
|
||||
PORT_FUNC_TIMER2_CIN,
|
||||
PORT_FUNC_TIMER3_CIN,
|
||||
|
||||
//mcpwm
|
||||
PORT_FUNC_MCPWM0_H,
|
||||
PORT_FUNC_MCPWM0_L,
|
||||
PORT_FUNC_MCPWM1_H,
|
||||
PORT_FUNC_MCPWM1_L,
|
||||
PORT_FUNC_MCPWM0_FP,
|
||||
PORT_FUNC_MCPWM1_FP,
|
||||
PORT_FUNC_MCPWM0_CK,
|
||||
PORT_FUNC_MCPWM1_CK,
|
||||
|
||||
//clk_out
|
||||
PORT_FUNC_OCH_CLOCK_OUT0,
|
||||
PORT_FUNC_OCH_CLOCK_OUT1,//PORT_FUNC_OCH_RESERVED0,//不连续
|
||||
PORT_FUNC_OCH_CLOCK_OUT2,
|
||||
// PORT_FUNC_OCH_CLOCK_OUT3,
|
||||
|
||||
//other
|
||||
PORT_FUNC_IRFLT_0, //实际只有1个IRFLT
|
||||
PORT_FUNC_IRFLT_1,
|
||||
PORT_FUNC_IRFLT_2,
|
||||
PORT_FUNC_IRFLT_3,
|
||||
|
||||
PORT_FUNC_CLK_PIN,//CLK_MUX_IN
|
||||
// PORT_FUNC_PORT_WKUP,
|
||||
PORT_FUNC_GPADC, //in
|
||||
PORT_FUNC_PWM_LED,
|
||||
|
||||
//plnk
|
||||
// PORT_FUNC_PLNK_SCLK,//out
|
||||
// PORT_FUNC_PLNK_DAT0,//in
|
||||
// PORT_FUNC_PLNK_DAT1,//in
|
||||
|
||||
//ledc
|
||||
// PORT_FUNC_LEDC0_OUT,
|
||||
// PORT_FUNC_LEDC1_OUT,
|
||||
|
||||
//rdec
|
||||
// PORT_FUNC_RDEC0_PORT0,
|
||||
// PORT_FUNC_RDEC0_PORT1,
|
||||
|
||||
//qdec
|
||||
PORT_FUNC_RDEC0_PORTA,
|
||||
PORT_FUNC_RDEC0_PORTB,
|
||||
//chain
|
||||
};
|
||||
/**************************************************/
|
||||
#define __struct(x) (struct x##_reg *)
|
||||
#define _struct(x) __struct(x)
|
||||
#ifdef GPIOA
|
||||
#define __PORTPA ((struct port_reg *)JL_PORTA)
|
||||
#endif
|
||||
#ifdef GPIOB
|
||||
#define __PORTPB ((struct port_reg *)JL_PORTB)
|
||||
#endif
|
||||
#ifdef GPIOC
|
||||
#define __PORTPC ((struct port_reg *)JL_PORTC)
|
||||
#endif
|
||||
#ifdef GPIOD
|
||||
#define __PORTPD ((struct port_reg *)JL_PORTD)
|
||||
#endif
|
||||
#ifdef GPIOE
|
||||
#define __PORTPE ((struct port_reg *)JL_PORTE)
|
||||
#endif
|
||||
#ifdef GPIOF
|
||||
#define __PORTPF ((struct port_reg *)JL_PORTF)
|
||||
#endif
|
||||
#ifdef GPIOG
|
||||
#define __PORTPG ((struct port_reg *)JL_PORTG)
|
||||
#endif
|
||||
#ifdef GPIOH
|
||||
#define __PORTPH ((struct port_reg *)JL_PORTH)
|
||||
#endif
|
||||
#ifdef GPIOP
|
||||
#define __PORTPP ((struct port_reg *)JL_PORTP)
|
||||
#endif
|
||||
#ifdef GPIOR
|
||||
#define __PORTPR ((struct port_pr_reg *)R3_PR_IO_P)
|
||||
#endif
|
||||
#ifdef GPIOUSB
|
||||
#define __PORTPU ((struct usb_reg *)JL_PORTUSB)
|
||||
#endif
|
||||
#define __portx(x,y) __PORT##x->y
|
||||
#define _portx(x,y) __portx(x,y)
|
||||
#define __toggle_port(x,y) __PORT##x->out ^= y;
|
||||
#define _toggle_port(port,pin) __toggle_port(port,pin)
|
||||
|
||||
//log:
|
||||
#define GPIO_LOG_FORMAT "0x%04x 0x%04x 0x%04x 0x%04x 0x%04x,0x%04x 0x%04x,0x%04x 0x%04x,0x%04x 0x%04x"
|
||||
#define GPIO_NO_SUPPORT_FUN "------"
|
||||
#define GPIO_LOG_PORT(x,y) JL_PORT##x->OUT&y,JL_PORT##x->DIR&y,JL_PORT##x->DIE&y,JL_PORT##x->DIEH&y,JL_PORT##x->PU0&y,JL_PORT##x->PU1&y,JL_PORT##x->PD0&y,JL_PORT##x->PD1&y,JL_PORT##x->HD0&y,JL_PORT##x->HD1&y,JL_PORT##x->SPL&y
|
||||
#ifdef GPIOP //no use
|
||||
#define GPIO_LOG_PORTP JL_PORTP->OUT,JL_PORTP->DIR,JL_PORTP->DIE,JL_PORTP->DIEH,JL_PORTP->PU0,JL_PORTP->PU1,JL_PORTP->PD0,JL_PORTP->PD1,JL_PORTP->HD0,JL_PORTP->HD1
|
||||
#endif
|
||||
#ifdef GPIOR
|
||||
#define GPIO_LOG_FORMAT_R "0x%04x 0x%04x 0x%04x %s 0x%04x,0x%04x 0x%04x,0x%04x 0x%04x,0x%04x %s"
|
||||
#define GPIO_LOG_PORTR R3_PR_OUT,R3_PR_DIR,R3_PR_DIE,GPIO_NO_SUPPORT_FUN,R3_PR_PU0,R3_PR_PU1,R3_PR_PD0,R3_PR_PD1,R3_PR_HD0,R3_PR_HD1,GPIO_NO_SUPPORT_FUN
|
||||
#endif
|
||||
#ifdef GPIOUSB
|
||||
#define GPIO_LOG_FORMAT_U "0x%04x 0x%04x 0x%04x 0x%04x 0x%04x,%s 0x%04x,%s %s,%s 0x%04x"
|
||||
#define GPIO_LOG_PORTU _portx(PU,out),_portx(PU,dir),_portx(PU,die),_portx(PU,dieh),_portx(PU,pu0),GPIO_NO_SUPPORT_FUN,_portx(PU,pd0),GPIO_NO_SUPPORT_FUN,GPIO_NO_SUPPORT_FUN,GPIO_NO_SUPPORT_FUN,_portx(PU,spl)
|
||||
#endif
|
||||
/*************************function*************************/
|
||||
struct port_reg *gpio2reg(u32 gpio);
|
||||
void usb_iomode(const u32 enable);
|
||||
|
||||
int gpio_hw_write(const u32 gpio, const u32 value);//return <0:error
|
||||
int gpio_hw_read(const u32 gpio);//return <0:error
|
||||
int get_gpio(const char *p);//return <0:error
|
||||
|
||||
/**************************************************************/
|
||||
/*********************multi pin interface***************************/
|
||||
//多io同一模式
|
||||
int gpio_hw_port_pin_judge(const enum gpio_port port, u32 pin);
|
||||
int gpio_hw_set_direction(const enum gpio_port port, u32 pin, const u32 value);
|
||||
int gpio_hw_direction_input(const enum gpio_port port, u32 pin);
|
||||
int gpio_hw_direction_output(const enum gpio_port port, u32 pin, const int value);/////////
|
||||
int gpio_hw_write_port(const enum gpio_port port, u32 pin, const u32 value);
|
||||
int gpio_hw_set_output_value(const enum gpio_port port, u32 pin, const u32 value);
|
||||
int gpio_hw_set_pull_up(const enum gpio_port port, u32 pin, const enum gpio_pullup_mode value);
|
||||
int gpio_hw_set_pull_down(const enum gpio_port port, u32 pin, const enum gpio_pulldown_mode value);//portabcdpr:pd0,pd1,usb:pd0
|
||||
int gpio_hw_set_drive_strength(const enum gpio_port port, u32 pin, const enum gpio_drive_strength value);
|
||||
int gpio_hw_set_die(const enum gpio_port port, u32 pin, const int value);
|
||||
int gpio_hw_set_dieh(const enum gpio_port port, u32 pin, const u32 value);
|
||||
int gpio_hw_set_spl(const enum gpio_port port, u32 pin, const u32 value);
|
||||
//read
|
||||
int gpio_hw_read_port(const enum gpio_port port, u32 pin);
|
||||
int gpio_hw_read_out_level(const enum gpio_port port, u32 pin);
|
||||
u32 gpio_hw_read_drive_strength(const enum gpio_port port, u32 pin);//return hd1:高16位, hd0:低16位
|
||||
|
||||
//多io不同模式
|
||||
int gpio_hw_op_dir(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_out(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_die(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_dieh(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_pu0(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_pu1(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_pd0(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
int gpio_hw_op_pd1(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 获取某IO的输出映射寄存器
|
||||
//=================================================================================//
|
||||
u32 *gpio2crossbar_outreg(u32 gpio);
|
||||
u32 gpio2crossbar_inport(u32 gpio);
|
||||
int gpio_set_fun_output_port(u32 gpio, u32 fun_index, u8 dir_ctl, u8 data_ctl);
|
||||
int gpio_disable_fun_output_port(u32 gpio);
|
||||
int gpio_set_fun_input_port(u32 gpio, enum PFI_TABLE pfun);
|
||||
int gpio_disable_fun_input_port(enum PFI_TABLE pfun);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: Output/input Channel输出设置 API, 将指定IO口设置为某个外设的输出
|
||||
//=================================================================================//
|
||||
int gpio_och_sel_output_signal(u32 gpio, enum OUTPUT_CH_SIGNAL signal);
|
||||
int gpio_och_disable_output_signal(u32 gpio, enum OUTPUT_CH_SIGNAL signal);
|
||||
int gpio_ich_sel_input_signal(u32 gpio, enum INPUT_CH_SIGNAL signal, enum INPUT_CH_TYPE type);
|
||||
int gpio_ich_disable_input_signal(u32 gpio, enum INPUT_CH_SIGNAL signal, enum INPUT_CH_TYPE type);
|
||||
|
||||
u32 gpio_get_ich_use_flag();
|
||||
//获取空闲的gp_ich
|
||||
//return: 0xff:error
|
||||
u8 gpio_get_unoccupied_gp_ich();
|
||||
//value:gp_ich号
|
||||
void gpio_release_gp_ich(u8 value);
|
||||
|
||||
u32 get_sfc_port(void);
|
||||
//打印指定组别指定pin的crossbar信息
|
||||
void gpio_crossbar_fo_dump(char px_name[], u8 max_px_out_num, u16 px_mask, u32 *omap_ptr);
|
||||
void gpio_crossbar_fi_dump(char px_name[], u8 max_px_in_num, u16 px_mask, u8 px_in);
|
||||
|
||||
#endif /*GPIO_H*/
|
||||
@@ -0,0 +1,100 @@
|
||||
#ifndef __GPTIMER_HW_H__
|
||||
#define __GPTIMER_HW_H__
|
||||
|
||||
//BR35
|
||||
#include "cpu.h"
|
||||
#include "gpio.h"
|
||||
#include "gptimer_hw_v5.h"
|
||||
|
||||
typedef JL_TIMER_TypeDef GPTIMER;
|
||||
#define GPTIMER0 JL_TIMER0
|
||||
#define GPTIMER1 JL_TIMER1
|
||||
#define GPTIMER2 JL_TIMER2
|
||||
#define GPTIMER3 JL_TIMER3
|
||||
#define TIMER_MAX_NUM 4
|
||||
#define TIMER_BASE_ADDR GPTIMER0
|
||||
#define TIMER_OFFSET (GPTIMER1 - GPTIMER0)
|
||||
|
||||
#define TIMER_CNT_SIZE 0xFFFF
|
||||
#define TIMER_PRD_SIZE 0xFFFF
|
||||
#define TIMER_PWM_SIZE 0xFFFF
|
||||
|
||||
#define IRQ_TIMEx_IDX_LIST IRQ_TIME0_IDX, \
|
||||
IRQ_TIME1_IDX, \
|
||||
IRQ_TIME2_IDX, \
|
||||
IRQ_TIME3_IDX, \
|
||||
|
||||
#define IRFLT_SRC_TABLE_LIST \
|
||||
0, /* lsb_clk */ \
|
||||
0, /* lsb_clk */ \
|
||||
12, /* std_12m */ \
|
||||
24, /* std_24m */ \
|
||||
|
||||
typedef enum gptimerx : u8 {
|
||||
TIMER0 = 0,
|
||||
TIMER1,
|
||||
TIMER2,
|
||||
TIMER3,
|
||||
TIMERx, //传入此参数时,内部自动分配一个空闲TIMER
|
||||
} timer_dev;
|
||||
|
||||
|
||||
//以下宏定义给系统 timer 驱动使用
|
||||
#define GPTIMER_PND_CLR (0b1<<14)
|
||||
|
||||
#define GPTIMER_CLK_SRC_LSB (0b0001<<10)
|
||||
#define GPTIMER_CLK_SRC_RC250K (0b0010<<10)
|
||||
#define GPTIMER_CLK_SRC_RC16M (0b0011<<10)
|
||||
#define GPTIMER_CLK_SRC_LRC (0b0100<<10)
|
||||
#define GPTIMER_CLK_SRC_STD12M (0b0101<<10)
|
||||
#define GPTIMER_CLK_SRC_STD24M (0b0110<<10)
|
||||
#define GPTIMER_CLK_SRC_STD48M (0b0111<<10)
|
||||
#define GPTIMER_CLK_SRC_CLKOUT2 (0b1000<<10)
|
||||
#define GPTIMER_CLK_SRC_PATCLK (0b1001<<10)
|
||||
#define GPTIMER_CLK_SRC_HSB (0b1010<<10)
|
||||
#define GPTIMER_CLK_SRC_WATCLK (0b1011<<10)
|
||||
|
||||
#define GPTIMER_CLK_DIV_1 (0b0000<<4)
|
||||
#define GPTIMER_CLK_DIV_4 (0b0001<<4)
|
||||
#define GPTIMER_CLK_DIV_16 (0b0010<<4)
|
||||
#define GPTIMER_CLK_DIV_64 (0b0011<<4)
|
||||
#define GPTIMER_CLK_DIV_2 (0b0100<<4)
|
||||
#define GPTIMER_CLK_DIV_8 (0b0101<<4)
|
||||
#define GPTIMER_CLK_DIV_32 (0b0110<<4)
|
||||
#define GPTIMER_CLK_DIV_128 (0b0111<<4)
|
||||
#define GPTIMER_CLK_DIV_256 (0b1000<<4)
|
||||
#define GPTIMER_CLK_DIV_1024 (0b1001<<4)
|
||||
#define GPTIMER_CLK_DIV_4096 (0b1010<<4)
|
||||
#define GPTIMER_CLK_DIV_16384 (0b1011<<4)
|
||||
#define GPTIMER_CLK_DIV_512 (0b1100<<4)
|
||||
#define GPTIMER_CLK_DIV_2048 (0b1101<<4)
|
||||
#define GPTIMER_CLK_DIV_8192 (0b1110<<4)
|
||||
#define GPTIMER_CLK_DIV_32768 (0b1111<<4)
|
||||
|
||||
#define GPTIMER_TIMER_MODE (0b1<<0)
|
||||
|
||||
//延时
|
||||
#define GPTIMER_DLY GPTIMER2
|
||||
#define GPTIMER_DLY_IRQ_INDEX IRQ_TIME2_IDX
|
||||
|
||||
//sys_hi_timer
|
||||
#define GPTIMER_SYS GPTIMER3
|
||||
#define GPTIMER_SYS_IRQ_INDEX IRQ_TIME3_IDX
|
||||
#define GPTIMER_SYS_START() GPTIMER_SYS->CON |= GPTIMER_TIMER_MODE
|
||||
#define GPTIMER_SYS_PAUSE() GPTIMER_SYS->CON &= ~GPTIMER_TIMER_MODE
|
||||
#define GPTIMER_SYS_EN_CHECK() GPTIMER_SYS->CON & GPTIMER_TIMER_MODE
|
||||
#define GPTIMER_SYS_CLR_PND() GPTIMER_SYS->CON |= GPTIMER_PND_CLR
|
||||
|
||||
#define GPTIMER_SYS_INIT() do{GPTIMER_SYS->CON = GPTIMER_PND_CLR|GPTIMER_CLK_SRC_STD12M|GPTIMER_CLK_DIV_4; \
|
||||
GPTIMER_SYS->PRD = 0; \
|
||||
GPTIMER_SYS->CNT = 0;}while(0) \
|
||||
|
||||
#define GPTIMER_SYS_GET_CNT GPTIMER_SYS->CNT
|
||||
#define GPTIMER_SYS_SET_CNT(x) GPTIMER_SYS->CNT = (x)
|
||||
#define GPTIMER_SYS_GET_PRD GPTIMER_SYS->PRD
|
||||
#define GPTIMER_SYS_SET_PRD(x) GPTIMER_SYS->PRD = (x)-1
|
||||
#define GPTIMER_SYS_CLK_SRC 12 //MHz单位
|
||||
#define GPTIMER_SYS_CLK_DIV 2 // 右移两位 等效于 除以4
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,199 @@
|
||||
#ifndef __HWI_H__
|
||||
#define __HWI_H__
|
||||
|
||||
|
||||
//=================================================
|
||||
#define IRQ_EMUEXCPT_IDX 0
|
||||
#define IRQ_EXCEPTION_IDX 1
|
||||
#define IRQ_SYSCALL_IDX 2
|
||||
#define IRQ_TICK_TMR_IDX 3
|
||||
#define IRQ_TIME0_IDX 4
|
||||
#define IRQ_TIME1_IDX 5
|
||||
#define IRQ_TIME2_IDX 6
|
||||
#define IRQ_UART0_IDX 7
|
||||
#define IRQ_UART1_IDX 8
|
||||
|
||||
#define IRQ_SPI1_IDX 10
|
||||
#define IRQ_IIC0_IDX 11
|
||||
#define IRQ_PORT_IDX 12
|
||||
#define IRQ_GPADC_IDX 13
|
||||
#define IRQ_UART2_IDX 14
|
||||
#define IRQ_LRCT_IDX 15
|
||||
|
||||
#define IRQ_GPCNT0_IDX 16
|
||||
#define IRQ_QDEC0_IDX 17
|
||||
#define IRQ_SD0_IDX 18
|
||||
#define IRQ_USB_SOF_IDX 19
|
||||
#define IRQ_USB_CTRL_IDX 20
|
||||
|
||||
#define IRQ_TIME3_IDX 22
|
||||
#define IRQ_LED_IDX 23
|
||||
#define IRQ_SD0_BRK_IDX 24
|
||||
#define IRQ_MCPWM_TMR_IDX 25
|
||||
#define IRQ_MCPWM_CHX_IDX 26
|
||||
#define IRQ_PMU_TMR0_IDX 27
|
||||
#define IRQ_PMU_TMR1_IDX 28
|
||||
|
||||
#define IRQ_SPI2_IDX 31
|
||||
|
||||
#define IRQ_P33_IDX 33
|
||||
#define IRQ_PINR_IDX 34
|
||||
#define IRQ_PMU_SOFT0_IDX 35
|
||||
#define IRQ_PMU_SOFT1_IDX 36
|
||||
#define IRQ_PMU_SOFT2_IDX 37
|
||||
#define IRQ_PMU_SOFT3_IDX 38
|
||||
|
||||
#define IRQ_PMU_TMR2_IDX 40
|
||||
#define IRQ_PMU_TMR3_IDX 41
|
||||
|
||||
#define IRQ_SRC0_IDX 66
|
||||
#define IRQ_SPI0_IDX 68
|
||||
|
||||
#define IRQ_DCP_IDX 70
|
||||
|
||||
#define IRQ_DBI_IDX 72
|
||||
#define IRQ_JPG_IDX 73
|
||||
#define IRQ_GPU_IDX 74
|
||||
|
||||
#define IRQ_ADC_IDX 88
|
||||
#define IRQ_AUDIO_IDX 89
|
||||
|
||||
#define IRQ_BT_TIMEBASE_IDX 100
|
||||
#define IRQ_BLE_RX_IDX 101
|
||||
#define IRQ_BLE_EVENT_IDX 102
|
||||
#define IRQ_BT_CLKN_IDX 103
|
||||
#define IRQ_BREDR_IDX 104
|
||||
#define IRQ_BT_RXMCH 105
|
||||
#define IRQ_SYNC_IDX 106
|
||||
|
||||
#define IRQ_SOFT0_IDX 120
|
||||
#define IRQ_SOFT1_IDX 121
|
||||
#define IRQ_SOFT2_IDX 122
|
||||
#define IRQ_SOFT3_IDX 123
|
||||
#define IRQ_SOFT4_IDX 124
|
||||
#define IRQ_SOFT5_IDX 125
|
||||
#define IRQ_SOFT6_IDX 126
|
||||
#define IRQ_SOFT7_IDX 127
|
||||
|
||||
#define MAX_IRQ_ENTRY_NUM 128
|
||||
|
||||
//=================================================
|
||||
|
||||
//=================================================
|
||||
void interrupt_init();
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 中断注册函数
|
||||
*
|
||||
* @param index 中断号
|
||||
* @param priority 优先级，范围0-6可用
|
||||
* @param handler 中断服务函数
|
||||
* @param cpu_id 相应中断服务函数的CPU
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void request_irq(u8 index, u8 priority, void (*handler)(void), u8 cpu_id);
|
||||
|
||||
void unrequest_irq(u8 index);
|
||||
|
||||
void reg_set_ip(unsigned char index, unsigned char priority, u8 cpu_id);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 设置不可屏蔽中断（不可屏蔽中断不区分优先级）
|
||||
* cpu多核同步默认使用0，其他使用1。
|
||||
*
|
||||
* @param index 中断号
|
||||
* @param priority 不可屏蔽优先级，范围 0、1 （CPU_IRQ_IPMASK_LEVEL == 6）
|
||||
* @param cpu_id 相应中断服务函数的CPU
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void irq_unmask_set(u8 index, u8 priority, u8 cpu_id);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 取消不可屏蔽中断
|
||||
* cpu多核同步默认使用0，其他使用1。
|
||||
*
|
||||
* @param index 中断号
|
||||
* @param priority 不可屏蔽优先级，范围 0、1、2、3、4、5
|
||||
* @param cpu_id 相应中断服务函数的CPU
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void irq_unmask_unset(u8 index, u8 priority, u8 cpu_id);
|
||||
|
||||
void bit_clr_ie(unsigned char index);
|
||||
void bit_set_ie(unsigned char index);
|
||||
bool irq_read(u32 index);
|
||||
|
||||
#define irq_disable(x) bit_clr_ie(x)
|
||||
#define irq_enable(x) bit_set_ie(x)
|
||||
|
||||
void unmask_enter_critical(void);
|
||||
void unmask_exit_critical(void);
|
||||
|
||||
//---------------------------------------------//
|
||||
// low power waiting
|
||||
//---------------------------------------------//
|
||||
__attribute__((always_inline))
|
||||
static inline void lp_waiting(int *ptr, int pnd, int cpd, char inum)
|
||||
{
|
||||
#if 0
|
||||
q32DSP(core_num())->IWKUP_NUM = inum;
|
||||
while (!(*ptr & pnd)) {
|
||||
asm volatile("idle");
|
||||
}
|
||||
*ptr |= cpd;
|
||||
#else
|
||||
int con;
|
||||
q32DSP(core_num())->IWKUP_NUM = inum;
|
||||
asm volatile(
|
||||
" goto 2f \n\t"
|
||||
" 1: \n\t"
|
||||
" idle \n\t"
|
||||
" 2: \n\t"
|
||||
" %0 = [%1] \n\t"
|
||||
" rep 1 { \n\t" // disable_bpu
|
||||
" if((%0 & %2)==0) goto 1b \n\t"
|
||||
" } \n\t"
|
||||
:"=&r"(con)
|
||||
:"r"(ptr), "r"(pnd), "0"(con)
|
||||
:
|
||||
);
|
||||
*ptr = con | cpd;
|
||||
#endif
|
||||
}
|
||||
|
||||
//---------------------------------------------//
|
||||
// interrupt cli/sti
|
||||
//---------------------------------------------//
|
||||
|
||||
static inline int int_cli(void)
|
||||
{
|
||||
int msg;
|
||||
asm volatile("cli %0" : "=r"(msg) :);
|
||||
return msg;
|
||||
}
|
||||
|
||||
static inline void int_sti(int msg)
|
||||
{
|
||||
asm volatile("sti %0" :: "r"(msg));
|
||||
}
|
||||
|
||||
#ifdef IRQ_TIME_COUNT_EN
|
||||
void irq_handler_enter(int irq);
|
||||
|
||||
void irq_handler_exit(int irq);
|
||||
|
||||
void irq_handler_times_dump();
|
||||
#else
|
||||
|
||||
#define irq_handler_enter(irq) do { }while(0)
|
||||
#define irq_handler_exit(irq) do { }while(0)
|
||||
#define irq_handler_times_dump() do { }while(0)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,97 @@
|
||||
#ifndef __Q32DSP_ICACHE__
|
||||
#define __Q32DSP_ICACHE__
|
||||
|
||||
//*********************************************************************************//
|
||||
// Module name : icache.h //
|
||||
// Description : q32DSP icache control head file //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
// ------ ------ ------ ------ ------ ------
|
||||
// | c0 | | c1 | | c0 | | c1 | | c0 | | c1 |
|
||||
// ------ ------ ------ ------ ------ ------
|
||||
// | | | | | |
|
||||
// ------ ------ ------ ------ ------ ------
|
||||
// | L1 | | L1 | | L1 | | L1 | | L1 | | L1 |
|
||||
// ------ ------ ------ ------ ------ ------
|
||||
// |_______| |_______| |_______|
|
||||
// | | |
|
||||
// --------- --------- ---------
|
||||
// | flash | | L2i | | L2c |
|
||||
// --------- --------- ---------
|
||||
// | |
|
||||
// --------- ---------
|
||||
// | flash | | flash |
|
||||
// --------- ---------
|
||||
//
|
||||
// INCLUDE_L2I==0 INCLUDE_L2I==1 INCLUDE_L2I==0
|
||||
// INCLUDE_L2C==0 INCLUDE_L2C==0 INCLUDE_L2C==1
|
||||
|
||||
#define INCLUDE_ICU_RPT 0
|
||||
#define INCLUDE_ICU_EMU 0
|
||||
#define INCLUDE_L2I 0 // L2i & L2d separate
|
||||
#define INCLUDE_L2C 0 // L2i & L2d together
|
||||
|
||||
//------------------------------------------------------//
|
||||
// icache level 1 function
|
||||
//------------------------------------------------------//
|
||||
|
||||
void IcuEnable(void);
|
||||
void IcuDisable(void);
|
||||
void IcuInitial(void);
|
||||
void IcuWaitIdle(void);
|
||||
void IcuSetWayNum(unsigned int way);
|
||||
|
||||
void IcuFlushinvAll(void);
|
||||
void IcuFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void IcuUnlockAll(void);
|
||||
void IcuUnlockRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void IcuLockRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void IcuPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
|
||||
void IcuReportEnable(void);
|
||||
void IcuReportDisable(void);
|
||||
void IcuReportPrintf(void);
|
||||
void IcuReportClear(void);
|
||||
|
||||
void IcuEmuEnable(void);
|
||||
void IcuEmuDisable(void);
|
||||
void IcuEmuMessage(void);
|
||||
|
||||
//------------------------------------------------------//
|
||||
// icache level 2 function
|
||||
//------------------------------------------------------//
|
||||
|
||||
#if (INCLUDE_L2I)
|
||||
|
||||
void L2iEnable(void);
|
||||
void L2iDisable(void);
|
||||
void L2iInitial(void);
|
||||
void L2iSetWayNum(unsigned int way);
|
||||
|
||||
void L2iFlushinvAll(void);
|
||||
void L2iFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L2iUnlockAll(void);
|
||||
void L2iUnlockRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L2iLockRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
void L2iPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
|
||||
|
||||
void L2iReportEnable(void);
|
||||
void L2iReportDisable(void);
|
||||
void L2iReportPrintf(void);
|
||||
void L2iReportClear(void);
|
||||
|
||||
void L2iEmuEnable(void);
|
||||
void L2iEmuDisable(void);
|
||||
void L2iEmuMessage(void);
|
||||
|
||||
#endif
|
||||
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,22 @@
|
||||
#ifndef __IIC_HW_H__
|
||||
#define __IIC_HW_H__
|
||||
|
||||
#define MAX_HW_IIC_NUM 2
|
||||
#define P11_HW_IIC_NUM 1 //p11 iic使能,及锁使能
|
||||
// typedef enum {
|
||||
// HW_IIC_0,
|
||||
// // HW_IIC_1,
|
||||
// } hw_iic_dev;
|
||||
|
||||
enum {
|
||||
HW_IIC_0,
|
||||
// HW_IIC_1,
|
||||
#if defined(P11_HW_IIC_NUM)&&P11_HW_IIC_NUM
|
||||
HW_P11_IIC_0,//p11 init,pb
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,26 @@
|
||||
#ifndef ASM_INCLUDES_H
|
||||
#define ASM_INCLUDES_H
|
||||
|
||||
#include "asm/cpu.h"
|
||||
#include "asm/crc16.h"
|
||||
#include "clock.h"
|
||||
#include "uart.h"
|
||||
#include "gpio.h"
|
||||
#include "asm/spiflash.h"
|
||||
#include "asm/csfr.h"
|
||||
#include "asm/power_interface.h"
|
||||
#include "asm/efuse.h"
|
||||
#include "asm/debug.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,89 @@
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// input IO define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define PA0_IN 1
|
||||
#define PA1_IN 2
|
||||
#define PA2_IN 3
|
||||
#define PA3_IN 4
|
||||
#define PA4_IN 5
|
||||
#define PA5_IN 6
|
||||
#define PA6_IN 7
|
||||
#define PA7_IN 8
|
||||
#define PA8_IN 9
|
||||
#define PA9_IN 10
|
||||
#define PA10_IN 11
|
||||
#define PA11_IN 12
|
||||
#define PA12_IN 13
|
||||
#define PA13_IN 14
|
||||
#define PB0_IN 15
|
||||
#define PB1_IN 16
|
||||
#define PB2_IN 17
|
||||
#define PB3_IN 18
|
||||
#define PB4_IN 19
|
||||
#define PB5_IN 20
|
||||
#define PB6_IN 21
|
||||
#define PB7_IN 22
|
||||
#define PB8_IN 23
|
||||
#define PC0_IN 24
|
||||
#define PC1_IN 25
|
||||
#define PC2_IN 26
|
||||
#define PC3_IN 27
|
||||
#define PC4_IN 28
|
||||
#define PC5_IN 29
|
||||
#define PC6_IN 30
|
||||
#define PC7_IN 31
|
||||
#define PC8_IN 32
|
||||
#define PC9_IN 33
|
||||
#define PC10_IN 34
|
||||
#define PC11_IN 35
|
||||
#define USBDP_IN 36
|
||||
#define USBDM_IN 37
|
||||
#define PP0_IN 38
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// function input select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 FI_GP_ICH0;
|
||||
__RW __u8 FI_GP_ICH1;
|
||||
__RW __u8 FI_GP_ICH2;
|
||||
__RW __u8 FI_GP_ICH3;
|
||||
__RW __u8 FI_GP_ICH4;
|
||||
__RW __u8 FI_GP_ICH5;
|
||||
__RW __u8 FI_SD0_CMD;
|
||||
__RW __u8 FI_SD0_DA0;
|
||||
__RW __u8 FI_SD0_DA1;
|
||||
__RW __u8 FI_SD0_DA2;
|
||||
__RW __u8 FI_SD0_DA3;
|
||||
__RW __u8 FI_SPI1_CLK;
|
||||
__RW __u8 FI_SPI1_DA0;
|
||||
__RW __u8 FI_SPI1_DA1;
|
||||
__RW __u8 FI_SPI1_DA2;
|
||||
__RW __u8 FI_SPI1_DA3;
|
||||
__RW __u8 FI_SPI2_CLK;
|
||||
__RW __u8 FI_SPI2_DA0;
|
||||
__RW __u8 FI_SPI2_DA1;
|
||||
__RW __u8 FI_SPI2_DA2;
|
||||
__RW __u8 FI_SPI2_DA3;
|
||||
__RW __u8 FI_IIC0_SCL;
|
||||
__RW __u8 FI_IIC0_SDA;
|
||||
__RW __u8 FI_UART0_RX;
|
||||
__RW __u8 FI_UART1_RX;
|
||||
__RW __u8 FI_UART2_RX;
|
||||
__RW __u8 FI_QDEC0_A;
|
||||
__RW __u8 FI_QDEC0_B;
|
||||
__RW __u8 FI_CHAIN_IN0;
|
||||
__RW __u8 FI_CHAIN_IN1;
|
||||
__RW __u8 FI_CHAIN_IN2;
|
||||
__RW __u8 FI_CHAIN_IN3;
|
||||
__RW __u8 FI_CHAIN_RST;
|
||||
__RW __u8 FI_TOTAL;
|
||||
} JL_IMAP_TypeDef;
|
||||
|
||||
#define JL_IMAP_BASE (ls_base + map_adr(0x3a, 0x00))
|
||||
#define JL_IMAP ((JL_IMAP_TypeDef *)JL_IMAP_BASE)
|
||||
@@ -0,0 +1,92 @@
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// output function define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define FO_GP_OCH0 ((0 << 2)|BIT(1))
|
||||
#define FO_GP_OCH1 ((1 << 2)|BIT(1))
|
||||
#define FO_GP_OCH2 ((2 << 2)|BIT(1))
|
||||
#define FO_GP_OCH3 ((3 << 2)|BIT(1))
|
||||
#define FO_GP_OCH4 ((4 << 2)|BIT(1))
|
||||
#define FO_GP_OCH5 ((5 << 2)|BIT(1))
|
||||
#define FO_GP_OCH6 ((6 << 2)|BIT(1))
|
||||
#define FO_GP_OCH7 ((7 << 2)|BIT(1))
|
||||
#define FO_SD0_CLK ((8 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_CMD ((9 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA0 ((10 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA1 ((11 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA2 ((12 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA3 ((13 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_CLK ((14 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA0 ((15 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA1 ((16 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA2 ((17 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA3 ((18 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_CLK ((19 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA0 ((20 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA1 ((21 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA2 ((22 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA3 ((23 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_IIC0_SCL ((24 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_IIC0_SDA ((25 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART0_TX ((26 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART1_TX ((27 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART2_TX ((28 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_MCPWM0_H ((29 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_MCPWM1_H ((30 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_MCPWM0_L ((31 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_MCPWM1_L ((32 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT0 ((33 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT1 ((34 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT2 ((35 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT3 ((36 << 2)|BIT(1)|BIT(0))
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// IO output select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 PA0_OUT;
|
||||
__RW __u8 PA1_OUT;
|
||||
__RW __u8 PA2_OUT;
|
||||
__RW __u8 PA3_OUT;
|
||||
__RW __u8 PA4_OUT;
|
||||
__RW __u8 PA5_OUT;
|
||||
__RW __u8 PA6_OUT;
|
||||
__RW __u8 PA7_OUT;
|
||||
__RW __u8 PA8_OUT;
|
||||
__RW __u8 PA9_OUT;
|
||||
__RW __u8 PA10_OUT;
|
||||
__RW __u8 PA11_OUT;
|
||||
__RW __u8 PA12_OUT;
|
||||
__RW __u8 PA13_OUT;
|
||||
__RW __u8 PB0_OUT;
|
||||
__RW __u8 PB1_OUT;
|
||||
__RW __u8 PB2_OUT;
|
||||
__RW __u8 PB3_OUT;
|
||||
__RW __u8 PB4_OUT;
|
||||
__RW __u8 PB5_OUT;
|
||||
__RW __u8 PB6_OUT;
|
||||
__RW __u8 PB7_OUT;
|
||||
__RW __u8 PB8_OUT;
|
||||
__RW __u8 PC0_OUT;
|
||||
__RW __u8 PC1_OUT;
|
||||
__RW __u8 PC2_OUT;
|
||||
__RW __u8 PC3_OUT;
|
||||
__RW __u8 PC4_OUT;
|
||||
__RW __u8 PC5_OUT;
|
||||
__RW __u8 PC6_OUT;
|
||||
__RW __u8 PC7_OUT;
|
||||
__RW __u8 PC8_OUT;
|
||||
__RW __u8 PC9_OUT;
|
||||
__RW __u8 PC10_OUT;
|
||||
__RW __u8 PC11_OUT;
|
||||
__RW __u8 USBDP_OUT;
|
||||
__RW __u8 USBDM_OUT;
|
||||
__RW __u8 PP0_OUT;
|
||||
} JL_OMAP_TypeDef;
|
||||
|
||||
#define JL_OMAP_BASE (ls_base + map_adr(0x36, 0x00))
|
||||
#define JL_OMAP ((JL_OMAP_TypeDef *)JL_OMAP_BASE)
|
||||
@@ -0,0 +1,231 @@
|
||||
#ifndef __KEY_DRV_IR_H__
|
||||
#define __KEY_DRV_IR_H__
|
||||
|
||||
#define IR_PORTA(x) (0x00 + x)
|
||||
#define IR_PORTB(x) (0x10 + x)
|
||||
#define IR_PORTC(x) (0x20 + x)
|
||||
#define IR_PORTD(x) (0x30 + x)
|
||||
#define IR_USBDP (0x3d)
|
||||
#define IR_USBDM (0x3e)
|
||||
|
||||
#define IR_IO IR_PORTA(9)
|
||||
|
||||
/*ir key define*/
|
||||
#define IR_00 0
|
||||
#define IR_01 1
|
||||
#define IR_02 2
|
||||
#define IR_03 3
|
||||
#define IR_04 4
|
||||
#define IR_05 5
|
||||
#define IR_06 6
|
||||
#define IR_07 7
|
||||
#define IR_08 8
|
||||
#define IR_09 9
|
||||
#define IR_10 10
|
||||
#define IR_11 11
|
||||
#define IR_12 12
|
||||
#define IR_13 13
|
||||
#define IR_14 14
|
||||
#define IR_15 15
|
||||
#define IR_16 16
|
||||
#define IR_17 17
|
||||
#define IR_18 18
|
||||
#define IR_19 19
|
||||
#define IR_20 20
|
||||
#define IR_21 21
|
||||
#define IR_22 22
|
||||
|
||||
//////////////////////////////////
|
||||
#define NKEY_00 0xff
|
||||
#define NKEY_01 0xff
|
||||
#define NKEY_02 0xff
|
||||
#define NKEY_03 0xff
|
||||
#define NKEY_04 0xff
|
||||
#define NKEY_05 0xff
|
||||
#define NKEY_06 0xff
|
||||
#define NKEY_07 0xff
|
||||
#define NKEY_08 0xff
|
||||
#define NKEY_09 0xff
|
||||
#define NKEY_0A 0xff
|
||||
#define NKEY_0B 0xff
|
||||
#define NKEY_0C 0xff
|
||||
#define NKEY_0D 0xff
|
||||
#define NKEY_0E 0xff
|
||||
#define NKEY_0F 0xff
|
||||
#define NKEY_10 0xff
|
||||
#define NKEY_11 0xff
|
||||
#define NKEY_12 0xff
|
||||
#define NKEY_13 0xff
|
||||
#define NKEY_14 0xff
|
||||
#define NKEY_15 0xff
|
||||
#define NKEY_16 0xff
|
||||
#define NKEY_17 0xff
|
||||
#define NKEY_18 0xff
|
||||
#define NKEY_19 0xff
|
||||
#define NKEY_1A 0xff
|
||||
#define NKEY_1B 0xff
|
||||
#define NKEY_1C 0xff
|
||||
#define NKEY_1D 0xff
|
||||
#define NKEY_1E 0xff
|
||||
#define NKEY_1F 0xff
|
||||
#define NKEY_20 0xff
|
||||
#define NKEY_21 0xff
|
||||
#define NKEY_22 0xff
|
||||
#define NKEY_23 0xff
|
||||
#define NKEY_24 0xff
|
||||
#define NKEY_25 0xff
|
||||
#define NKEY_26 0xff
|
||||
#define NKEY_27 0xff
|
||||
#define NKEY_28 0xff
|
||||
#define NKEY_29 0xff
|
||||
#define NKEY_2A 0xff
|
||||
#define NKEY_2B 0xff
|
||||
#define NKEY_2C 0xff
|
||||
#define NKEY_2D 0xff
|
||||
#define NKEY_2E 0xff
|
||||
#define NKEY_2F 0xff
|
||||
#define NKEY_30 0xff
|
||||
#define NKEY_31 0xff
|
||||
#define NKEY_32 0xff
|
||||
#define NKEY_33 0xff
|
||||
#define NKEY_34 0xff
|
||||
#define NKEY_35 0xff
|
||||
#define NKEY_36 0xff
|
||||
#define NKEY_37 0xff
|
||||
#define NKEY_38 0xff
|
||||
#define NKEY_39 0xff
|
||||
#define NKEY_3A 0xff
|
||||
#define NKEY_3B 0xff
|
||||
#define NKEY_3C 0xff
|
||||
#define NKEY_3D 0xff
|
||||
#define NKEY_3E 0xff
|
||||
#define NKEY_3F 0xff
|
||||
#define NKEY_40 0xff
|
||||
#define NKEY_41 0xff
|
||||
#define NKEY_42 0xff
|
||||
#define NKEY_43 0xff
|
||||
#define NKEY_44 0xff
|
||||
#define NKEY_45 0xff
|
||||
#define NKEY_46 0xff
|
||||
#define NKEY_47 0xff
|
||||
#define NKEY_48 0xff
|
||||
#define NKEY_49 0xff
|
||||
#define NKEY_4A 0xff
|
||||
#define NKEY_4B 0xff
|
||||
#define NKEY_4C 0xff
|
||||
#define NKEY_4D 0xff
|
||||
#define NKEY_4E 0xff
|
||||
#define NKEY_4F 0xff
|
||||
#define NKEY_50 0xff
|
||||
#define NKEY_51 0xff
|
||||
#define NKEY_52 0xff
|
||||
#define NKEY_53 0xff
|
||||
#define NKEY_54 0xff
|
||||
#define NKEY_55 0xff
|
||||
#define NKEY_56 0xff
|
||||
#define NKEY_57 0xff
|
||||
#define NKEY_58 0xff
|
||||
#define NKEY_59 0xff
|
||||
#define NKEY_5A 0xff
|
||||
#define NKEY_5B 0xff
|
||||
#define NKEY_5C 0xff
|
||||
#define NKEY_5D 0xff
|
||||
#define NKEY_5E 0xff
|
||||
#define NKEY_5F 0xff
|
||||
#define NKEY_60 0xff
|
||||
#define NKEY_61 0xff
|
||||
#define NKEY_62 0xff
|
||||
#define NKEY_63 0xff
|
||||
#define NKEY_64 0xff
|
||||
#define NKEY_65 0xff
|
||||
#define NKEY_66 0xff
|
||||
#define NKEY_67 0xff
|
||||
#define NKEY_68 0xff
|
||||
#define NKEY_69 0xff
|
||||
#define NKEY_6A 0xff
|
||||
#define NKEY_6B 0xff
|
||||
#define NKEY_6C 0xff
|
||||
#define NKEY_6D 0xff
|
||||
#define NKEY_6E 0xff
|
||||
#define NKEY_6F 0xff
|
||||
#define NKEY_70 0xff
|
||||
#define NKEY_71 0xff
|
||||
#define NKEY_72 0xff
|
||||
#define NKEY_73 0xff
|
||||
#define NKEY_74 0xff
|
||||
#define NKEY_75 0xff
|
||||
#define NKEY_76 0xff
|
||||
#define NKEY_77 0xff
|
||||
#define NKEY_78 0xff
|
||||
#define NKEY_79 0xff
|
||||
#define NKEY_7A 0xff
|
||||
#define NKEY_7B 0xff
|
||||
#define NKEY_7C 0xff
|
||||
#define NKEY_7D 0xff
|
||||
#define NKEY_7E 0xff
|
||||
#define NKEY_7F 0xff
|
||||
#define NKEY_80 0xff
|
||||
#define NKEY_81 0xff
|
||||
#define NKEY_82 0xff
|
||||
#define NKEY_83 0xff
|
||||
#define NKEY_84 0xff
|
||||
#define NKEY_85 0xff
|
||||
#define NKEY_86 0xff
|
||||
#define NKEY_87 0xff
|
||||
#define NKEY_88 0xff
|
||||
#define NKEY_89 0xff
|
||||
#define NKEY_8A 0xff
|
||||
#define NKEY_8B 0xff
|
||||
#define NKEY_8C 0xff
|
||||
#define NKEY_8D 0xff
|
||||
#define NKEY_8E 0xff
|
||||
#define NKEY_8F 0xff
|
||||
#define NKEY_90 0xff
|
||||
#define NKEY_91 0xff
|
||||
#define NKEY_92 0xff
|
||||
#define NKEY_93 0xff
|
||||
#define NKEY_94 0xff
|
||||
#define NKEY_95 0xff
|
||||
|
||||
|
||||
typedef struct _IR_CODE {
|
||||
u16 wData; //<键值
|
||||
u16 wUserCode; //<用户码
|
||||
u16 timer_pad;
|
||||
u8 bState; //<接收状态
|
||||
u8 boverflow; //<红外信号超时
|
||||
} IR_CODE;
|
||||
|
||||
enum timer_sel {
|
||||
TIMER0,
|
||||
TIMER1,
|
||||
TIMER2,
|
||||
TIMER3,
|
||||
TIMER4,
|
||||
TIMER5,
|
||||
};
|
||||
|
||||
struct irflt_platform_data {
|
||||
u8 irflt_io;
|
||||
u8 timer;
|
||||
};
|
||||
|
||||
#define IRFLT_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct irflt_platform_data data = {
|
||||
|
||||
#define IRFLT_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
|
||||
extern const struct device_operations irflt_dev_ops;
|
||||
|
||||
void set_ir_clk(void);
|
||||
void ir_input_io_sel(u8 port);
|
||||
void ir_output_timer_sel();
|
||||
void ir_timeout_set(void);
|
||||
void irflt_config();
|
||||
void log_irflt_info();
|
||||
u8 get_irflt_value(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,16 @@
|
||||
#ifndef CPU_IRQ_H
|
||||
#define CPU_IRQ_H
|
||||
|
||||
|
||||
#include "asm/hwi.h"
|
||||
|
||||
#define ___interrupt __attribute__((interrupt("")))
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,143 @@
|
||||
#ifndef _LPCTMU_HW_H_
|
||||
#define _LPCTMU_HW_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
#define LPCTMU_CHANNEL_SIZE 5
|
||||
|
||||
#define LPCTMU_ANA_CFG_ADAPTIVE 1
|
||||
|
||||
|
||||
enum {
|
||||
LPCTMU_VH_065V,
|
||||
LPCTMU_VH_070V,
|
||||
LPCTMU_VH_075V,
|
||||
LPCTMU_VH_080V,
|
||||
};
|
||||
|
||||
enum {
|
||||
LPCTMU_VL_020V,
|
||||
LPCTMU_VL_025V,
|
||||
LPCTMU_VL_030V,
|
||||
LPCTMU_VL_035V,
|
||||
};
|
||||
|
||||
enum {
|
||||
LPCTMU_ISEL_036UA,
|
||||
LPCTMU_ISEL_072UA,
|
||||
LPCTMU_ISEL_108UA,
|
||||
LPCTMU_ISEL_144UA,
|
||||
LPCTMU_ISEL_180UA,
|
||||
LPCTMU_ISEL_216UA,
|
||||
LPCTMU_ISEL_252UA,
|
||||
LPCTMU_ISEL_288UA
|
||||
};
|
||||
|
||||
enum {
|
||||
LPCTMU_CH0_PB0,
|
||||
LPCTMU_CH1_PB1,
|
||||
LPCTMU_CH2_PB2,
|
||||
LPCTMU_CH3_PB3,
|
||||
LPCTMU_CH4_PB4,
|
||||
};
|
||||
|
||||
enum CTMU_M2P_CMD {
|
||||
REQUEST_LPCTMU_IRQ = 0x50,
|
||||
REQUEST_LPCTMU_TIMER_ADD,
|
||||
REQUEST_LPCTMU_TIMER_DEL,
|
||||
};
|
||||
|
||||
enum bt_arb_wl2ext_act {
|
||||
RF_PLL_EN = 1,
|
||||
RF_PLL_RN,
|
||||
RF_RX_LDO,
|
||||
RF_RX_EN,
|
||||
RF_TX_LDO,
|
||||
RF_TX_EN,
|
||||
EF_RX_TX_EN_XOR,
|
||||
};
|
||||
|
||||
enum lpctmu_ext_stop_sel {
|
||||
BT_SIG_ACT0,
|
||||
BT_SIG_ACT1,
|
||||
BT_SIG_ACT0_ACT1_XOR,
|
||||
BT_SIG_ACT0_ACT1_AND,
|
||||
};
|
||||
|
||||
enum lpctmu_wakeup_cfg {
|
||||
LPCTMU_WAKEUP_DISABLE,
|
||||
LPCTMU_WAKEUP_EN_WITHOUT_CHARGE_ONLINE,
|
||||
LPCTMU_WAKEUP_EN_ALWAYS,
|
||||
};
|
||||
|
||||
|
||||
struct lpctmu_platform_data {
|
||||
u8 ext_stop_ch_en;
|
||||
u8 ext_stop_sel;
|
||||
u8 sample_window_time; //采样窗口时间 ms
|
||||
u8 sample_scan_time; //多久采样一次 ms
|
||||
u8 lowpower_sample_scan_time; //软关机下多久采样一次 ms
|
||||
u16 aim_vol_delta;
|
||||
u16 aim_charge_khz;
|
||||
};
|
||||
|
||||
struct lpctmu_config_data {
|
||||
u8 ch_num;
|
||||
u8 ch_list[LPCTMU_CHANNEL_SIZE];
|
||||
u8 ch_en;
|
||||
u8 ch_wkp_en;
|
||||
u8 softoff_wakeup_cfg;
|
||||
const struct lpctmu_platform_data *pdata;
|
||||
};
|
||||
|
||||
|
||||
|
||||
#define LPCTMU_PLATFORM_DATA_BEGIN(data) \
|
||||
const struct lpctmu_platform_data data = {
|
||||
|
||||
#define LPCTMU_PLATFORM_DATA_END() \
|
||||
.ext_stop_ch_en = 0, \
|
||||
.ext_stop_sel = 0,\
|
||||
.sample_window_time = 2, \
|
||||
.sample_scan_time = 20, \
|
||||
.lowpower_sample_scan_time = 100, \
|
||||
}
|
||||
|
||||
#define LPCTMU_CFG_DATA_BEGIN(data) \
|
||||
static struct lpctmu_config_data data = {
|
||||
|
||||
#define LPCTMU_CFG_DATA_END() \
|
||||
}
|
||||
|
||||
|
||||
|
||||
void lpctmu_send_m2p_cmd(enum CTMU_M2P_CMD cmd);
|
||||
|
||||
u32 lpctmu_get_cur_ch_by_idx(u32 ch_idx);
|
||||
|
||||
u32 lpctmu_get_idx_by_cur_ch(u32 cur_ch);
|
||||
|
||||
u32 lpctmu_get_cur_ch_res(u32 cur_ch);
|
||||
|
||||
void lpctmu_set_ana_hv_level(u32 level);
|
||||
|
||||
u32 lpctmu_get_ana_hv_level(void);
|
||||
|
||||
void lpctmu_set_ana_cur_level(u32 ch, u32 cur_level);
|
||||
|
||||
u32 lpctmu_get_ana_cur_level(u32 ch);
|
||||
|
||||
void lpctmu_init(struct lpctmu_config_data *cfg_data);
|
||||
|
||||
void lpctmu_disable(void);
|
||||
|
||||
void lpctmu_enable(void);
|
||||
|
||||
u32 lpctmu_is_sf_keep(void);
|
||||
|
||||
void lpctmu_test(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,130 @@
|
||||
#ifndef _MCPWM_H_
|
||||
#define _MCPWM_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define MCPWM_NUM_MAX 8
|
||||
#define MCPWM_CH_MAX 2
|
||||
#define MCPWM_TMR_BASE_ADDR (&JL_MCPWM->TMR0_CON)
|
||||
#define MCPWM_TMR_OFFSET (&JL_MCPWM->TMR1_CON - &JL_MCPWM->TMR0_CON)
|
||||
#define MCPWM_CH_BASE_ADDR (&JL_MCPWM->CH0_CON0)
|
||||
#define MCPWM_CH_OFFSET (&JL_MCPWM->CH1_CON0 - &JL_MCPWM->CH0_CON0)
|
||||
|
||||
//TMRx_CON reg
|
||||
#define MCPWM_TMR_INCF 15
|
||||
// #define MCPWM_TMR_RESERVE 14
|
||||
#define MCPWM_TMR_UFPND 13
|
||||
#define MCPWM_TMR_OFPN 12
|
||||
#define MCPWM_TMR_UFCLR 11
|
||||
#define MCPWM_TMR_OFCLR 10
|
||||
#define MCPWM_TMR_UFIE 9
|
||||
#define MCPWM_TMR_OFTE 8
|
||||
#define MCPWM_TMR_CKSRC 7
|
||||
#define MCPWM_TMR_CKPS 3 //4bit
|
||||
// #define MCPWM_TMR_RESERVE 2
|
||||
#define MCPWM_TMR_MODE 0 //2bit
|
||||
|
||||
//CHx_CON0 reg
|
||||
#define MCPWM_CH_DTCKPS 12 //4bit
|
||||
#define MCPWM_CH_DTPR 7 //5bit
|
||||
#define MCPWM_CH_DTEN 6
|
||||
#define MCPWM_CH_L_INV 5
|
||||
#define MCPWM_CH_H_INV 4
|
||||
#define MCPWM_CH_L_EN 3
|
||||
#define MCPWM_CH_H_EN 2
|
||||
#define MCPWM_CH_CMP_LD 0 //2bit
|
||||
|
||||
//CHx_CON1 reg
|
||||
#define MCPWM_CH_FPND 15
|
||||
#define MCPWM_CH_FCLR 14
|
||||
// #define MCPWM_CH_RESERVE 12 //2bit
|
||||
#define MCPWM_CH_INTEN 11
|
||||
#define MCPWM_CH_TMRSEL 8 //3bit
|
||||
// #define MCPWM_CH_reserve 5 //3bit
|
||||
#define MCPWM_CH_FPINEN 4
|
||||
#define MCPWM_CH_FPINAUTO 3
|
||||
#define MCPWM_CH_FPINSEL 0 //3bit
|
||||
|
||||
//FPIN_CON reg
|
||||
#define MCPWM_FPIN_EDGE 16 //8bit
|
||||
#define MCPWM_FPIN_FLT_EN 8 //8bit
|
||||
// #define MCPWM_CH_reserve 6 //2bit
|
||||
#define MCPWM_FPIN_FLT_PR 8 //5bit
|
||||
|
||||
//MCPWM_CON reg
|
||||
#define MCPWM_CON_CLK_EN 16
|
||||
#define MCPWM_CON_TMR_EN 8 //8bit
|
||||
#define MCPWM_CON_PWM_EN 0 //8bit2
|
||||
|
||||
|
||||
/* pwm通道选择 */
|
||||
typedef enum {
|
||||
MCPWM_CH0 = 0,
|
||||
MCPWM_CH1,
|
||||
} mcpwm_ch_type;
|
||||
|
||||
/* 对齐方式选择 */
|
||||
typedef enum {
|
||||
MCPWM_EDGE_ALIGNED, ///< 边沿对齐模式
|
||||
MCPWM_CENTER_ALIGNED, ///< 中心对齐模式
|
||||
} mcpwm_aligned_mode_type;
|
||||
|
||||
/* 故障保护触发边沿 */
|
||||
typedef enum {
|
||||
MCPWM_EDGE_FAILL = 0, //下降沿触发
|
||||
MCPWM_EDGE_RISE, //上升沿触发
|
||||
MCPWM_EDGE_DEFAULT = 0xff, //默认会忽略
|
||||
} mcpwm_edge;
|
||||
|
||||
/* MCPWM通道寄存器 */
|
||||
typedef struct _mcpwm_ch_reg {
|
||||
volatile u32 ch_con0;
|
||||
volatile u32 ch_con1;
|
||||
volatile u32 ch_cmph;
|
||||
volatile u32 ch_cmpl;
|
||||
} MCPWM_CHx_REG;
|
||||
|
||||
/* MCPWM TIMER寄存器 */
|
||||
typedef struct _mcpwm_timer_reg {
|
||||
volatile u32 tmr_con;
|
||||
volatile u32 tmr_cnt;
|
||||
volatile u32 tmr_pr;
|
||||
} MCPWM_TIMERx_REG;
|
||||
|
||||
|
||||
/* 初始化要用的参数结构体 */
|
||||
typedef void (*mcpwm_detect_irq_callback)(u32 ch); //回调函数
|
||||
struct mcpwm_config {
|
||||
mcpwm_ch_type ch; ///< 选择pwm通道号
|
||||
mcpwm_aligned_mode_type aligned_mode; ///< PWM对齐方式选择
|
||||
u32 frequency; ///< 初始共同频率，CH0, CH, CH2,,,,,,
|
||||
u16 duty; ///< 初始占空比，0~10000 对应 0%~100% 。每个通道可以有不同的占空比。互补模式的占空比体现在高引脚的波形上。
|
||||
u16 h_pin; ///< 一个通道的H引脚。
|
||||
u16 l_pin; ///< 一个通道的L引脚，不需要则填-1
|
||||
u8 complementary_en; ///< 该通道的两个引脚输出的波形。0: 同步， 1: 互补，互补波形的占空比体现在H引脚上
|
||||
u16 detect_port;
|
||||
mcpwm_edge edge;
|
||||
mcpwm_detect_irq_callback irq_cb;
|
||||
u16 irq_priority; //默认值优先级1
|
||||
};
|
||||
|
||||
struct mcpwm_info_t {
|
||||
MCPWM_CHx_REG *ch_reg;
|
||||
MCPWM_TIMERx_REG *timer_reg;
|
||||
struct mcpwm_config cfg;
|
||||
};
|
||||
|
||||
|
||||
int mcpwm_init(struct mcpwm_config *mcpwm_cfg);
|
||||
void mcpwm_deinit(int mcpwm_cfg_id);
|
||||
void mcpwm_start(int mcpwm_cfg_id);
|
||||
void mcpwm_pause(int mcpwm_cfg_id);
|
||||
void mcpwm_resume(int mcpwm_cfg_id);
|
||||
void mcpwm_set_frequency(int mcpwm_cfg_id, mcpwm_aligned_mode_type align, u32 frequency);
|
||||
void mcpwm_set_duty(int mcpwm_cfg_id, u16 duty);
|
||||
void mcpwm_fpnd_clr(u32 ch);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
#ifndef _PLCNT_DRV_H_
|
||||
#define _PLCNT_DRV_H_
|
||||
|
||||
|
||||
#define PLCNT_KEY_CH_MAX 3
|
||||
|
||||
struct touch_key_port {
|
||||
u16 press_delta; //按下判决的阈值
|
||||
u8 port; //触摸按键IO
|
||||
u8 key_value; //按键返回值
|
||||
};
|
||||
|
||||
struct touch_key_platform_data {
|
||||
u8 num; //触摸按键个数
|
||||
const struct touch_key_port *port_list;
|
||||
};
|
||||
|
||||
|
||||
/* =========== pclcnt API ============= */
|
||||
//plcnt 初始化
|
||||
int plcnt_init(void *_data);
|
||||
|
||||
//获取plcnt按键状态
|
||||
u8 get_plcnt_value(void);
|
||||
|
||||
|
||||
#endif /* _PLCNT_DRV_H_ */
|
||||
|
||||
|
||||
@@ -0,0 +1,34 @@
|
||||
#ifndef _IPC_SPIN_LOCK_H_
|
||||
#define _IPC_SPIN_LOCK_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "gpio.h"
|
||||
|
||||
enum ipc_spin_lock_event {
|
||||
IPC_SPIN_LOCK_EVENT_USER0 = 0,//自定义事件名
|
||||
IPC_SPIN_LOCK_EVENT_USER1,
|
||||
IPC_SPIN_LOCK_EVENT_USER2,
|
||||
IPC_SPIN_LOCK_EVENT_USER3,
|
||||
IPC_SPIN_LOCK_EVENT_USER4,
|
||||
IPC_SPIN_LOCK_EVENT_USER5,
|
||||
IPC_SPIN_LOCK_EVENT_USER6,
|
||||
IPC_SPIN_LOCK_EVENT_USER7,
|
||||
IPC_SPIN_LOCK_EVENT_USER8,
|
||||
IPC_SPIN_LOCK_EVENT_P11_GPIO,
|
||||
IPC_SPIN_LOCK_EVENT_RTC,
|
||||
IPC_SPIN_LOCK_EVENT_UART, //11
|
||||
IPC_SPIN_LOCK_EVENT_P11_IIC,//12
|
||||
IPC_SPIN_LOCK_EVENT_CBUF, //13
|
||||
IPC_SPIN_LOCK_EVENT_PMU, //14
|
||||
IPC_SPIN_LOCK_EVENT_SFR, //15
|
||||
IPC_SPIN_LOCK_EVENT_MAX,
|
||||
|
||||
|
||||
};
|
||||
|
||||
void ipc_spin_lock_init();
|
||||
|
||||
void ipc_spin_lock(enum ipc_spin_lock_event event);//0~15
|
||||
void ipc_spin_unlock(enum ipc_spin_lock_event event);//0~15
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,162 @@
|
||||
#ifndef __LP_IPC_H__
|
||||
#define __LP_IPC_H__
|
||||
|
||||
//===========================================================================//
|
||||
// P2M MESSAGE TABLE //
|
||||
//===========================================================================//
|
||||
//==================power=============================
|
||||
#define P2M_WKUP_SRC P2M_MESSAGE_ACCESS(0)
|
||||
#define P2M_WKUP_P_PND P2M_MESSAGE_ACCESS(1)
|
||||
#define P2M_WKUP_N_PND P2M_MESSAGE_ACCESS(2)
|
||||
#define P2M_AWKUP_P_PND P2M_MESSAGE_ACCESS(3)
|
||||
#define P2M_AWKUP_N_PND P2M_MESSAGE_ACCESS(4)
|
||||
#define P2M_WKUP_RTC P2M_MESSAGE_ACCESS(5)
|
||||
#define P2M_WKUP_CNT0 P2M_MESSAGE_ACCESS(6)
|
||||
#define P2M_WKUP_CNT1 P2M_MESSAGE_ACCESS(7)
|
||||
#define P2M_WKUP_CNT2 P2M_MESSAGE_ACCESS(8)
|
||||
#define P2M_WKUP_CNT3 P2M_MESSAGE_ACCESS(9)
|
||||
#define P2M_OSC_CNT0 P2M_MESSAGE_ACCESS(10)
|
||||
#define P2M_OSC_CNT1 P2M_MESSAGE_ACCESS(11)
|
||||
#define P2M_OSC_CNT2 P2M_MESSAGE_ACCESS(12)
|
||||
#define P2M_OSC_CNT3 P2M_MESSAGE_ACCESS(13)
|
||||
#define P2M_RESET_FLAG P2M_MESSAGE_ACCESS(14)
|
||||
|
||||
|
||||
|
||||
//==================system===========================
|
||||
#define P2M_MESSAGE_BANK_ADR_L P2M_MESSAGE_ACCESS(15)
|
||||
#define P2M_MESSAGE_BANK_ADR_H P2M_MESSAGE_ACCESS(16)
|
||||
#define P2M_MESSAGE_BANK_INDEX P2M_MESSAGE_ACCESS(17)
|
||||
#define P2M_MESSAGE_BANK_ACK P2M_MESSAGE_ACCESS(18)
|
||||
#define P2M_P11_HEAP_BEGIN_ADDR_L P2M_MESSAGE_ACCESS(19)
|
||||
#define P2M_P11_HEAP_BEGIN_ADDR_H P2M_MESSAGE_ACCESS(20)
|
||||
#define P2M_P11_HEAP_SIZE_L P2M_MESSAGE_ACCESS(21)
|
||||
#define P2M_P11_HEAP_SIZE_H P2M_MESSAGE_ACCESS(22)
|
||||
#define P2M_REPLY_SYNC_CMD P2M_MESSAGE_ACCESS(23)
|
||||
#define P2M_CBUF_ADDR0 P2M_MESSAGE_ACCESS(24)
|
||||
#define P2M_CBUF_ADDR1 P2M_MESSAGE_ACCESS(25)
|
||||
#define P2M_CBUF_ADDR2 P2M_MESSAGE_ACCESS(26)
|
||||
#define P2M_CBUF_ADDR3 P2M_MESSAGE_ACCESS(27)
|
||||
#define P2M_CBUF1_ADDR0 P2M_MESSAGE_ACCESS(28)
|
||||
#define P2M_CBUF1_ADDR1 P2M_MESSAGE_ACCESS(29)
|
||||
#define P2M_CBUF1_ADDR2 P2M_MESSAGE_ACCESS(30)
|
||||
#define P2M_CBUF1_ADDR3 P2M_MESSAGE_ACCESS(31)
|
||||
|
||||
//==================clock===========================
|
||||
#define P2M_BTOSC_OK P2M_MESSAGE_ACCESS(35)
|
||||
|
||||
//==================lpctmu===========================
|
||||
#define P2M_CTMU_CMD_ACK P2M_MESSAGE_ACCESS(39)
|
||||
|
||||
#define P2M_MASSAGE_CTMU_CH0_L_RES 40
|
||||
#define P2M_MASSAGE_CTMU_CH0_H_RES 41
|
||||
#define P2M_CTMU_CH0_L_RES P2M_MESSAGE_ACCESS(40)
|
||||
#define P2M_CTMU_CH0_H_RES P2M_MESSAGE_ACCESS(41)
|
||||
#define P2M_CTMU_CH1_L_RES P2M_MESSAGE_ACCESS(42)
|
||||
#define P2M_CTMU_CH1_H_RES P2M_MESSAGE_ACCESS(43)
|
||||
#define P2M_CTMU_CH2_L_RES P2M_MESSAGE_ACCESS(44)
|
||||
#define P2M_CTMU_CH2_H_RES P2M_MESSAGE_ACCESS(45)
|
||||
#define P2M_CTMU_CH3_L_RES P2M_MESSAGE_ACCESS(46)
|
||||
#define P2M_CTMU_CH3_H_RES P2M_MESSAGE_ACCESS(47)
|
||||
#define P2M_CTMU_CH4_L_RES P2M_MESSAGE_ACCESS(48)
|
||||
#define P2M_CTMU_CH4_H_RES P2M_MESSAGE_ACCESS(49)
|
||||
|
||||
|
||||
//===========================================================================//
|
||||
// M2P MESSAGE TABLE //
|
||||
//===========================================================================//
|
||||
//==================power=============================
|
||||
#define M2P_LRC_PRD M2P_MESSAGE_ACCESS(0)
|
||||
#define M2P_WDVDD M2P_MESSAGE_ACCESS(1)
|
||||
#define M2P_LRC_FEQ0 M2P_MESSAGE_ACCESS(2)
|
||||
#define M2P_LRC_FEQ1 M2P_MESSAGE_ACCESS(3)
|
||||
#define M2P_LRC_FEQ2 M2P_MESSAGE_ACCESS(4)
|
||||
#define M2P_LRC_FEQ3 M2P_MESSAGE_ACCESS(5)
|
||||
#define M2P_VDDIO_KEEP M2P_MESSAGE_ACCESS(6)
|
||||
#define M2P_LRC_KEEP M2P_MESSAGE_ACCESS(7)
|
||||
#define M2P_RCH_FEQ_L M2P_MESSAGE_ACCESS(8)
|
||||
#define M2P_RCH_FEQ_H M2P_MESSAGE_ACCESS(9)
|
||||
#define M2P_MEM_CONTROL M2P_MESSAGE_ACCESS(10)
|
||||
#define M2P_BTOSC_KEEP M2P_MESSAGE_ACCESS(11)
|
||||
#define M2P_CTMU_KEEP M2P_MESSAGE_ACCESS(12)
|
||||
#define M2P_RTC_KEEP M2P_MESSAGE_ACCESS(13)
|
||||
#define M2P_SF_MODE M2P_MESSAGE_ACCESS(14)
|
||||
#define M2P_DCV_MODE M2P_MESSAGE_ACCESS(15)
|
||||
#define M2P_LIGHT_PDOWN_DVDD_VOL M2P_MESSAGE_ACCESS(16)
|
||||
#define M2P_LRC24M_MODE M2P_MESSAGE_ACCESS(17)
|
||||
|
||||
//==================system===========================
|
||||
#define M2P_SYNC_CMD M2P_MESSAGE_ACCESS(25)
|
||||
#define M2P_WDT_SYNC M2P_MESSAGE_ACCESS(26)
|
||||
#define M2P_WAIT_RELEASE M2P_MESSAGE_ACCESS(27)
|
||||
|
||||
//==================clock===========================
|
||||
#define M2P_LRC24M_CFG0 M2P_MESSAGE_ACCESS(35)
|
||||
#define M2P_LRC24M_CFG1 M2P_MESSAGE_ACCESS(36)
|
||||
#define M2P_BTOSC_CFG0 M2P_MESSAGE_ACCESS(37)
|
||||
#define M2P_BTOSC_CFG1 M2P_MESSAGE_ACCESS(38)
|
||||
|
||||
#define M2P_LRC24M_FEQ0 M2P_MESSAGE_ACCESS(39)
|
||||
#define M2P_LRC24M_FEQ1 M2P_MESSAGE_ACCESS(40)
|
||||
#define M2P_LRC24M_FEQ2 M2P_MESSAGE_ACCESS(41)
|
||||
#define M2P_LRC24M_FEQ3 M2P_MESSAGE_ACCESS(42)
|
||||
|
||||
//==================lpctmu===========================
|
||||
/*触摸所有通道配置*/
|
||||
#define M2P_CTMU_CMD M2P_MESSAGE_ACCESS(50)
|
||||
#define M2P_CTMU_CH_ENABLE M2P_MESSAGE_ACCESS(51)
|
||||
#define M2P_CTMU_CH_WAKEUP_EN M2P_MESSAGE_ACCESS(52)
|
||||
#define M2P_CTMU_SCAN_TIME M2P_MESSAGE_ACCESS(53)
|
||||
#define M2P_CTMU_LOWPOER_SCAN_TIME M2P_MESSAGE_ACCESS(54)
|
||||
|
||||
/*
|
||||
* Must Sync to P11 code
|
||||
*/
|
||||
enum {
|
||||
M2P_LP_INDEX = 0,
|
||||
M2P_PF_INDEX,
|
||||
M2P_LLP_INDEX,
|
||||
M2P_P33_INDEX,
|
||||
M2P_SF_INDEX,
|
||||
M2P_CTMU_INDEX,
|
||||
M2P_CCMD_INDEX, //common cmd
|
||||
M2P_VAD_INDEX,
|
||||
M2P_USER_INDEX,
|
||||
M2P_WDT_INDEX,
|
||||
M2P_SYNC_INDEX,
|
||||
M2P_APP_INDEX,
|
||||
|
||||
};
|
||||
|
||||
enum {
|
||||
P2M_LP_INDEX = 0,
|
||||
P2M_PF_INDEX,
|
||||
P2M_LLP_INDEX,
|
||||
P2M_WK_INDEX,
|
||||
P2M_WDT_INDEX,
|
||||
P2M_LP_INDEX2,
|
||||
P2M_CTMU_INDEX,
|
||||
P2M_CTMU_POWUP,
|
||||
P2M_REPLY_CCMD_INDEX, //reply common cmd
|
||||
P2M_VAD_INDEX,
|
||||
P2M_USER_INDEX,
|
||||
P2M_BANK_INDEX,
|
||||
P2M_REPLY_SYNC_INDEX,
|
||||
P2M_APP_INDEX,
|
||||
P2M_OSC_INDEX,
|
||||
};
|
||||
|
||||
enum {
|
||||
CLOSE_P33_INTERRUPT = 1,
|
||||
OPEN_P33_INTERRUPT,
|
||||
LOWPOWER_PREPARE,
|
||||
M2P_SPIN_LOCK,
|
||||
M2P_SPIN_UNLOCK,
|
||||
P2M_SPIN_LOCK,
|
||||
P2M_SPIN_UNLOCK,
|
||||
|
||||
};
|
||||
|
||||
#include "power/lp_msg.h"
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,24 @@
|
||||
#ifndef __P11_API_H__
|
||||
#define __P11_API_H__
|
||||
|
||||
#define P11_P2M_INT_IE P11_SYSTEM->P2M_INT_IE
|
||||
#define P11_M2P_INT_IE P11_SYSTEM->M2P_INT_IE
|
||||
#define P11_M2P_INT_SET P11_SYSTEM->M2P_INT_SET
|
||||
#define P11_P2M_INT_SET P11_SYSTEM->P2M_INT_SET
|
||||
#define P11_P2M_INT_CLR P11_SYSTEM->P2M_INT_CLR
|
||||
#define P11_P2M_INT_PND P11_SYSTEM->P2M_INT_PND
|
||||
|
||||
enum P11_SYS_CLK_TABLE {
|
||||
P11_SYS_CLK_RC16M = 0,
|
||||
P11_SYS_CLK_RC250K,
|
||||
P11_SYS_CLK_LRC_OSC,
|
||||
P11_SYS_CLK_BTOSC_24M,
|
||||
P11_SYS_CLK_BTOSC_48M,
|
||||
P11_SYS_CLK_LRC24M,
|
||||
P11_SYS_CLK_CLK_X2,
|
||||
P11_SYS_CLK_TEST,
|
||||
};
|
||||
|
||||
void p11_sys_clk_sel(u32 sel);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,181 @@
|
||||
//*********************************************************************************//
|
||||
// Module name : csfr.h //
|
||||
// Description : q32small core sfr define //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
#ifndef __P11_Q32S_CSFR__
|
||||
#define __P11_Q32S_CSFR__
|
||||
|
||||
#define __RW volatile // read write
|
||||
#define __RO volatile const // only read
|
||||
#define __WO volatile // only write
|
||||
|
||||
#define __u8 unsigned int // u8 to u32 special for struct
|
||||
#define __u16 unsigned int // u16 to u32 special for struct
|
||||
#define __u32 unsigned int
|
||||
|
||||
#define CPU_CORE_NUM 1
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32small define
|
||||
//---------------------------------------------//
|
||||
|
||||
//#ifdef PMU_SYSTEM
|
||||
#if 0
|
||||
#define p11_q32s_sfr_base 0x00a000
|
||||
#define p11_q32s_sfr_offset 0x000000 // multi_core used
|
||||
#else
|
||||
#define p11_q32s_sfr_base 0xf2a000
|
||||
#define p11_q32s_sfr_offset 0x000000 // multi_core used
|
||||
#endif
|
||||
|
||||
#define p11_q32s_cpu_base (p11_q32s_sfr_base + 0x00)
|
||||
#define p11_q32s_mpu_base (p11_q32s_sfr_base + 0x80)
|
||||
|
||||
#define p11_q32s(n) ((JL_TypeDef_p11_q32s *)(p11_q32s_sfr_base + p11_q32s_sfr_offset*n))
|
||||
#define p11_q32s_mpu(n) ((JL_TypeDef_p11_q32s_MPU *)(p11_q32s_mpu_base + p11_q32s_sfr_offset*n))
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32small core sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
/* 00 */ __RO __u32 DR00;
|
||||
/* 01 */ __RO __u32 DR01;
|
||||
/* 02 */ __RO __u32 DR02;
|
||||
/* 03 */ __RO __u32 DR03;
|
||||
/* 04 */ __RO __u32 DR04;
|
||||
/* 05 */ __RO __u32 DR05;
|
||||
/* 06 */ __RO __u32 DR06;
|
||||
/* 07 */ __RO __u32 DR07;
|
||||
/* 08 */ __RO __u32 DR08;
|
||||
/* 09 */ __RO __u32 DR09;
|
||||
/* 0a */ __RO __u32 DR10;
|
||||
/* 0b */ __RO __u32 DR11;
|
||||
/* 0c */ __RO __u32 DR12;
|
||||
/* 0d */ __RO __u32 DR13;
|
||||
/* 0e */ __RO __u32 DR14;
|
||||
/* 0f */ __RO __u32 DR15;
|
||||
|
||||
/* 10 */ __RO __u32 RETI;
|
||||
/* 11 */ __RO __u32 RETE;
|
||||
/* 12 */ __RO __u32 RETX;
|
||||
/* 13 */ __RO __u32 RETS;
|
||||
/* 14 */ __RO __u32 SR04;
|
||||
/* 15 */ __RO __u32 PSR;
|
||||
/* 16 */ __RO __u32 CNUM;
|
||||
/* 17 */ __RO __u32 SR07;
|
||||
/* 18 */ __RO __u32 SR08;
|
||||
/* 19 */ __RO __u32 SR09;
|
||||
/* 1a */ __RO __u32 SR10;
|
||||
/* 1b */ __RO __u32 ICFG;
|
||||
/* 1c */ __RO __u32 USP;
|
||||
/* 1d */ __RO __u32 SSP;
|
||||
/* 1e */ __RO __u32 SP;
|
||||
/* 1f */ __RO __u32 PCRS;
|
||||
|
||||
/* 20 */ __RW __u32 BPCON;
|
||||
/* 21 */ __RW __u32 BSP;
|
||||
/* 22 */ __RW __u32 BP0;
|
||||
/* 23 */ __RW __u32 BP1;
|
||||
/* 24 */ __RW __u32 BP2;
|
||||
/* 25 */ __RW __u32 BP3;
|
||||
/* 26 */ __WO __u32 CMD_PAUSE;
|
||||
/* */ __RO __u32 REV_30_26[0x30 - 0x26 - 1];
|
||||
|
||||
/* 30 */ __RW __u32 PMU_CON0;
|
||||
/* 31 */ __RW __u32 PMU_CON1;
|
||||
/* 32 */ __RW __u32 RST_ADDR;
|
||||
/* */ __RO __u32 REV_3b_30[0x3b - 0x32 - 1];
|
||||
/* 3b */ __RW __u8 TTMR_CON;
|
||||
/* 3c */ __RW __u32 TTMR_CNT;
|
||||
/* 3d */ __RW __u32 TTMR_PRD;
|
||||
/* 3e */ __RW __u32 BANK_CON;
|
||||
/* 3f */ __RW __u32 BANK_NUM;
|
||||
|
||||
/* 40 */ __RW __u32 ICFG00;
|
||||
/* 41 */ __RW __u32 ICFG01;
|
||||
/* 42 */ __RW __u32 ICFG02;
|
||||
/* 43 */ __RW __u32 ICFG03;
|
||||
/* 44 */ __RW __u32 ICFG04;
|
||||
/* 45 */ __RW __u32 ICFG05;
|
||||
/* 46 */ __RW __u32 ICFG06;
|
||||
/* 47 */ __RW __u32 ICFG07;
|
||||
/* 48 */ __RW __u32 ICFG08;
|
||||
/* 49 */ __RW __u32 ICFG09;
|
||||
/* 4a */ __RW __u32 ICFG10;
|
||||
/* 4b */ __RW __u32 ICFG11;
|
||||
/* 4c */ __RW __u32 ICFG12;
|
||||
/* 4d */ __RW __u32 ICFG13;
|
||||
/* 4e */ __RW __u32 ICFG14;
|
||||
/* 4f */ __RW __u32 ICFG15;
|
||||
|
||||
/* 50 */ __RW __u32 ICFG16;
|
||||
/* 51 */ __RW __u32 ICFG17;
|
||||
/* 52 */ __RW __u32 ICFG18;
|
||||
/* 53 */ __RW __u32 ICFG19;
|
||||
/* 54 */ __RW __u32 ICFG20;
|
||||
/* 55 */ __RW __u32 ICFG21;
|
||||
/* 56 */ __RW __u32 ICFG22;
|
||||
/* 57 */ __RW __u32 ICFG23;
|
||||
/* 58 */ __RW __u32 ICFG24;
|
||||
/* 59 */ __RW __u32 ICFG25;
|
||||
/* 5a */ __RW __u32 ICFG26;
|
||||
/* 5b */ __RW __u32 ICFG27;
|
||||
/* 5c */ __RW __u32 ICFG28;
|
||||
/* 5d */ __RW __u32 ICFG29;
|
||||
/* 5e */ __RW __u32 ICFG30;
|
||||
/* 5f */ __RW __u32 ICFG31;
|
||||
|
||||
/* 60 */ __RO __u32 IPND0;
|
||||
/* 61 */ __RO __u32 IPND1;
|
||||
/* 62 */ __RO __u32 IPND2;
|
||||
/* 63 */ __RO __u32 IPND3;
|
||||
/* 64 */ __RO __u32 IPND4;
|
||||
/* 65 */ __RO __u32 IPND5;
|
||||
/* 66 */ __RO __u32 IPND6;
|
||||
/* 67 */ __RO __u32 IPND7;
|
||||
/* 68 */ __WO __u32 ILAT_SET;
|
||||
/* 69 */ __WO __u32 ILAT_CLR;
|
||||
/* 6a */ __RW __u32 IPMASK;
|
||||
/* 6b */ __RW __u32 GIEMASK;
|
||||
/* 6c */ __RW __u32 IWKUP_NUM;
|
||||
/* */ __RO __u32 REV_70_6c[0x70 - 0x6c - 1];
|
||||
|
||||
/* 70 */ __RW __u32 ETM_CON;
|
||||
/* 71 */ __RO __u32 ETM_PC0;
|
||||
/* 72 */ __RO __u32 ETM_PC1;
|
||||
/* 73 */ __RO __u32 ETM_PC2;
|
||||
/* 74 */ __RO __u32 ETM_PC3;
|
||||
/* 75 */ __RW __u32 WP0_ADRH;
|
||||
/* 76 */ __RW __u32 WP0_ADRL;
|
||||
/* 77 */ __RW __u32 WP0_DATH;
|
||||
/* 78 */ __RW __u32 WP0_DATL;
|
||||
/* 79 */ __RW __u32 WP0_PC;
|
||||
|
||||
/* */ __RO __u32 REV_80_79[0x80 - 0x79 - 1];
|
||||
/* 80 */ __RW __u32 EMU_CON;
|
||||
/* 81 */ __RW __u32 EMU_MSG;
|
||||
/* 82 */ __RO __u32 EMU_SSP_H;
|
||||
/* 83 */ __RO __u32 EMU_SSP_L;
|
||||
/* 84 */ __RO __u32 EMU_USP_H;
|
||||
/* 85 */ __RO __u32 EMU_USP_L;
|
||||
} JL_TypeDef_p11_q32s;
|
||||
|
||||
#undef __RW
|
||||
#undef __RO
|
||||
#undef __WO
|
||||
|
||||
#undef __u8
|
||||
#undef __u16
|
||||
#undef __u32
|
||||
|
||||
#endif
|
||||
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
@@ -0,0 +1,34 @@
|
||||
//===============================================================================//
|
||||
//
|
||||
// input IO define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define P11_PB0_IN 1
|
||||
#define P11_PB1_IN 2
|
||||
#define P11_PB2_IN 3
|
||||
#define P11_PB3_IN 4
|
||||
#define P11_PB4_IN 5
|
||||
#define P11_PB5_IN 6
|
||||
#define P11_PB6_IN 7
|
||||
#define P11_PB7_IN 8
|
||||
#define P11_PB8_IN 9
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// function input select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 P11_FI_GP_ICH0;
|
||||
__RW __u8 P11_FI_GP_ICH1;
|
||||
__RW __u8 P11_FI_GP_ICH2;
|
||||
__RW __u8 P11_FI_UART0_RX;
|
||||
__RW __u8 P11_FI_UART1_RX;
|
||||
__RW __u8 P11_FI_SPI_DI;
|
||||
__RW __u8 P11_FI_IIC_SCL;
|
||||
__RW __u8 P11_FI_IIC_SDA;
|
||||
} P11_IMAP_TypeDef;
|
||||
|
||||
#define P11_IMAP_BASE (p11_sfr_base + map_adr(0x17, 0x00))
|
||||
#define P11_IMAP ((P11_IMAP_TypeDef *)P11_IMAP_BASE)
|
||||
|
||||
@@ -0,0 +1,35 @@
|
||||
//===============================================================================//
|
||||
//
|
||||
// output function define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define P11_FO_GP_OCH0 ((0 << 2)|BIT(1))
|
||||
#define P11_FO_GP_OCH1 ((1 << 2)|BIT(1))
|
||||
#define P11_FO_GP_OCH2 ((2 << 2)|BIT(1))
|
||||
#define P11_FO_UART0_TX ((3 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_UART1_TX ((4 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_SPI_CLK ((5 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_SPI_DO ((6 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_IIC_SCL ((7 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_IIC_SDA ((8 << 2)|BIT(1)|BIT(0))
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// IO output select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 P11_PB0_OUT;
|
||||
__RW __u8 P11_PB1_OUT;
|
||||
__RW __u8 P11_PB2_OUT;
|
||||
__RW __u8 P11_PB3_OUT;
|
||||
__RW __u8 P11_PB4_OUT;
|
||||
__RW __u8 P11_PB5_OUT;
|
||||
__RW __u8 P11_PB6_OUT;
|
||||
__RW __u8 P11_PB7_OUT;
|
||||
__RW __u8 P11_PB8_OUT;
|
||||
} P11_OMAP_TypeDef;
|
||||
|
||||
#define P11_OMAP_BASE (p11_sfr_base + map_adr(0x16, 0x00))
|
||||
#define P11_OMAP ((P11_OMAP_TypeDef *)P11_OMAP_BASE)
|
||||
|
||||
@@ -0,0 +1,50 @@
|
||||
#ifndef __P11_MMAP_H__
|
||||
#define __P11_MMAP_H__
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////
|
||||
//#ifdef PMU_SYSTEM
|
||||
#if 0
|
||||
#define P11_RAM_BASE 0
|
||||
#else
|
||||
#define P11_RAM_BASE 0xF20000
|
||||
#endif
|
||||
#define P11_RAM_BEGIN (P11_RAM_BASE)
|
||||
#define P11_RAM_SIZE (0x8000)
|
||||
#define P11_RAM_END (P11_RAM_BASE+P11_RAM_SIZE)
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////
|
||||
#define MSYS_POFF_RAM_END P11_RAM_END
|
||||
#define MSYS_POFF_RAM_SIZE 0x20
|
||||
#define MSYS_POFF_RAM_BEGIN (MSYS_POFF_RAM_END - MSYS_POFF_RAM_SIZE)
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////
|
||||
#define M2P_MESSAGE_END MSYS_POFF_RAM_BEGIN
|
||||
#define M2P_MESSAGE_SIZE 0xe0
|
||||
#define M2P_MESSAGE_RAM_BEGIN (M2P_MESSAGE_END - M2P_MESSAGE_SIZE)
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////
|
||||
#define P2M_MESSAGE_END M2P_MESSAGE_RAM_BEGIN
|
||||
#define P2M_MESSAGE_SIZE 0x40
|
||||
#define P2M_MESSAGE_RAM_BEGIN (P2M_MESSAGE_END - P2M_MESSAGE_SIZE)
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////
|
||||
#define P11_RAM0_END P2M_MESSAGE_RAM_BEGIN
|
||||
#define P11_RAM0_BEGIN (P11_RAM_BASE+P11_ISR_SIZE)
|
||||
#define P11_RAM0_SIZE (P11_RAM0_END - P11_RAM0_BEGIN)
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////
|
||||
#define P11_ISR_END P11_RAM0_BEGIN
|
||||
#define P11_ISR_SIZE 0x80
|
||||
#define P11_ISR_BEGIN P11_RAM_BASE
|
||||
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
#define P11_RAM_ACCESS(x) (*(volatile u8 *)(x))
|
||||
#define M2P_MESSAGE_ACCESS(x) P11_RAM_ACCESS(M2P_MESSAGE_RAM_BEGIN + x)
|
||||
#define P2M_MESSAGE_ACCESS(x) P11_RAM_ACCESS(P2M_MESSAGE_RAM_BEGIN + x)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,332 @@
|
||||
#ifndef __P11_SFR_H__
|
||||
#define __P11_SFR_H__
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// sfr define
|
||||
//
|
||||
//===============================================================================//
|
||||
|
||||
//#ifdef PMU_SYSTEM
|
||||
#if 0
|
||||
#define p11_base 0x000000
|
||||
#define p11_ram_base p11_base
|
||||
#define p11_sfr_base 0x00a000
|
||||
#else
|
||||
#define p11_base 0xf20000
|
||||
#define p11_ram_base p11_base
|
||||
#define p11_sfr_base 0xf2a000
|
||||
#endif
|
||||
|
||||
#define __RW volatile // read write
|
||||
#define __RO volatile const // only read
|
||||
#define __WO volatile // only write
|
||||
|
||||
#define __u8 unsigned int // u8 to u32 special for struct
|
||||
#define __u16 unsigned int // u16 to u32 special for struct
|
||||
#define __u32 unsigned int
|
||||
|
||||
#define __s8(x) char(x); char(reserved_1_##x); char(reserved_2_##x); char(reserved_3_##x)
|
||||
#define __s16(x) short(x); short(reserved_1_##x)
|
||||
#define __s32(x) int(x)
|
||||
|
||||
#define map_adr(grp, adr) ((64 * grp + adr) * 4) // grp(0x0-0xff), adr(0x0-0x3f)
|
||||
#define P11_ACCESS(x) (*(volatile u32 *)(p11_base + x))
|
||||
#define P11_RAM(x) (*(volatile u32 *)(p11_ram_base + x))
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// sfr address define
|
||||
//
|
||||
//===============================================================================//
|
||||
|
||||
//............. 0x0000 - 0x03ff............ for cpu
|
||||
|
||||
// #include ../core/csfr.h
|
||||
|
||||
//............. 0x0400 - 0x04ff............ for clock
|
||||
typedef struct {
|
||||
__RW __u32 PWR_CON;
|
||||
__RW __u32 RST_SRC;
|
||||
__RW __u32 WKUP_EN;
|
||||
__RW __u32 WKUP_SRC;
|
||||
__RW __u32 SYS_DIV;
|
||||
__RW __u32 CLK_CON0;
|
||||
__RW __u32 CLK_CON1;
|
||||
__RW __u32 CLK_CON2;
|
||||
__RW __u32 XOSC_CFG0;
|
||||
__RW __u32 XOSC_CFG1;
|
||||
__RW __u32 LRC24M_CFG0;
|
||||
__RW __u32 CLKCFG_CFG0;
|
||||
} P11_CLOCK_TypeDef;
|
||||
|
||||
#define P11_CLOCK_BASE (p11_sfr_base + map_adr(0x04, 0x00))
|
||||
#define P11_CLOCK ((P11_CLOCK_TypeDef *)P11_CLOCK_BASE)
|
||||
|
||||
#define P11_PWR_CON P11_CLOCK->PWR_CON
|
||||
#define P11_CLK_CON0 P11_CLOCK->CLK_CON0
|
||||
|
||||
|
||||
//............. 0x0600 - 0x06ff............ for system
|
||||
typedef struct {
|
||||
__RW __u32 P2M_INT_IE;
|
||||
__RW __u32 P2M_INT_SET;
|
||||
__RW __u32 P2M_INT_CLR;
|
||||
__RO __u32 P2M_INT_PND;
|
||||
__RW __u32 P2M_CLK_CON0;
|
||||
__RW __u32 M2P_INT_IE;
|
||||
__RW __u32 M2P_INT_SET;
|
||||
__RW __u32 M2P_INT_CLR;
|
||||
__RO __u32 M2P_INT_PND;
|
||||
__RW __u32 P11_SYS_CON0;
|
||||
__RW __u32 P11_SYS_CON1;
|
||||
__RW __u32 PMU_KEY;
|
||||
} P11_SYSTEM_TypeDef;
|
||||
|
||||
#define P11_SYSTEM_BASE (p11_sfr_base + map_adr(0x06, 0x00))
|
||||
#define P11_SYSTEM ((P11_SYSTEM_TypeDef *)P11_SYSTEM_BASE)
|
||||
|
||||
//............. 0x0700 - 0x07ff............ for mbist
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 SEL;
|
||||
__RW __u32 BEG;
|
||||
__RW __u32 END;
|
||||
__RW __u32 DAT_VLD0;
|
||||
__RW __u32 DAT_VLD1;
|
||||
__RW __u32 DAT_VLD2;
|
||||
__RW __u32 DAT_VLD3;
|
||||
__RO __u32 ROM_CRC;
|
||||
__RW __u32 MCFG0_RF1P;
|
||||
__RW __u32 MCFG0_RF2P;
|
||||
__RW __u32 MCFG0_RM1P;
|
||||
__RW __u32 MCFG0_RM2P;
|
||||
__RW __u32 MCFG0_VROM;
|
||||
__RW __u32 MCFG0_CON[3];
|
||||
} P11_MBIST_TypeDef;
|
||||
|
||||
#define P11_MBIST_BASE (p11_sfr_base + map_adr(0x07, 0x00))
|
||||
#define P11_MBIST ((P11_MBIST_TypeDef *)P11_MBIST_BASE)
|
||||
|
||||
//............. 0x0800 - 0x08ff............ for watch dog
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 KEY;
|
||||
__RW __u32 DUMMY;
|
||||
} P11_WDT_TypeDef;
|
||||
|
||||
#define P11_WDT_BASE (p11_sfr_base + map_adr(0x08, 0x00))
|
||||
#define P11_WDT ((P11_WDT_TypeDef *)P11_WDT_BASE)
|
||||
|
||||
#define P11_SIM_END P11_WDT->DUMMY
|
||||
|
||||
//............. 0x0900 - 0x0cff............ for lp timer
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
__RW __u32 PRD;
|
||||
__RW __u32 RSC;
|
||||
__RO __u32 CNT;
|
||||
} P11_LPTMR_TypeDef;
|
||||
|
||||
#define P11_LPTMR0_BASE (p11_sfr_base + map_adr(0x09, 0x00))
|
||||
#define P11_LPTMR1_BASE (p11_sfr_base + map_adr(0x0a, 0x00))
|
||||
#define P11_LPTMR2_BASE (p11_sfr_base + map_adr(0x0b, 0x00))
|
||||
#define P11_LPTMR3_BASE (p11_sfr_base + map_adr(0x0c, 0x00))
|
||||
|
||||
#define P11_LPTMR0 ((P11_LPTMR_TypeDef *)P11_LPTMR0_BASE)
|
||||
#define P11_LPTMR1 ((P11_LPTMR_TypeDef *)P11_LPTMR1_BASE)
|
||||
#define P11_LPTMR2 ((P11_LPTMR_TypeDef *)P11_LPTMR2_BASE)
|
||||
#define P11_LPTMR3 ((P11_LPTMR_TypeDef *)P11_LPTMR3_BASE)
|
||||
|
||||
//............. 0x0d00 - 0x0dff............ for irflt
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
} P11_IRFLT_TypeDef;
|
||||
|
||||
#define P11_IRFLT_BASE (p11_sfr_base + map_adr(0x0d, 0x00))
|
||||
#define P11_IRFLT ((P11_IRFLT_TypeDef *)P11_IRFLT_BASE)
|
||||
|
||||
//............. 0x0e00 - 0x0eff............ for spi
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 BAUD;
|
||||
__RW __u32 BUF;
|
||||
__WO __u32 ADR;
|
||||
__RW __u32 CNT;
|
||||
__RW __u32 CON1;
|
||||
} P11_SPI_TypeDef;
|
||||
|
||||
#define P11_SPI_BASE (p11_sfr_base + map_adr(0x0e, 0x00))
|
||||
#define P11_SPI ((P11_SPI_TypeDef *)P11_SPI_BASE)
|
||||
|
||||
//............. 0x0f00 - 0x10ff............ for uart
|
||||
typedef struct {
|
||||
__RW __u16 CON0;
|
||||
__RW __u16 CON1;
|
||||
__RW __u16 CON2;
|
||||
__RW __u16 BAUD;
|
||||
__RW __u8 BUF;
|
||||
__RW __u32 OTCNT;
|
||||
//__RW __u32 TXADR;
|
||||
//__WO __u16 TXCNT;
|
||||
//__RW __u32 RXSADR;
|
||||
//__RW __u32 RXEADR;
|
||||
//__RW __u32 RXCNT;
|
||||
//__RO __u16 HRXCNT;
|
||||
//__RO __u16 RX_ERR_CNT;
|
||||
} P11_UART_TypeDef;
|
||||
|
||||
#define P11_UART0_BASE (p11_sfr_base + map_adr(0x0f, 0x00))
|
||||
#define P11_UART1_BASE (p11_sfr_base + map_adr(0x10, 0x00))
|
||||
|
||||
#define P11_UART0 ((P11_UART_TypeDef *)P11_UART0_BASE)
|
||||
#define P11_UART1 ((P11_UART_TypeDef *)P11_UART1_BASE)
|
||||
|
||||
//............. 0x1100 - 0x11ff............ for iic
|
||||
typedef struct {
|
||||
__RW __u32 CON ;
|
||||
__RW __u32 PND ;
|
||||
__RW __u32 TX_BUF ;
|
||||
__RW __u32 TASK ;
|
||||
__RO __u32 RX_BUF ;
|
||||
__RW __u32 ADDR ;
|
||||
__RW __u32 BAUD ;
|
||||
__RW __u32 TSU ;
|
||||
__RW __u32 THD ;
|
||||
__RO __u32 DBG ;
|
||||
} P11_IIC_TypeDef;
|
||||
|
||||
#define P11_IIC_BASE (p11_sfr_base + map_adr(0x11, 0x00))
|
||||
#define P11_IIC ((P11_IIC_TypeDef *)P11_IIC_BASE)
|
||||
|
||||
//............. 0x1200 - 0x12ff............ for port
|
||||
typedef struct {
|
||||
__RW __u32 OCH_CON0 ;
|
||||
__RW __u32 ICH_CON0 ;
|
||||
__RW __u32 P33_PORT ;
|
||||
__RW __u32 PB_SEL ;
|
||||
__RO __u32 PB_IN ;
|
||||
__RW __u32 PB_OUT ;
|
||||
__RW __u32 PB_DIR ;
|
||||
__RW __u32 PB_DIE ;
|
||||
__RW __u32 PB_DIEH ;
|
||||
__RW __u32 PB_PU0 ;
|
||||
__RW __u32 PB_PU1 ;
|
||||
__RW __u32 PB_PD0 ;
|
||||
__RW __u32 PB_PD1 ;
|
||||
__RW __u32 PB_HD0 ;
|
||||
__RW __u32 PB_HD1 ;
|
||||
__RW __u32 PB_SPL ;
|
||||
} P11_PORT_TypeDef;
|
||||
|
||||
#define P11_PORT_BASE (p11_sfr_base + map_adr(0x12, 0x00))
|
||||
#define P11_PORT ((P11_PORT_TypeDef *)P11_PORT_BASE)
|
||||
|
||||
//............. 0x1300 - 0x14ff............ for lp ctmu
|
||||
typedef struct {
|
||||
__RW __u32 CON0 ;
|
||||
__RW __u32 CHEN ;
|
||||
__RW __u32 CNUM ;
|
||||
__RW __u32 PPRD ;
|
||||
__RW __u32 DPRD ;
|
||||
__RW __u32 ECON ;
|
||||
__RW __u32 EXEN ;
|
||||
__RW __u32 CHIS ;
|
||||
__RW __u32 CLKC ;
|
||||
__WO __u32 WCON ;
|
||||
__RW __u32 ANA0 ;
|
||||
__RW __u32 ANA1 ;
|
||||
__RO __u32 RES ;
|
||||
__RW __u32 DMA_START_ADR;
|
||||
__RW __u32 DMA_HALF_ADR;
|
||||
__RW __u32 DMA_END_ADR;
|
||||
__RW __u32 DMA_CON;
|
||||
__RW __u32 MSG_CON;
|
||||
__RO __u32 DMA_WADR;
|
||||
__RW __u32 SLEEP_CON;
|
||||
} P11_LPCTM_TypeDef;
|
||||
|
||||
#define P11_LPCTM0_BASE (p11_sfr_base + map_adr(0x13, 0x00))
|
||||
#define P11_LPCTM0 ((P11_LPCTM_TypeDef *)P11_LPCTM0_BASE)
|
||||
|
||||
// #define P11_LPCTM1_BASE (p11_sfr_base + map_adr(0x14, 0x00))
|
||||
// #define P11_LPCTM1 ((P11_LPCTM_TypeDef *)P11_LPCTM1_BASE)
|
||||
|
||||
|
||||
//............. 0x1500 - 0x15ff............ for lpvad
|
||||
typedef struct {
|
||||
__RW __u32 VAD_CON;
|
||||
__RW __u32 VAD_ACON0;
|
||||
__RW __u32 VAD_ACON1;
|
||||
__RW __u32 AVAD_CON;
|
||||
__RW __u32 AVAD_DATA;
|
||||
__RW __u32 DVAD_CON0;
|
||||
__RW __u32 DVAD_CON1;
|
||||
__RW __u32 DMA_BADR;
|
||||
__RW __u32 DMA_LEN;
|
||||
__RW __u32 DMA_HPTR;
|
||||
__RW __u32 DMA_SPTR;
|
||||
__RW __u32 DMA_SPN;
|
||||
__RW __u32 DMA_SHN;
|
||||
} P11_LPVAD_TypeDef;
|
||||
|
||||
#define P11_LPVAD_BASE (p11_sfr_base + map_adr(0x15, 0x00))
|
||||
#define P11_LPVAD ((P11_LPVAD_TypeDef *)P11_LPVAD_BASE)
|
||||
|
||||
//............. 0x1600 - 0x17ff............ for crossbar
|
||||
#include "p11_io_omap.h"
|
||||
#include "p11_io_imap.h"
|
||||
|
||||
//............. 0x1800 - 0x19ff............ for gp timer
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 CNT;
|
||||
__RW __u32 PRD;
|
||||
__RW __u32 PWM;
|
||||
__RW __u32 IRFLT;
|
||||
} P11_GPTMR_TypeDef;
|
||||
|
||||
#define P11_GPTMR0_BASE (p11_sfr_base + map_adr(0x18, 0x00))
|
||||
#define P11_GPTMR1_BASE (p11_sfr_base + map_adr(0x18, 0x05))
|
||||
|
||||
#define P11_GPTMR0 ((P11_GPTMR_TypeDef *)P11_GPTMR0_BASE)
|
||||
#define P11_GPTMR1 ((P11_GPTMR_TypeDef *)P11_GPTMR1_BASE)
|
||||
|
||||
//............. 0x1a00 - 0x1aff............ for NFC
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
__RW __u32 CON3;
|
||||
__RW __u32 BUF0;
|
||||
__RW __u32 BUF1;
|
||||
__RW __u32 BUF2;
|
||||
__RW __u32 BUF3;
|
||||
} P11_NFC_TypeDef;
|
||||
|
||||
#define P11_NFC_BASE (p11_sfr_base + map_adr(0x1a, 0x00))
|
||||
#define P11_NFC ((P11_NFC_TypeDef *)P11_NFC_BASE)
|
||||
|
||||
|
||||
//............. 0x1b00 - 0x1bff............ for RESLOCK
|
||||
typedef struct {
|
||||
__RW __u32 LOCK[16];
|
||||
} P11_RESLOCK_TypeDef;
|
||||
|
||||
#define P11_RESLOCK_BASE (p11_sfr_base + map_adr(0x1b,0x00))
|
||||
#define P11_RESLOCK ((P11_RESLOCK_TypeDef *)P11_RESLOCK_BASE)
|
||||
|
||||
|
||||
//............. 0x1c00 - 0x1cff............ for lp_gpcnt0
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RO __u32 NUM;
|
||||
} P11_GPCNT_TypeDef;
|
||||
|
||||
#define P11_GPCNT0_BASE (p11_sfr_base + map_adr(0x1c, 0x00))
|
||||
#define P11_GPCNT0 ((P11_GPCNT_TypeDef *)P11_GPCNT0_BASE)
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,77 @@
|
||||
#ifndef __CHARGE_HW_H__
|
||||
#define __CHARGE_HW_H__
|
||||
/************************P3_ANA_MFIX*****************************/
|
||||
#define PMU_MFIXI_SET_1(en) p33_fast_access(P3_ANA_MFIX, BIT(1), en)
|
||||
|
||||
/************************P3_CHG_CON0*****************************/
|
||||
#define CHARGE_EN(en) p33_fast_access(P3_CHG_CON0, BIT(0), en)
|
||||
|
||||
#define CHGGO_EN(en) p33_fast_access(P3_CHG_CON0, BIT(1), en)
|
||||
|
||||
#define IS_CHARGE_EN() ((P33_CON_GET(P3_CHG_CON0) & BIT(0)) ? 1: 0 )
|
||||
|
||||
#define CHG_HV_MODE(mode) p33_fast_access(P3_CHG_CON0, BIT(2), mode)
|
||||
|
||||
#define CHG_TRICKLE_EN(en) p33_fast_access(P3_CHG_CON0, BIT(3), en)
|
||||
|
||||
#define CHG_CCLOOP_EN(en) p33_fast_access(P3_CHG_CON0, BIT(4), en)
|
||||
|
||||
#define CHG_VILOOP_EN(en) p33_fast_access(P3_CHG_CON0, BIT(5), en)
|
||||
|
||||
#define CHG_VILOOP2_EN(en) p33_fast_access(P3_CHG_CON0, BIT(6), en)
|
||||
|
||||
#define CHG_VINLOOP_SLT(sel) p33_fast_access(P3_CHG_CON0, BIT(7), sel)
|
||||
|
||||
/************************P3_CHG_CON1*****************************/
|
||||
#define CHARGE_mA_SEL(a) P33_CON_SET(P3_CHG_CON1, 0, 4, a)
|
||||
|
||||
/************************P3_CHG_CON2*****************************/
|
||||
#define CHARGE_FULL_V_SEL(a) P33_CON_SET(P3_CHG_CON2, 4, 4, a)
|
||||
|
||||
/************************P3_CHG_CON3*****************************/
|
||||
#define CHARGE_FOLLOWC_SLT(en) p33_fast_access(P3_CHG_CON3, BIT(3), en)
|
||||
|
||||
enum {
|
||||
CHARGE_DET_VOL_365V,
|
||||
CHARGE_DET_VOL_375V,
|
||||
CHARGE_DET_VOL_385V,
|
||||
CHARGE_DET_VOL_395V,
|
||||
};
|
||||
#define CHARGE_DET_VOL(a) P33_CON_SET(P3_CHG_CON3, 1, 2, a)
|
||||
|
||||
#define CHARGE_DET_EN(en) p33_fast_access(P3_CHG_CON3, BIT(0), en)
|
||||
|
||||
/************************P3_CHG_CON4*****************************/
|
||||
#define CHGI_TRIM_SEL(a) P33_CON_SET(P3_CHG_CON4, 0, 4, a)
|
||||
|
||||
/************************P3_VPWR_CON0*****************************/
|
||||
#define L5V_IO_MODE(a) p33_fast_access(P3_VPWR_CON0, BIT(2), a)
|
||||
|
||||
#define IS_L5V_LOAD_EN() ((P33_CON_GET(P3_VPWR_CON0) & BIT(0)) ? 1: 0)
|
||||
|
||||
#define L5V_LOAD_EN(a) p33_fast_access(P3_VPWR_CON0, BIT(0), a)
|
||||
|
||||
/************************P3_VPWR_CON1*****************************/
|
||||
#define L5V_RES_DET_S_SEL(a) P33_CON_SET(P3_VPWR_CON1, 0, 2, a)
|
||||
|
||||
#define GET_L5V_RES_DET_S_SEL() (P33_CON_GET(P3_VPWR_CON1) & 0x03)
|
||||
|
||||
/************************P3_ANA_FLOW2*****************************/
|
||||
#define PMU_NVDC_EN(a) p33_fast_access(P3_ANA_FLOW2, BIT(4), a)
|
||||
|
||||
/************************P3_AWKUP_LEVEL*****************************/
|
||||
#define VBAT_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(2)) ? 1: 0)
|
||||
|
||||
#define LVCMP_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(1)) ? 1: 0)
|
||||
|
||||
#define LDO5V_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(0)) ? 1: 0)
|
||||
|
||||
/************************P3_ANA_READ*****************************/
|
||||
#define VBAT_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(0)) ? 1: 0 )
|
||||
|
||||
#define LVCMP_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(1)) ? 1: 0 )
|
||||
|
||||
#define LDO5V_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(2)) ? 1: 0 )
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
#ifndef __P33_ACCESS_H__
|
||||
#define __P33_ACCESS_H__
|
||||
|
||||
//
|
||||
//
|
||||
// for p33 access
|
||||
//
|
||||
//
|
||||
//
|
||||
/**************************************************************/
|
||||
|
||||
//ROM
|
||||
u8 p33_buf(u8 buf);
|
||||
|
||||
#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0); asm volatile ("csync")
|
||||
//#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0)
|
||||
// #define p33_xor_1byte(addr, data0) addr ^= (data0)
|
||||
|
||||
#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0); asm volatile ("csync")
|
||||
//#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0)
|
||||
// #define p33_or_1byte(addr, data0) addr |= (data0)
|
||||
|
||||
#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0)); asm volatile ("csync")
|
||||
//#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0))
|
||||
//#define p33_and_1byte(addr, data0) addr &= (data0)
|
||||
|
||||
// void p33_tx_1byte(u16 addr, u8 data0);
|
||||
#define p33_tx_1byte(addr, data0) addr = data0
|
||||
|
||||
// u8 p33_rx_1byte(u16 addr);
|
||||
#define p33_rx_1byte(addr) addr
|
||||
|
||||
#define P33_CON_SET(sfr, start, len, data) (sfr = (sfr & ~((~(0xff << (len))) << (start))) | \
|
||||
(((data) & (~(0xff << (len)))) << (start)))
|
||||
|
||||
#define P33_CON_GET(sfr) (sfr)
|
||||
|
||||
#if 1
|
||||
|
||||
#define p33_fast_access(reg, data, en) \
|
||||
{ \
|
||||
if (en) { \
|
||||
p33_or_1byte(reg, (data)); \
|
||||
} else { \
|
||||
p33_and_1byte(reg, (u8)~(data)); \
|
||||
} \
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define p33_fast_access(reg, data, en) \
|
||||
{ \
|
||||
if (en) { \
|
||||
reg |= (data); \
|
||||
} else { \
|
||||
reg &= ~(data); \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,249 @@
|
||||
#ifndef __P33_API_H__
|
||||
#define __P33_API_H__
|
||||
|
||||
|
||||
//
|
||||
//
|
||||
// vol
|
||||
//
|
||||
//
|
||||
//
|
||||
/****************************************************************/
|
||||
|
||||
enum DVDD_VOL {
|
||||
DVDD_VOL_0840MV = 0,
|
||||
DVDD_VOL_0870MV,
|
||||
DVDD_VOL_0900MV,
|
||||
DVDD_VOL_0930MV,
|
||||
DVDD_VOL_0960MV,
|
||||
DVDD_VOL_0990MV,
|
||||
DVDD_VOL_1020MV,
|
||||
DVDD_VOL_1050MV,
|
||||
DVDD_VOL_1080MV,
|
||||
DVDD_VOL_1110MV,
|
||||
DVDD_VOL_1140MV,
|
||||
DVDD_VOL_1170MV,
|
||||
DVDD_VOL_1200MV,
|
||||
DVDD_VOL_1230MV,
|
||||
DVDD_VOL_1260MV,
|
||||
DVDD_VOL_1290MV,
|
||||
};
|
||||
|
||||
/*enum DVDD2_VOL {*/
|
||||
/*};*/
|
||||
|
||||
/*enum RVDD_VOL {*/
|
||||
/*};*/
|
||||
|
||||
/*enum RVDD2_VOL {*/
|
||||
/*};*/
|
||||
|
||||
/*enum BTVDD_VOL {*/
|
||||
/*};*/
|
||||
|
||||
enum DCVDD_VOL {
|
||||
DCVDD_VOL_1000MV = 0,
|
||||
DCVDD_VOL_1050MV,
|
||||
DCVDD_VOL_1100MV,
|
||||
DCVDD_VOL_1150MV,
|
||||
DCVDD_VOL_1200MV,
|
||||
DCVDD_VOL_1250MV,
|
||||
DCVDD_VOL_1300MV,
|
||||
DCVDD_VOL_1350MV,
|
||||
DCVDD_VOL_1400MV,
|
||||
DCVDD_VOL_1450MV,
|
||||
DCVDD_VOL_1500MV,
|
||||
DCVDD_VOL_1550MV,
|
||||
DCVDD_VOL_1600MV,
|
||||
};
|
||||
|
||||
enum VDDIOM_VOL {
|
||||
VDDIOM_VOL_21V = 0,
|
||||
VDDIOM_VOL_22V,
|
||||
VDDIOM_VOL_23V,
|
||||
VDDIOM_VOL_24V,
|
||||
VDDIOM_VOL_25V,
|
||||
VDDIOM_VOL_26V,
|
||||
VDDIOM_VOL_27V,
|
||||
VDDIOM_VOL_28V,
|
||||
VDDIOM_VOL_29V,
|
||||
VDDIOM_VOL_30V,
|
||||
VDDIOM_VOL_31V,
|
||||
VDDIOM_VOL_32V,
|
||||
VDDIOM_VOL_33V,
|
||||
VDDIOM_VOL_34V,
|
||||
VDDIOM_VOL_35V,
|
||||
VDDIOM_VOL_36V,
|
||||
};
|
||||
|
||||
enum VDDIOW_VOL {
|
||||
VDDIOW_VOL_21V = 0,
|
||||
VDDIOW_VOL_22V,
|
||||
VDDIOW_VOL_23V,
|
||||
VDDIOW_VOL_24V,
|
||||
VDDIOW_VOL_25V,
|
||||
VDDIOW_VOL_26V,
|
||||
VDDIOW_VOL_27V,
|
||||
VDDIOW_VOL_28V,
|
||||
VDDIOW_VOL_29V,
|
||||
VDDIOW_VOL_30V,
|
||||
VDDIOW_VOL_31V,
|
||||
VDDIOW_VOL_32V,
|
||||
VDDIOW_VOL_33V,
|
||||
VDDIOW_VOL_34V,
|
||||
VDDIOW_VOL_35V,
|
||||
VDDIOW_VOL_36V,
|
||||
};
|
||||
|
||||
enum WVDD_VOL {
|
||||
WVDD_VOL_0500MV = 0,
|
||||
WVDD_VOL_0550MV,
|
||||
WVDD_VOL_0600MV,
|
||||
WVDD_VOL_0650MV,
|
||||
WVDD_VOL_0700MV,
|
||||
WVDD_VOL_0750MV,
|
||||
WVDD_VOL_0800MV,
|
||||
WVDD_VOL_0850MV,
|
||||
WVDD_VOL_0900MV,
|
||||
WVDD_VOL_0950MV,
|
||||
WVDD_VOL_1000MV,
|
||||
WVDD_VOL_1050MV,
|
||||
WVDD_VOL_1100MV,
|
||||
WVDD_VOL_1150MV,
|
||||
WVDD_VOL_1200MV,
|
||||
WVDD_VOL_1250MV,
|
||||
};
|
||||
|
||||
enum PVDD_VOL {
|
||||
PVDD_VOL_0500MV = 0,
|
||||
PVDD_VOL_0550MV,
|
||||
PVDD_VOL_0600MV,
|
||||
PVDD_VOL_0650MV,
|
||||
PVDD_VOL_0700MV,
|
||||
PVDD_VOL_0750MV,
|
||||
PVDD_VOL_0800MV,
|
||||
PVDD_VOL_0850MV,
|
||||
PVDD_VOL_0900MV,
|
||||
PVDD_VOL_0950MV,
|
||||
PVDD_VOL_1000MV,
|
||||
PVDD_VOL_1050MV,
|
||||
PVDD_VOL_1100MV,
|
||||
PVDD_VOL_1150MV,
|
||||
PVDD_VOL_1200MV,
|
||||
PVDD_VOL_1250MV,
|
||||
};
|
||||
|
||||
void dvdd_vol_sel(enum DVDD_VOL vol);
|
||||
enum DVDD_VOL get_dvdd_vol_sel();
|
||||
/*void dvdd2_vol_sel(enum DVDD2_VOL vol);*/
|
||||
/*enum DVDD2_VOL get_dvdd2_vol_sel();*/
|
||||
|
||||
/*void rvdd_vol_sel(enum RVDD_VOL vol);*/
|
||||
/*enum RVDD_VOL get_rvdd_vol_sel();*/
|
||||
/*void rvdd2_vol_sel(enum RVDD2_VOL vol);*/
|
||||
/*enum RVDD2_VOL get_rvdd2_vol_sel();*/
|
||||
|
||||
void dcvdd_vol_sel(enum DCVDD_VOL vol);
|
||||
enum DCVDD_VOL get_dcvdd_vol_sel();
|
||||
|
||||
/*void btvdd_vol_sel(enum BTVDD_VOL vol);*/
|
||||
/*enum BTVDD_VOL get_btvdd_vol_sel();*/
|
||||
|
||||
void pvdd_config(u32 lev, u32 low_lev, u32 output);
|
||||
void pvdd_output(u32 output);
|
||||
|
||||
void vddiom_vol_sel(enum VDDIOM_VOL vol);
|
||||
enum VDDIOM_VOL get_vddiom_vol_sel();
|
||||
void vddiow_vol_sel(enum VDDIOW_VOL vol);
|
||||
enum VDDIOW_VOL get_vddiow_vol_sel();
|
||||
u32 get_vddiom_vol();
|
||||
|
||||
//
|
||||
//
|
||||
// lvd
|
||||
//
|
||||
//
|
||||
//
|
||||
/****************************************************************/
|
||||
typedef enum {
|
||||
LVD_RESET_MODE, //复位模式
|
||||
LVD_EXCEPTION_MODE, //异常模式，进入异常中断
|
||||
LVD_WAKEUP_MODE, //唤醒模式，进入唤醒中断，callback参数为回调函数
|
||||
} LVD_MODE;
|
||||
|
||||
typedef enum {
|
||||
VLVD_SEL_166V = 0,
|
||||
VLVD_SEL_177V,
|
||||
VLVD_SEL_188V,
|
||||
VLVD_SEL_199V,
|
||||
VLVD_SEL_210V,
|
||||
VLVD_SEL_221V,
|
||||
VLVD_SEL_232V,
|
||||
VLVD_SEL_243V,
|
||||
VLVD_SEL_254V,
|
||||
VLVD_SEL_265V,
|
||||
VLVD_SEL_276V,
|
||||
VLVD_SEL_287V,
|
||||
VLVD_SEL_298V,
|
||||
VLVD_SEL_309V,
|
||||
VLVD_SEL_320V,
|
||||
VLVD_SEL_331V,
|
||||
} LVD_VOL;
|
||||
|
||||
void lvd_en(u8 en);
|
||||
void lvd_config(LVD_VOL vol, u8 expin_en, LVD_MODE mode, void (*callback));
|
||||
|
||||
//
|
||||
//
|
||||
// pinr
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
void gpio_longpress_pin0_reset_config(u32 pin, u32 level, u32 time, u32 release, u32 pull_enable, u32 latch_en);
|
||||
void gpio_longpress_pin1_reset_config(u32 pin, u32 level, u32 time, u32 release);
|
||||
|
||||
|
||||
|
||||
//
|
||||
//
|
||||
// dcdc
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
enum POWER_MODE {
|
||||
//LDO模式
|
||||
PWR_LDO15,
|
||||
//DCDC模式
|
||||
PWR_DCDC15,
|
||||
};
|
||||
|
||||
enum POWER_DCDC_TYPE {
|
||||
PWR_DCDC12 = 2,
|
||||
PWR_DCDC18_DCDC12 = 6,
|
||||
PWR_DCDC18_DCDC12_DCDC09 = 7,
|
||||
};
|
||||
|
||||
enum {
|
||||
DCDC09 = 1,
|
||||
DCDC12 = 2,
|
||||
DCDC18 = 4,
|
||||
};
|
||||
|
||||
void power_set_dcdc_type(enum POWER_DCDC_TYPE type);
|
||||
void power_set_mode(enum POWER_MODE mode);
|
||||
|
||||
|
||||
enum DVD_SHORT_DCV_MODE {
|
||||
DVDD_SHORT_DCVDDDIS = 0,
|
||||
DVDD_SHORT_DCVDD_EN,
|
||||
};
|
||||
void dcvdd_level_cfg(u8 dcvdd_level_set);
|
||||
void dvdd_short_dcvdd(enum DVD_SHORT_DCV_MODE short_mode, u8 dcvdd_level_set);
|
||||
|
||||
//每个滤波参数不一样
|
||||
#define MAX_WAKEUP_PORT 8 //最大同时支持数字io输入个数
|
||||
#define MAX_WAKEUP_ANA_PORT 3 //最大同时支持模拟io输入个数
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,339 @@
|
||||
#ifndef __P33_SFR_H__
|
||||
#define __P33_SFR_H__
|
||||
|
||||
//#ifdef PMU_SYSTEM
|
||||
#if 0
|
||||
#define P33_ACCESS(x) (*(volatile u32 *)(0xc000 + x*4))
|
||||
#else
|
||||
#define P33_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xc000 + x*4))
|
||||
#endif
|
||||
|
||||
//#ifdef PMU_SYSTEM
|
||||
#if 0
|
||||
#define RTC_ACCESS(x) (*(volatile u32 *)(0xd000 + x*4))
|
||||
#else
|
||||
#define RTC_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xd000 + x*4))
|
||||
#endif
|
||||
|
||||
//===========
|
||||
//===============================================================================//
|
||||
//
|
||||
//
|
||||
//
|
||||
//===============================================================================//
|
||||
//............. 0x0000 - 0x000f............
|
||||
//#define P3_VLMT_CON P33_ACCESS(0x01)
|
||||
//#define P3_POR_CON P33_ACCESS(0x02)
|
||||
#define P3_VLVD_CON0 P33_ACCESS(0x03)
|
||||
#define P3_VLVD_CON1 P33_ACCESS(0x04)
|
||||
#define P3_VLVD_FLT P33_ACCESS(0x05)
|
||||
#define P3_WDT_CON P33_ACCESS(0x06)
|
||||
#define P3_OCP_CON0 P33_ACCESS(0x07)
|
||||
|
||||
#define P3_ANA_FLOW0 P33_ACCESS(0x08)
|
||||
#define P3_ANA_FLOW1 P33_ACCESS(0x09)
|
||||
#define P3_ANA_FLOW2 P33_ACCESS(0x0a)
|
||||
|
||||
#define P3_ANA_KEEP0 P33_ACCESS(0x0c)
|
||||
#define P3_ANA_KEEP1 P33_ACCESS(0x0d)
|
||||
#define P3_ANA_KEEP2 P33_ACCESS(0x0e)
|
||||
|
||||
//............. 0X0010 - 0X001F.........for analog others
|
||||
#define P3_OSL_CON P33_ACCESS(0x10)
|
||||
#define P3_RST_FLAG P33_ACCESS(0x11)
|
||||
#define P3_VBAT_TYPE P33_ACCESS(0x12)
|
||||
#define P3_LRC_CON0 P33_ACCESS(0x13)
|
||||
#define P3_LRC_CON1 P33_ACCESS(0x14)
|
||||
#define P3_RST_CON0 P33_ACCESS(0x15)
|
||||
#define P3_RST_CON1 P33_ACCESS(0x16)
|
||||
#define P3_RST_CON2 P33_ACCESS(0x17)
|
||||
#define P3_VLD_KEEP P33_ACCESS(0x18)
|
||||
#define P3_CLK_CON0 P33_ACCESS(0x19)
|
||||
#define P3_ANA_READ P33_ACCESS(0x1a)
|
||||
#define P3_CHG_CON0 P33_ACCESS(0x1b)
|
||||
#define P3_CHG_CON1 P33_ACCESS(0x1c)
|
||||
#define P3_CHG_CON2 P33_ACCESS(0x1d)
|
||||
#define P3_CHG_CON3 P33_ACCESS(0x1e)
|
||||
#define P3_CHG_CON4 P33_ACCESS(0x1f)
|
||||
|
||||
//............. 0X0020 - 0X002F............ for buck circuit
|
||||
//#define P3_BUCK1_CON0 P33_ACCESS(0x20)
|
||||
//#define P3_BUCK1_CON1 P33_ACCESS(0x21)
|
||||
//#define P3_BUCK1_CON2 P33_ACCESS(0x22)
|
||||
//#define P3_BUCK1_CON3 P33_ACCESS(0x23)
|
||||
//#define P3_BUCK1_CON4 P33_ACCESS(0x24)
|
||||
//#define P3_BUCK1_CON5 P33_ACCESS(0x25)
|
||||
//#define P3_BUCK1_CON6 P33_ACCESS(0x26)
|
||||
//#define P3_BUCK1_CON7 P33_ACCESS(0x27)
|
||||
#define P3_BUCK2_CON0 P33_ACCESS(0x20)
|
||||
#define P3_BUCK2_CON1 P33_ACCESS(0x21)
|
||||
#define P3_BUCK2_CON2 P33_ACCESS(0x22)
|
||||
#define P3_BUCK2_CON3 P33_ACCESS(0x23)
|
||||
#define P3_BUCK2_CON4 P33_ACCESS(0x24)
|
||||
#define P3_BUCK2_CON5 P33_ACCESS(0x25)
|
||||
#define P3_BUCK2_CON6 P33_ACCESS(0x26)
|
||||
#define P3_BUCK2_CON7 P33_ACCESS(0x27)
|
||||
//#define P3_BUCK3_CON0 P33_ACCESS(0x28)
|
||||
//#define P3_BUCK3_CON1 P33_ACCESS(0x29)
|
||||
//#define P3_BUCK3_CON2 P33_ACCESS(0x2a)
|
||||
//#define P3_BUCK3_CON3 P33_ACCESS(0x2b)
|
||||
//#define P3_BUCK3_CON4 P33_ACCESS(0x2c)
|
||||
//#define P3_BUCK3_CON5 P33_ACCESS(0x2d)
|
||||
//#define P3_BUCK3_CON6 P33_ACCESS(0x2e)
|
||||
//#define P3_BUCK3_CON7 P33_ACCESS(0x2f)
|
||||
|
||||
//............. 0X0030 - 0X003F............ for PMU manager
|
||||
#define P3_SFLAG0 P33_ACCESS(0x30)
|
||||
#define P3_SFLAG1 P33_ACCESS(0x31)
|
||||
#define P3_SFLAG2 P33_ACCESS(0x32)
|
||||
#define P3_SFLAG3 P33_ACCESS(0x33)
|
||||
#define P3_SFLAG4 P33_ACCESS(0x34)
|
||||
#define P3_SFLAG5 P33_ACCESS(0x35)
|
||||
#define P3_SFLAG6 P33_ACCESS(0x36)
|
||||
#define P3_SFLAG7 P33_ACCESS(0x37)
|
||||
#define P3_SFLAG8 P33_ACCESS(0x38)
|
||||
#define P3_SFLAG9 P33_ACCESS(0x39)
|
||||
#define P3_SFLAGA P33_ACCESS(0x3a)
|
||||
#define P3_SFLAGB P33_ACCESS(0x3b)
|
||||
|
||||
//............. 0X0040 - 0X004F............ for
|
||||
#define P3_IVS_RD P33_ACCESS(0x40)
|
||||
#define P3_IVS_SET P33_ACCESS(0x41)
|
||||
#define P3_IVS_CLR P33_ACCESS(0x42)
|
||||
#define P3_PVDD0_AUTO P33_ACCESS(0x43)
|
||||
#define P3_PVDD1_AUTO P33_ACCESS(0x44)
|
||||
#define P3_WKUP_DLY P33_ACCESS(0x45)
|
||||
|
||||
#define P3_PCNT_FLT P33_ACCESS(0x48)
|
||||
#define P3_PCNT_CON P33_ACCESS(0x49)
|
||||
#define P3_PCNT_SET0 P33_ACCESS(0x4a)
|
||||
#define P3_PCNT_SET1 P33_ACCESS(0x4b)
|
||||
#define P3_PCNT_DAT0 P33_ACCESS(0x4c)
|
||||
#define P3_PCNT_DAT1 P33_ACCESS(0x4d)
|
||||
|
||||
#define P3_P11_CPU P33_ACCESS(0x4f)
|
||||
|
||||
//............. 0X0050 - 0X005F............ for port wake up
|
||||
#define P3_WKUP_FLT_EN0 P33_ACCESS(0x50)
|
||||
#define P3_WKUP_P_IE0 P33_ACCESS(0x51)
|
||||
#define P3_WKUP_N_IE0 P33_ACCESS(0x52)
|
||||
#define P3_WKUP_LEVEL0 P33_ACCESS(0x53)
|
||||
#define P3_WKUP_P_CPND0 P33_ACCESS(0x54)
|
||||
#define P3_WKUP_N_CPND0 P33_ACCESS(0x55)
|
||||
#define P3_WKUP_P_PND0 P33_ACCESS(0x56)
|
||||
#define P3_WKUP_N_PND0 P33_ACCESS(0x57)
|
||||
#define P3_WKUP_FLT_EN1 P33_ACCESS(0x58)
|
||||
#define P3_WKUP_P_IE1 P33_ACCESS(0x59)
|
||||
#define P3_WKUP_N_IE1 P33_ACCESS(0x5a)
|
||||
#define P3_WKUP_LEVEL1 P33_ACCESS(0x5b)
|
||||
#define P3_WKUP_P_CPND1 P33_ACCESS(0x5c)
|
||||
#define P3_WKUP_N_CPND1 P33_ACCESS(0x5d)
|
||||
#define P3_WKUP_P_PND1 P33_ACCESS(0x5e)
|
||||
#define P3_WKUP_N_PND1 P33_ACCESS(0x5f)
|
||||
|
||||
//............. 0X0060 - 0X006F............ for analog wake up
|
||||
#define P3_AWKUP_FLT_EN P33_ACCESS(0x60)
|
||||
#define P3_AWKUP_P_IE P33_ACCESS(0x61)
|
||||
#define P3_AWKUP_N_IE P33_ACCESS(0x62)
|
||||
#define P3_AWKUP_LEVEL P33_ACCESS(0x63)
|
||||
#define P3_AWKUP_P_PND P33_ACCESS(0x64)
|
||||
#define P3_AWKUP_N_PND P33_ACCESS(0x65)
|
||||
#define P3_AWKUP_P_CPND P33_ACCESS(0x66)
|
||||
#define P3_AWKUP_N_CPND P33_ACCESS(0x67)
|
||||
#define P3_WKUP_CLK_SEL P33_ACCESS(0x68)
|
||||
#define P3_AWKUP_CLK_SEL P33_ACCESS(0x69)
|
||||
#define P3_SYS_PWR0 P33_ACCESS(0x6a)
|
||||
#define P3_SYS_PWR1 P33_ACCESS(0x6b)
|
||||
#define P3_SYS_PWR2 P33_ACCESS(0x6c)
|
||||
#define P3_SYS_PWR3 P33_ACCESS(0x6d)
|
||||
#define P3_SYS_PWR4 P33_ACCESS(0x6e)
|
||||
#define P3_SYS_PWR5 P33_ACCESS(0x6f)
|
||||
|
||||
//............. 0X0070 - 0X007F............ for
|
||||
#define P3_PGDR_CON0 P33_ACCESS(0x70)
|
||||
#define P3_PGDR_CON1 P33_ACCESS(0x71)
|
||||
#define P3_PGSD_CON P33_ACCESS(0x72)
|
||||
|
||||
#define P3_LP_CTL P33_ACCESS(0x74)
|
||||
#define P3_LP_CFG P33_ACCESS(0x75)
|
||||
#define P3_NVRAM_PWR P33_ACCESS(0x76)
|
||||
#define P3_WVD_CON0 P33_ACCESS(0x77)
|
||||
#define P3_PVD_CON0 P33_ACCESS(0x78)
|
||||
#define P3_EVD_CON0 P33_ACCESS(0x79)
|
||||
#define P3_PMU_CON0 P33_ACCESS(0x7a)
|
||||
|
||||
#define P3_PMU_CON4 P33_ACCESS(0x7e)
|
||||
#define P3_PMU_CON5 P33_ACCESS(0x7f)
|
||||
|
||||
//............. 0X0080 - 0X008F............ for
|
||||
#define P3_PINR_CON P33_ACCESS(0x80)
|
||||
#define P3_PINR_CON1 P33_ACCESS(0x81)
|
||||
#define P3_PINR_SAFE P33_ACCESS(0x82)
|
||||
#define P3_PINR_SAFE1 P33_ACCESS(0x83)
|
||||
#define P3_PINR_PND1 P33_ACCESS(0x84)
|
||||
|
||||
#define P3_RST_SRC0 P33_ACCESS(0x8e)
|
||||
#define P3_RST_SRC1 P33_ACCESS(0x8f)
|
||||
|
||||
//............. 0X0090 - 0X009F............ for
|
||||
#define P3_PSW_CON0 P33_ACCESS(0x90)
|
||||
#define P3_PSW_CON1 P33_ACCESS(0x91)
|
||||
#define P3_PSW_CON2 P33_ACCESS(0x92)
|
||||
#define P3_PMU_ADC0 P33_ACCESS(0x93)
|
||||
#define P3_PMU_ADC1 P33_ACCESS(0x94)
|
||||
#define P3_VBG_CON0 P33_ACCESS(0x95)
|
||||
#define P3_VBG_CON1 P33_ACCESS(0x96)
|
||||
#define P3_IOV_CON0 P33_ACCESS(0x97)
|
||||
#define P3_IOV_CON1 P33_ACCESS(0x98)
|
||||
#define P3_PAVD_CON0 P33_ACCESS(0x99)
|
||||
#define P3_DCV_CON0 P33_ACCESS(0x9a)
|
||||
#define P3_DVD_CON0 P33_ACCESS(0x9b)
|
||||
#define P3_DVD2_CON0 P33_ACCESS(0x9c)
|
||||
#define P3_RVD_CON0 P33_ACCESS(0x9d)
|
||||
#define P3_RVD_CON1 P33_ACCESS(0x9e)
|
||||
#define P3_RVD2_CON0 P33_ACCESS(0x9f)
|
||||
|
||||
//............. 0X00A0 - 0X00AF............
|
||||
#define P3_PR_PWR P33_ACCESS(0xa0)
|
||||
#define P3_VPWR_CON0 P33_ACCESS(0xa1)
|
||||
#define P3_VPWR_CON1 P33_ACCESS(0xa2)
|
||||
#define P3_RTC_ADC0 P33_ACCESS(0xa3)
|
||||
#define P3_LS_P11 P33_ACCESS(0xa4)
|
||||
#define P3_LS_EN P33_ACCESS(0xa5)
|
||||
|
||||
#define P3_EXT_EFUSE_CON P33_ACCESS(0xa6)
|
||||
|
||||
#define P3_WKUP_SRC P33_ACCESS(0xa8)
|
||||
#define P3_ANA_MFIX P33_ACCESS(0xa9)
|
||||
#define P3_DBG_CON0 P33_ACCESS(0xaa)
|
||||
#define P3_DBG_CON1 P33_ACCESS(0xab)
|
||||
#define P3_MFIX_OPT P33_ACCESS(0xac)
|
||||
|
||||
//............. 0X00B0 - 0X00BF............ for EFUSE
|
||||
#define P3_EFUSE_CON0 P33_ACCESS(0xb0)
|
||||
#define P3_EFUSE_CON1 P33_ACCESS(0xb1)
|
||||
#define P3_EFUSE_CON2 P33_ACCESS(0xb2)
|
||||
#define P3_EFUSE_RDAT P33_ACCESS(0xb3)
|
||||
#define P3_EFUSE_PU_DAT0 P33_ACCESS(0xb4)
|
||||
#define P3_EFUSE_PU_DAT1 P33_ACCESS(0xb5)
|
||||
#define P3_EFUSE_PU_DAT2 P33_ACCESS(0xb6)
|
||||
#define P3_EFUSE_PU_DAT3 P33_ACCESS(0xb7)
|
||||
|
||||
#define P3_FUNC_EN P33_ACCESS(0xb8)
|
||||
#define P3_FUNC_CTL0 P33_ACCESS(0xb9)
|
||||
#define P3_FUNC_CTL1 P33_ACCESS(0xba)
|
||||
#define P3_FUNC_CTL2 P33_ACCESS(0xbb)
|
||||
#define P3_EFUSE_ANA0 P33_ACCESS(0xbc)
|
||||
|
||||
//............. 0X00C0 - 0X00CF............ for port input select
|
||||
#define P3_PORT_SEL0 P33_ACCESS(0xc0)
|
||||
#define P3_PORT_SEL1 P33_ACCESS(0xc1)
|
||||
#define P3_PORT_SEL2 P33_ACCESS(0xc2)
|
||||
#define P3_PORT_SEL3 P33_ACCESS(0xc3)
|
||||
#define P3_PORT_SEL4 P33_ACCESS(0xc4)
|
||||
#define P3_PORT_SEL5 P33_ACCESS(0xc5)
|
||||
#define P3_PORT_SEL6 P33_ACCESS(0xc6)
|
||||
#define P3_PORT_SEL7 P33_ACCESS(0xc7)
|
||||
|
||||
//............. 0x00d0 - 0x00df............
|
||||
#define P3_LS_IO_USR P33_ACCESS(0xd0) //TODO: check sync with verilog head file chip_def.v LEVEL_SHIFTER
|
||||
#define P3_LS_IO_ROM P33_ACCESS(0xd1)
|
||||
#define P3_LS_IO_PINR P33_ACCESS(0xd2)
|
||||
#define P3_LS_CTMU P33_ACCESS(0xd3)
|
||||
#define P3_LS_IO_SHA P33_ACCESS(0xd4)
|
||||
#define P3_LS_LRC24M P33_ACCESS(0xd5)
|
||||
#define P3_LS_BT P33_ACCESS(0xd6)
|
||||
#define P3_LS_PLL P33_ACCESS(0xd7)
|
||||
|
||||
//............. 0X00E0 - 0X00FF............ for p33 lp timer
|
||||
#define P3_LP_RSC00 P33_ACCESS(0xe0)
|
||||
#define P3_LP_RSC01 P33_ACCESS(0xe1)
|
||||
#define P3_LP_RSC02 P33_ACCESS(0xe2)
|
||||
#define P3_LP_RSC03 P33_ACCESS(0xe3)
|
||||
#define P3_LP_PRD00 P33_ACCESS(0xe4)
|
||||
#define P3_LP_PRD01 P33_ACCESS(0xe5)
|
||||
#define P3_LP_PRD02 P33_ACCESS(0xe6)
|
||||
#define P3_LP_PRD03 P33_ACCESS(0xe7)
|
||||
#define P3_LP_RSC10 P33_ACCESS(0xe8)
|
||||
#define P3_LP_RSC11 P33_ACCESS(0xe9)
|
||||
#define P3_LP_RSC12 P33_ACCESS(0xea)
|
||||
#define P3_LP_RSC13 P33_ACCESS(0xeb)
|
||||
#define P3_LP_RSC14 P33_ACCESS(0xec)
|
||||
#define P3_LP_RSC15 P33_ACCESS(0xed)
|
||||
#define P3_LP_PRD10 P33_ACCESS(0xee)
|
||||
#define P3_LP_PRD11 P33_ACCESS(0xef)
|
||||
#define P3_LP_PRD12 P33_ACCESS(0xf0)
|
||||
#define P3_LP_PRD13 P33_ACCESS(0xf1)
|
||||
#define P3_LP_PRD14 P33_ACCESS(0xf2)
|
||||
#define P3_LP_PRD15 P33_ACCESS(0xf3)
|
||||
#define P3_LP_TMR0_CLK P33_ACCESS(0xf4)
|
||||
#define P3_LP_TMR1_CLK P33_ACCESS(0xf5)
|
||||
#define P3_LP_TMR0_CON P33_ACCESS(0xf6)
|
||||
#define P3_LP_TMR1_CON P33_ACCESS(0xf7)
|
||||
#define P3_LP_TMR_CFG P33_ACCESS(0xf8)
|
||||
#define P3_LP_CNTRD0 P33_ACCESS(0xf9)
|
||||
#define P3_LP_CNT0 P33_ACCESS(0xfa)
|
||||
#define P3_LP_CNT1 P33_ACCESS(0xfb)
|
||||
#define P3_LP_CNT2 P33_ACCESS(0xfc)
|
||||
#define P3_LP_CNT3 P33_ACCESS(0xfd)
|
||||
#define P3_LP_CNT4 P33_ACCESS(0xfe)
|
||||
#define P3_LP_CNT5 P33_ACCESS(0xff)
|
||||
|
||||
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// P33 RTCVDD
|
||||
//
|
||||
//===============================================================================//
|
||||
|
||||
//............. 0X0080 - 0X008F............ for RTC
|
||||
#define R3_ALM_CON RTC_ACCESS(0x80)
|
||||
|
||||
#define R3_RTC_CON0 RTC_ACCESS(0x84)
|
||||
#define R3_RTC_CON1 RTC_ACCESS(0x85)
|
||||
#define R3_RTC_DAT0 RTC_ACCESS(0x86)
|
||||
#define R3_RTC_DAT1 RTC_ACCESS(0x87)
|
||||
#define R3_RTC_DAT2 RTC_ACCESS(0x88)
|
||||
#define R3_RTC_DAT3 RTC_ACCESS(0x89)
|
||||
#define R3_RTC_DAT4 RTC_ACCESS(0x8a)
|
||||
#define R3_ALM_DAT0 RTC_ACCESS(0x8b)
|
||||
#define R3_ALM_DAT1 RTC_ACCESS(0x8c)
|
||||
#define R3_ALM_DAT2 RTC_ACCESS(0x8d)
|
||||
#define R3_ALM_DAT3 RTC_ACCESS(0x8e)
|
||||
#define R3_ALM_DAT4 RTC_ACCESS(0x8f)
|
||||
|
||||
//............. 0X0090 - 0X009F............ for wake up
|
||||
#define R3_WKUP_EN RTC_ACCESS(0x90)
|
||||
#define R3_WKUP_EDGE RTC_ACCESS(0x91)
|
||||
#define R3_WKUP_CPND RTC_ACCESS(0x92)
|
||||
#define R3_WKUP_PND RTC_ACCESS(0x93)
|
||||
#define R3_WKUP_LEVEL RTC_ACCESS(0x94)
|
||||
|
||||
//............. 0X00A0 - 0X00AF............ for system
|
||||
#define R3_TIME_CON RTC_ACCESS(0xa0)
|
||||
#define R3_TIME_CPND RTC_ACCESS(0xa1)
|
||||
#define R3_TIME_PND RTC_ACCESS(0xa2)
|
||||
|
||||
#define R3_ADC_CON RTC_ACCESS(0xa4)
|
||||
#define R3_OSL_CON RTC_ACCESS(0xa5)
|
||||
|
||||
#define R3_WKUP_SRC RTC_ACCESS(0xa8)
|
||||
#define R3_RST_SRC RTC_ACCESS(0xa9)
|
||||
|
||||
#define R3_RST_CON RTC_ACCESS(0xab)
|
||||
#define R3_CLK_CON RTC_ACCESS(0xac)
|
||||
|
||||
//............. 0X00B0 - 0X00BF............ for PORT control
|
||||
#define R3_PR_IN RTC_ACCESS(0xb0)
|
||||
#define R3_PR_OUT RTC_ACCESS(0xb1)
|
||||
#define R3_PR_DIR RTC_ACCESS(0xb2)
|
||||
#define R3_PR_DIE RTC_ACCESS(0xb3)
|
||||
#define R3_PR_PU0 RTC_ACCESS(0xb4)
|
||||
#define R3_PR_PU1 RTC_ACCESS(0xb5)
|
||||
#define R3_PR_PD0 RTC_ACCESS(0xb6)
|
||||
#define R3_PR_PD1 RTC_ACCESS(0xb7)
|
||||
#define R3_PR_HD0 RTC_ACCESS(0xb8)
|
||||
#define R3_PR_HD1 RTC_ACCESS(0xb9)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,180 @@
|
||||
#ifndef __POWER_API_H__
|
||||
#define __POWER_API_H__
|
||||
|
||||
#define AT_VOLATILE_RAM_POWER AT(.power_driver.data)
|
||||
#define AT_VOLATILE_RAM_BSS_POWER AT(.power_driver.data.bss)
|
||||
#define AT_VOLATILE_RAM_CODE_POWER AT(.power_driver.text.cache.L1)
|
||||
|
||||
#define AT_VOLATILE_RAM_LOWPOWER AT_VOLATILE_RAM_POWER //AT(.power_driver.data.overlay)
|
||||
#define AT_VOLATILE_RAM_BSS_LOWPOWER AT(.power_driver.data.bss.overlay)//AT_VOLATILE_RAM_BSS_POWER
|
||||
#define AT_VOLATILE_RAM_CODE_LOWPOWER AT_VOLATILE_RAM_CODE_POWER //AT(.power_driver.text.cache.L1.overlay)
|
||||
|
||||
#define AT_VOLATILE_CACHE_LOWPOWER
|
||||
#define AT_VOLATILE_CACHE_BSS_LOWPOWER
|
||||
#define AT_VOLATILE_CACHE_CODE_LOWPOWER AT(.power_driver.text.cache.fetch)
|
||||
|
||||
//
|
||||
//
|
||||
// platform_data
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
//config
|
||||
enum LOWPOWER_CONFIG {
|
||||
LOWPOWER_CLOSE,
|
||||
SLEEP_EN,
|
||||
DEEP_SLEEP_EN,
|
||||
};
|
||||
|
||||
//osc_type
|
||||
enum LOWPOWER_OSC_TYPE {
|
||||
OSC_TYPE_LRC,
|
||||
OSC_TYPE_BT_OSC,
|
||||
OSC_TYPE_NULL,
|
||||
};
|
||||
|
||||
struct _power_param {
|
||||
//sleep
|
||||
u32 btosc_hz; //蓝牙晶振频率(默认使用24M)
|
||||
u32 osc_delay_us; //低功耗晶振起振延时，为预留配置。
|
||||
u32 t1; //低功耗参数，预留配置
|
||||
u32 t2; //低功耗参数，预留配置
|
||||
u32 t3; //低功耗参数，预留配置
|
||||
u32 t4; //低功耗参数，预留配置
|
||||
|
||||
//power
|
||||
//vddiom\vddiow在进出低功耗时使用 VDDIO_KEEP_TYPE 配置
|
||||
u8 vddiom_lev; //vddiom，系统工作时使用vddiom ldo(使用enum VDDIOM_VOL配置)
|
||||
u8 vddiow_lev; //vddiow，系统低功耗时使用vddiow ldo(使用enum VDDIOW_VOL配置)
|
||||
|
||||
//sleep
|
||||
u8 config; //低功耗使能，蓝牙&&系统空闲可进入低功耗(使用LOWPOWER_CONFIG配置)
|
||||
u8 osc_type; //低功耗晶振类型(使用enum LOWPOWER_OSC_TYPE配置)
|
||||
u8 lptmr_flow; //低功耗参数由用户配置
|
||||
};
|
||||
|
||||
struct _power_pdata {
|
||||
struct _power_param *power_param_p;
|
||||
struct _wakeup_param *wakeup_param_p;
|
||||
};
|
||||
|
||||
//
|
||||
//
|
||||
// power_api
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
enum VDDIO_KEEP_TYPE {
|
||||
VDDIO_KEEP_TYPE_NULL, //vddiow使用配置值
|
||||
VDDIO_KEEP_TYPE_NORMAL, //vddiow使用配置值使用vddiom挡位，即vddiom_lev
|
||||
VDDIO_KEEP_TYPE_TRIM, //vddiow使用trim值
|
||||
VDDIO_KEEP_TYPE_PG, //保持vddiom不关闭
|
||||
VDDIO_KEEP_TYPE_CLOSE, //vddio关闭
|
||||
};
|
||||
|
||||
|
||||
#include "power/low_power.h"
|
||||
|
||||
void power_early_init(u32 arg);
|
||||
|
||||
void power_later_init(u32 arg);
|
||||
|
||||
void power_init(struct _power_pdata *pdata);
|
||||
|
||||
enum PCONTROL_CMD {
|
||||
PCONTROL_POWER_DRIVER_RESERVE = 0,
|
||||
PCONTROL_P_PUTBYTE, //串口调试函数
|
||||
|
||||
//*****************************************************
|
||||
/* power
|
||||
*/
|
||||
PCONTROL_POWER_MODE = 0x100,
|
||||
PCONTROL_DCVDD_CAP_SW, //0：DCVDD上没有外挂电容 1：DCVDD上有外挂电容
|
||||
PCONTROL_FLASH_PG_VDDIO, //0：FLASH电源引脚使用IO 1：FLASH电源引脚没有使用IO
|
||||
PCONTROL_RTC_CLK, //RTC_CLK类型，配置开机、关机晶振流程
|
||||
PCONTROL_POWER_SUPPLY, //供电方式，0：IOVDD供电，1：VPWR供电
|
||||
|
||||
//*****************************************************
|
||||
/* sleep
|
||||
*/
|
||||
PCONTROL_PD_VDDIO_KEEP, //pdown vddio切换流程(使用enum VDDIO_KEEP_TYPE配置)
|
||||
PCONTROL_PD_WDVDD_LEV, //pdown wvdd挡位
|
||||
PCONTROL_PD_DVDD_LEV, //pdown dvdd挡位
|
||||
PCONTROL_PD_KEEP_LPCTMU, //pdown 触摸是否保持 0：不保持 1：保持
|
||||
PCONTROL_PD_KEEP_NVDD, //pdown 模式pvdd是否掉电 0, 不掉点 1：掉电
|
||||
|
||||
//*****************************************************
|
||||
/* soff
|
||||
*/
|
||||
PCONTROL_SF_KEEP_LRC, //soff lrc是否保持 0：不保持 1：保持
|
||||
PCONTROL_SF_VDDIO_KEEP, //soff vddio切换流程(使用enum VDDIO_KEEP_TYPE配置)
|
||||
PCONTROL_SF_KEEP_NVDD, //soff nvdd是否保持 0：不保持 1：保持
|
||||
PCONTROL_SF_KEEP_PVDD, //soff pvdd是否保持 0：不保持 1：保持
|
||||
|
||||
|
||||
//*****************************************************
|
||||
/* 以下配置为对应子模块的预留配置
|
||||
*/
|
||||
PCONTROL_PHW_RESERVE = 0x100, //使用enum POWER_MODE配置
|
||||
PCONTROL_P33_RESERVE = 0x200, //使用PCONTROL_P33_CMD配置
|
||||
PCONTROL_P11_RESERVE = 0x300, //使用PCONTROL_P11_CMD配置
|
||||
PCONTROL_LP_FLOW_IC_RESERVE = 0x400, //使用PCONTROL_IC_CMD配置
|
||||
};
|
||||
|
||||
u32 power_control(enum PCONTROL_CMD cmd, u32 arg);
|
||||
|
||||
void dvdd2_bypass_en(u8 mode);
|
||||
|
||||
//
|
||||
//
|
||||
// lowpower
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
void pmu_trim(u32 force_trim, u32 vddio_tieup_vbat);
|
||||
|
||||
|
||||
//
|
||||
//
|
||||
// soff
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
|
||||
//p33 soft flag
|
||||
enum soft_flag_io_stage {
|
||||
SOFTFLAG_HIGH_RESISTANCE,
|
||||
SOFTFLAG_PU,
|
||||
SOFTFLAG_PD,
|
||||
|
||||
SOFTFLAG_OUT0,
|
||||
SOFTFLAG_OUT0_HD0,
|
||||
SOFTFLAG_OUT0_HD,
|
||||
SOFTFLAG_OUT0_HD0_HD,
|
||||
|
||||
SOFTFLAG_OUT1,
|
||||
SOFTFLAG_OUT1_HD0,
|
||||
SOFTFLAG_OUT1_HD,
|
||||
SOFTFLAG_OUT1_HD0_HD,
|
||||
|
||||
SOFTFLAG_PU100K,
|
||||
SOFTFLAG_PU1M,
|
||||
SOFTFLAG_PD100K,
|
||||
SOFTFLAG_PD1M,
|
||||
};
|
||||
|
||||
struct app_soft_flag_t {
|
||||
u8 sfc_fast_boot;
|
||||
u8 flash_stable_delay_sel;
|
||||
u8 usbdp;
|
||||
u8 usbdm;
|
||||
u8 pp0;
|
||||
};
|
||||
|
||||
void mask_softflag_config(struct app_soft_flag_t *softflag);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,13 @@
|
||||
#ifndef __POWER_COMPAT_H__
|
||||
#define __POWER_COMPAT_H__
|
||||
|
||||
int cpu_reset_by_soft();
|
||||
|
||||
void wdt_close();
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,55 @@
|
||||
#ifndef __POWER_GATE_H__
|
||||
#define __POWER_GATE_H__
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
//STPG define bit
|
||||
#define STPG_A 0 //STPG output bit
|
||||
#define STPG_HD0 2 //STPG HD0
|
||||
#define STPG_HD1 3 //STPG HD1
|
||||
#define STPG_OE 4 //STPG output enable bit
|
||||
#define STPG_PD 5 //STPG pull down enable bit
|
||||
#define STPG_PD1 6 //STPG pull down enable bit
|
||||
|
||||
/*
|
||||
*@brief 初始化pg_io送出高阻+低电平的pwm
|
||||
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
|
||||
*@param freq : pwm的频率
|
||||
*@param duty : pwm的低电平的占空比，0~10000对应0%~100%
|
||||
*@return 0:成功 非0:失败
|
||||
*/
|
||||
int power_gate_pwm_init(u32 pg_io, u32 freq, u32 duty);
|
||||
|
||||
/*
|
||||
*@brief 设置pg_io的pwm的低电平占空比
|
||||
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
|
||||
*@param duty : pwm的低电平的占空比，0~10000对应0%~100%
|
||||
*/
|
||||
void power_gate_pwm_set_duty(u32 pg_io, u32 duty);
|
||||
|
||||
/*
|
||||
*@brief 关闭pwm, pg_io为高阻
|
||||
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
|
||||
*/
|
||||
void power_gate_pwm_close(u32 pg_io);
|
||||
|
||||
/*
|
||||
*@brief 设置pg_io的开漏输出
|
||||
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
|
||||
*@param value : 0,输出低电平 1,则高阻
|
||||
*/
|
||||
void power_gate_open_drain_output(u32 pg_io, u32 value);
|
||||
|
||||
/*
|
||||
*@brief 开启stpg供电
|
||||
*@param ms : ms延时
|
||||
*/
|
||||
void fspg2_poweron(u32 ms);
|
||||
|
||||
/*
|
||||
*@brief 关闭stpg供电
|
||||
*@param ms : ms延时
|
||||
*/
|
||||
void fspg2_poweroff(u32 ms);
|
||||
#endif
|
||||
@@ -0,0 +1,134 @@
|
||||
#ifndef __POWER_PORT_H__
|
||||
#define __POWER_PORT_H__
|
||||
|
||||
//
|
||||
//
|
||||
// FLASH PIN
|
||||
//
|
||||
//
|
||||
//
|
||||
//*****************************************************************************/
|
||||
#define GET_SFC_PORT() ((JL_SFC_IOMC->IOMC0 & BIT(1)) ? 1:0)
|
||||
|
||||
/******************************************************************************/
|
||||
#define _PORT(p) JL_PORT##p
|
||||
#define _PORT_IN(p,b) P##p##b##_IN
|
||||
#define _PORT_OUT(p,b) JL_OMAP->P##p##b##_OUT
|
||||
|
||||
/****************************spi boot *****************************************/
|
||||
#define SPI_PORT(p) _PORT(p)
|
||||
#define SPI0_FUNC_OUT(p,b) _PORT_OUT(p,b)
|
||||
#define SPI0_FUNC_IN(p,b) _PORT_IN(p,b)
|
||||
// | func\port | A | B |
|
||||
// |-----------|------|------|
|
||||
// | VCC | FSPG | |
|
||||
// | CS | PD3 | |
|
||||
// | CLK | PD0 | |
|
||||
// | DO(D0) | PD1 | |
|
||||
// | DI(D1) | PD2 | |
|
||||
// | WP(D2) | PA5 | |
|
||||
// | HOLD(D3) | PA6 | |
|
||||
|
||||
|
||||
//FSPG define bit
|
||||
#define FSPG_A 0 //FSPG output bit
|
||||
#define FSPG_CS_EN 1 //FSPG CS connect enable bit
|
||||
#define FSPG_HD0 2 //FSPG HD0
|
||||
#define FSPG_HD1 3 //FSPG HD1
|
||||
#define FSPG_OE 4 //FSPG output enable bit
|
||||
#define FSPG_PD 5 //FSPG pull down enable bit
|
||||
#define FSPG_PD1 6 //FSPG pull down enable bit
|
||||
#define FSPG_18V 7 //flash supply power domain 1: DCVDD 1.8V; 0: IOVDD;
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//group a
|
||||
#define PORT_SPI0_CSA F
|
||||
#define SPI0_CSA 0
|
||||
|
||||
#define PORT_SPI0_CLKA F
|
||||
#define SPI0_CLKA 4
|
||||
|
||||
#define PORT_SPI0_DOA F
|
||||
#define SPI0_DOA 5
|
||||
|
||||
#define PORT_SPI0_DIA F
|
||||
#define SPI0_DIA 1
|
||||
|
||||
#define PORT_SPI0_D2A F
|
||||
#define SPI0_D2A 2
|
||||
|
||||
#define PORT_SPI0_D3A F
|
||||
#define SPI0_D3A 3
|
||||
|
||||
|
||||
//#define SPI0_PWR_A IO_PORTD_04
|
||||
#define SPI0_CS_A IO_PORTF_00
|
||||
#define SPI0_CLK_A IO_PORTF_04
|
||||
#define SPI0_DO_D0_A IO_PORTF_05
|
||||
#define SPI0_DI_D1_A IO_PORTF_01
|
||||
#define SPI0_WP_D2_A IO_PORTF_02
|
||||
#define SPI0_HOLD_D3_A IO_PORTF_03
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
//group b
|
||||
#define PORT_SPI0_CSB F
|
||||
#define SPI0_CSB 3
|
||||
|
||||
#define PORT_SPI0_CLKB F
|
||||
#define SPI0_CLKB 1
|
||||
|
||||
#define PORT_SPI0_DOB F
|
||||
#define SPI0_DOB 0
|
||||
|
||||
#define PORT_SPI0_DIB F
|
||||
#define SPI0_DIB 4
|
||||
|
||||
#define PORT_SPI0_D2B F
|
||||
#define SPI0_D2B 5
|
||||
|
||||
#define PORT_SPI0_D3B F
|
||||
#define SPI0_D3B 2
|
||||
|
||||
//#define SPI0_PWR_B IO_PORTD_04
|
||||
#define SPI0_CS_B IO_PORTF_03
|
||||
#define SPI0_CLK_B IO_PORTF_01
|
||||
#define SPI0_DO_D0_B IO_PORTF_00
|
||||
#define SPI0_DI_D1_B IO_PORTF_04
|
||||
#define SPI0_WP_D2_B IO_PORTF_05
|
||||
#define SPI0_HOLD_D3_B IO_PORTF_02
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
//
|
||||
//
|
||||
// PSRAM
|
||||
//
|
||||
//
|
||||
//
|
||||
//*****************************************************************************/
|
||||
#define PSRAM_CS IO_PORTC_06
|
||||
#define PSRAM_CLK IO_PORTC_05
|
||||
#define PSRAM_D0A IO_PORTC_09
|
||||
#define PSRAM_D1A IO_PORTC_07
|
||||
#define PSRAM_D2A IO_PORTC_08
|
||||
#define PSRAM_D3A IO_PORTC_04
|
||||
|
||||
#define PINR_DEFAULT_IO IO_PORTB_07
|
||||
|
||||
#define MCLR_PORT IO_PORTB_06
|
||||
|
||||
//A B C F P USB
|
||||
#define PORT_TABLE(arg) u32 gpio_confi##arg[6] = {0xffff, 0xffff,0xffff, 0xffff, 0xffff, 0xffff}
|
||||
|
||||
void port_protect(u32 *gpio_config, u32 gpio);
|
||||
|
||||
#define PORT_PROTECT(gpio) port_protect(gpio_config, gpio)
|
||||
|
||||
void init_boot_rom();
|
||||
u8 get_boot_rom();
|
||||
|
||||
void *__port_init(u32 arg);
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,42 @@
|
||||
#ifndef __POWER_INTERFACE_H__
|
||||
#define __POWER_INTERFACE_H__
|
||||
|
||||
#include "generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
|
||||
//-------------------------------------------------------
|
||||
/* p33
|
||||
*/
|
||||
#include "power/p33/p33_sfr.h"
|
||||
#include "power/p33/p33_access.h"
|
||||
#include "power/p33/charge_hw.h"
|
||||
#include "power/p33/p33_api.h"
|
||||
#include "power/wdt.h"
|
||||
|
||||
//-------------------------------------------------------
|
||||
/* p11
|
||||
*/
|
||||
#include "power/p11/p11_csfr.h"
|
||||
#include "power/p11/p11_sfr.h"
|
||||
#include "power/p11/p11_mmap.h"
|
||||
#include "power/p11/p11_api.h"
|
||||
#include "power/p11/lp_ipc.h"
|
||||
#include "power/p11/ipc_spin_lock.h"
|
||||
|
||||
|
||||
//-------------------------------------------------------
|
||||
/* power
|
||||
*/
|
||||
#include "power/power_api.h"
|
||||
#include "power/power_wakeup.h"
|
||||
#include "power/power_reset.h"
|
||||
#include "power/power_port.h"
|
||||
#include "power/power_gate.h"
|
||||
|
||||
//-------------------------------------------------------
|
||||
/* other
|
||||
*/
|
||||
#include "power/power_app.h"
|
||||
#include "power/power_compat.h"
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,119 @@
|
||||
#ifndef __PSRAM_API_H__
|
||||
#define __PSRAM_API_H__
|
||||
|
||||
|
||||
enum PSRAM_PORT_SEL_TABLE {
|
||||
PSRAM_PORT_SEL_PORTA = 0,
|
||||
};
|
||||
|
||||
enum PSRAM_MODE_SEL_TABLE {
|
||||
PSRAM_MODE_1_WIRE = 0,
|
||||
PSRAM_MODE_4_WIRE_CMD1_ADR4_DAT4,
|
||||
PSRAM_MODE_4_WIRE_CMD4_ADR4_DAT4,
|
||||
};
|
||||
|
||||
|
||||
enum psram_power_status {
|
||||
PSRAM_STATE_POWER_OFF,
|
||||
PSRAM_STATE_POWER_ON,
|
||||
PSRAM_STATE_POWER_STANDBY,
|
||||
};
|
||||
|
||||
struct psram_platform_data {
|
||||
u8 power_port;
|
||||
enum PSRAM_PORT_SEL_TABLE port;
|
||||
enum PSRAM_MODE_SEL_TABLE mode;
|
||||
u32 init_clk;
|
||||
};
|
||||
|
||||
#define PSRAM_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct psram_platform_data data = {
|
||||
|
||||
#define PSRAM_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief 获取psram在使用的buf数量
|
||||
*
|
||||
* @return psram在使用的buf数量
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
extern u32 psram_get_used_block(void);
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief psram heap reset
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
extern void psram_heap_reset(void);
|
||||
/* ------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief psram_flush_cache
|
||||
*
|
||||
* @param begin
|
||||
* @param len
|
||||
*/
|
||||
/* ------------------------------------------------------------------------------------*/
|
||||
void psram_flush_cache(void *begin, u32 len);
|
||||
/* ------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief psram_flush_invaild_cache
|
||||
*
|
||||
* @param begin
|
||||
* @param len
|
||||
*/
|
||||
/* ------------------------------------------------------------------------------------*/
|
||||
void psram_flush_invaild_cache(void *begin, u32 len);
|
||||
/* ------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief psram_init psram初始化
|
||||
*
|
||||
* @param config
|
||||
*/
|
||||
/* ------------------------------------------------------------------------------------*/
|
||||
void psram_init(const struct psram_platform_data *config);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief :检查mem是否psram cache地址
|
||||
*
|
||||
* @param mem :检查对象
|
||||
*
|
||||
* @return :true - psram地址，false - 非psram地址
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
int psram_cache_check(void *pv);
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief :检查mem是否psram no cache地址
|
||||
*
|
||||
* @param mem :检查对象
|
||||
*
|
||||
* @return :true - psram地址，false - 非psram地址
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
int psram_no_cache_check(void *pv);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief :psram no cache地址转换为cache地址
|
||||
*
|
||||
* @param mem :检查对象
|
||||
*
|
||||
* @return :非0- psram cahce地址，NULL - 非psram地址
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void *psram_no_cache_2_cache(void *pv);
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief :psram cache地址转换为no cache地址
|
||||
*
|
||||
* @param mem :检查对象
|
||||
*
|
||||
* @return :非0- psram no cahce地址，NULL - 非psram地址
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void *psram_cache_2_no_cache(void *pv);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,35 @@
|
||||
#ifndef _RDEC_HW_H
|
||||
#define _RDEC_HW_H
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
typedef JL_QDEC_TypeDef RDEC;
|
||||
#define RDEC0 JL_QDEC0
|
||||
|
||||
#define RDEC_MAX_NUM 1
|
||||
#define RDEC_REG_BASE_ADDR JL_QDEC0
|
||||
#define RDEC_REG_OFFSET 0
|
||||
#define IRQ_RDECx_IDX_LIST IRQ_QDEC0_IDX
|
||||
|
||||
|
||||
//RDECx_CON reg
|
||||
#define RDEC_SPND 16 //bit16~bit31
|
||||
// #define RDEC_RESERVED 11 //bit11~bit15
|
||||
#define RDEC_INT_MODE 10
|
||||
#define RDEC_MODE 8 //bit8~bit9
|
||||
#define RDEC_PND 7
|
||||
#define RDEC_CPND 6
|
||||
// #define RDEC_RESERVED 2 //bit2~bit5
|
||||
#define RDEC_POL 1
|
||||
#define RDEC_EN 0
|
||||
|
||||
//RDECx_SMP 8bit
|
||||
//RDECx_DAT 8bit
|
||||
//RDECx_DBE 8bit
|
||||
|
||||
typedef enum : u8 {
|
||||
RDEC_0 = 0,
|
||||
RDEC_x,
|
||||
} rdec_dev;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,48 @@
|
||||
#ifndef ARCH_SDMMC_H
|
||||
#define ARCH_SDMMC_H
|
||||
|
||||
|
||||
#include "device/sdmmc/sdmmc.h"
|
||||
|
||||
struct sdmmc_platform_data {
|
||||
char port[6];
|
||||
u8 irq;
|
||||
u8 data_width;
|
||||
u8 priority;
|
||||
u8 detect_mode;
|
||||
u8 detect_io;
|
||||
u8 detect_io_level;
|
||||
u8 detect_time_interval;
|
||||
u32 detect_timeout;
|
||||
u32 speed;
|
||||
volatile u16 *sfr;
|
||||
int (*detect_func)(const struct sdmmc_platform_data *);
|
||||
void (*port_init)(const struct sdmmc_platform_data *, int mode);
|
||||
void (*power)(u8 on);
|
||||
};
|
||||
|
||||
#define SD0_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct sdmmc_platform_data data
|
||||
|
||||
|
||||
#define SD0_PLATFORM_DATA_END() \
|
||||
.irq = IRQ_SD0_IDX, \
|
||||
.sfr = (volatile u16 *)JL_SD0, \
|
||||
.port_init = sdmmc_0_port_init, \
|
||||
.detect_time_interval = 250, \
|
||||
.detect_timeout = 1000, \
|
||||
|
||||
extern const struct device_operations sd_dev_ops;
|
||||
|
||||
void sdmmc_0_port_init(const struct sdmmc_platform_data *, int mode);
|
||||
|
||||
int sdmmc_0_clk_detect(const struct sdmmc_platform_data *);
|
||||
int sdmmc_0_io_detect(const struct sdmmc_platform_data *);
|
||||
int sdmmc_0_cmd_detect(const struct sdmmc_platform_data *);
|
||||
int sdmmc_cmd_detect(const struct sdmmc_platform_data *data);
|
||||
|
||||
void sd_set_power(u8 enable);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,34 @@
|
||||
#ifndef _SFC1_INTERFACE_H_
|
||||
#define _SFC1_INTERFACE_H_
|
||||
#include "typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
|
||||
enum SFC_DATA_WIDTH {
|
||||
SFC_DATA_WIDTH_2 = 2,
|
||||
SFC_DATA_WIDTH_4 = 4,
|
||||
};
|
||||
|
||||
enum SFC_READ_MODE {
|
||||
SFC_RD_OUTPUT = 0,
|
||||
SFC_RD_IO,
|
||||
SFC_RD_IO_CONTINUE,
|
||||
};
|
||||
|
||||
struct sfc_spi_platform_data {
|
||||
// u8 spi_hw_index;
|
||||
enum SFC_DATA_WIDTH sfc_data_width;
|
||||
enum SFC_READ_MODE sfc_read_mode;
|
||||
// u8 sfc_encry; //是否加密
|
||||
// u16 sfc_clk_div; //时钟分频: sfc_fre = sys_clk / div;
|
||||
// u32 unencry_start_addr; //不加密起始地址
|
||||
// u32 unencry_size; //不加密大小
|
||||
};
|
||||
|
||||
#define SFC_SPI_PLATFORM_DATA_BEGIN(data) \
|
||||
const struct sfc_spi_platform_data data = {
|
||||
|
||||
#define SFC_SPI_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
|
||||
#endif /* #ifndef _SFC1_INTERFACE_H_ */
|
||||
@@ -0,0 +1,28 @@
|
||||
#ifndef _SPI_HW_H_
|
||||
#define _SPI_HW_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
|
||||
#define SUPPORT_SPI0 0 //是否使能SPI0
|
||||
#define SUPPORT_SPI1 1 //是否使能SPI1
|
||||
#define SPI1_SUPPORT_UNIDIR_4BIT 1 //spi 4bit
|
||||
#define SUPPORT_SPI2 1 //是否使能spi2
|
||||
#define SPI2_SUPPORT_UNIDIR_4BIT 1 //spi 4bit
|
||||
|
||||
#define HW_SPI_MAX_NUM 3
|
||||
typedef enum spi_index {
|
||||
HW_SPI0, //SPI0系统已使用
|
||||
HW_SPI1,
|
||||
HW_SPI2,
|
||||
} hw_spi_dev;
|
||||
|
||||
enum spi_bit_mode {
|
||||
SPI_FIRST_BIT_MSB, //7,6,5,4,3,2,1,0
|
||||
SPI_FIRST_BIT_LSB, //0,1,2,3,4,5,6,7
|
||||
SPI_FIRST_BIT_BIT3, //3,2,1,0,7,6,5,4
|
||||
SPI_FIRST_BIT_BIT4, //4,5,6,7,0,1,2,3
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
#ifndef ASM_SPIFLASH_H
|
||||
#define ASM_SPIFLASH_H
|
||||
|
||||
|
||||
|
||||
#include "device/device.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern const struct device_operations spiflash_dev_ops;
|
||||
extern const struct device_operations sfcflash_dev_ops;
|
||||
extern const struct device_operations sdfile_dev_ops;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,108 @@
|
||||
#ifndef _USB_HW_H_
|
||||
#define _USB_HW_H_
|
||||
#include "typedef.h"
|
||||
//#include "generic/ioctl.h"
|
||||
|
||||
|
||||
#define USB_MAX_HW_EPNUM 5
|
||||
|
||||
/* #define ep_regs JL_USB_EP_TypeDef */
|
||||
typedef struct {
|
||||
volatile u32 TXMAXP;
|
||||
volatile u32 TXCSR1;
|
||||
volatile u32 TXCSR2;
|
||||
volatile u32 RXMAXP;
|
||||
volatile u32 RXCSR1;
|
||||
volatile u32 RXCSR2;
|
||||
volatile const u32 RXCOUNT1;
|
||||
volatile const u32 RXCOUNT2;
|
||||
volatile u32 TXTYPE;
|
||||
volatile u32 TXINTERVAL;
|
||||
volatile u32 RXTYPE;
|
||||
volatile u32 RXINTERVAL;
|
||||
u32 RESERVED[0xd0 / 4];
|
||||
} ep_regs;
|
||||
|
||||
|
||||
|
||||
//USB_CON0 register
|
||||
// #define RESERVED 0
|
||||
#define LOW_SPEED 1
|
||||
#define USB_NRST 2
|
||||
#define TM1 3
|
||||
#define CID 4
|
||||
#define VBUS 5
|
||||
#define KEEP_DPLL 6
|
||||
// #define RESERVED 7~9
|
||||
#define SOFIE 10
|
||||
#define SIEIE 11
|
||||
#define CLR_SOF 12
|
||||
#define SOF_PND 13
|
||||
#define SIE_PND 14
|
||||
// #define RESERVED 15~17
|
||||
#define LOWP_MD_ 18
|
||||
#define RST_STL 19
|
||||
#define EP1_DISABLE 20
|
||||
#define EP2_DISABLE 21
|
||||
#define EP3_DISABLE 22
|
||||
#define EP4_DISABLE 23
|
||||
#define EP1_RLIM_EN 24
|
||||
#define EP2_RLIM_EN 25
|
||||
#define EP3_RLIM_EN 26
|
||||
#define EP4_RLIM_EN 27
|
||||
#define TX_BLOCK_EN 28
|
||||
// #define RESERVED 29~31
|
||||
|
||||
|
||||
//USB_CON1 register
|
||||
#define EP1_MTX_EN 0
|
||||
#define EP1_MRX_EN 1
|
||||
#define EP1_MTX_PND_CLR 2
|
||||
#define EP1_MRX_PND_CLR 3
|
||||
#define EP1_MTX_PND 4
|
||||
#define EP1_MRX_PND 5
|
||||
// #define RESERVED 6~31
|
||||
|
||||
|
||||
//USB_TXDLY_CON register
|
||||
#define CLK_DIS 0
|
||||
#define CLR_PND 1
|
||||
#define TXDLY_PND 2
|
||||
// #define RESERVED 3~15
|
||||
#define USB_TXDLY_CON(x) SFR(JL_USB->TXDLY_CON, 16, 16, x)
|
||||
|
||||
#define USB_EP1_RX_LEN(x) SFR(JL_USB->EP1_RLEN, 0, 11, x)
|
||||
#define USB_EP2_RX_LEN(x) SFR(JL_USB->EP2_RLEN, 0, 11, x)
|
||||
#define USB_EP3_RX_LEN(x) SFR(JL_USB->EP3_RLEN, 0, 11, x)
|
||||
#define USB_EP4_RX_LEN(x) SFR(JL_USB->EP4_RLEN, 0, 11, x)
|
||||
|
||||
#define USB_EP1_MTX_PRD(x) SFR(JL_USB->EP1_MTX_PRD, 0, 8, x)
|
||||
#define USB_EP1_MTX_NUM(x) SFR(JL_USB->EP1_MTX_NUM, 0, 8, x)
|
||||
#define USB_EP1_MRX_PRD(x) SFR(JL_USB->EP1_MRX_PRD, 0, 8, x)
|
||||
#define USB_EP1_MRX_NUM(x) SFR(JL_USB->EP1_MRX_NUM, 0, 8, x)
|
||||
|
||||
//JL_PORTUSB->CON register
|
||||
#define RCVEN 0
|
||||
// #define RESERVED 1
|
||||
#define SR0 2
|
||||
// #define RESERVED 3
|
||||
#define PDCHKDP 4
|
||||
// #define RESERVED 5
|
||||
#define DIDF 6
|
||||
#define CHKDPO 7
|
||||
#define IO_MODE 8
|
||||
// #define RESERVED 9~10
|
||||
#define DBG_SEL 11 //2bit
|
||||
// #define RESERVED 13~31
|
||||
|
||||
|
||||
|
||||
enum {
|
||||
USB0,
|
||||
};
|
||||
#define USB_MAX_HW_NUM 1
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,6 @@
|
||||
#ifndef ___WDT_H__
|
||||
#define ___WDT_H__
|
||||
|
||||
#include "asm/power_interface.h"
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,143 @@
|
||||
SECTIONS
|
||||
{
|
||||
.data ALIGN(4):SUBALIGN(4)
|
||||
{
|
||||
driver_data_start = .;
|
||||
|
||||
|
||||
CLOCK_DATA_START = .;
|
||||
*(.clock_data)
|
||||
CLOCK_DATA_SIZE = ABSOLUTE(. - CLOCK_DATA_START);
|
||||
|
||||
*(.debug_data)
|
||||
|
||||
*(.uart_data)
|
||||
|
||||
/*#include asm/power/ld/power_data.ld*/
|
||||
*(.power_driver.data)
|
||||
|
||||
driver_data_end = .;
|
||||
. = ALIGN(32);
|
||||
} > ram0
|
||||
|
||||
.data_code ALIGN(4):SUBALIGN(4)
|
||||
{
|
||||
|
||||
/*#include asm/power/ld/power_data_code.ld*/
|
||||
#if (!TCFG_ICACHE_RUN_DATA_CODE)
|
||||
*(.power_driver.text.cache.L1)
|
||||
#endif
|
||||
|
||||
#if TCFG_EXCEPTION_CODE_AT_RAM
|
||||
*(.debug_code)
|
||||
*(.debug_const)
|
||||
#endif
|
||||
} > ram0
|
||||
|
||||
.bss ALIGN(4):SUBALIGN(4)
|
||||
{
|
||||
driver_bss_start = .;
|
||||
|
||||
CLOCK_BSS_START = .;
|
||||
*(.clock_bss)
|
||||
CLOCK_BSS_SIZE = ABSOLUTE(. - CLOCK_BSS_START);
|
||||
|
||||
*(.debug_bss)
|
||||
|
||||
*(.uart_bss)
|
||||
|
||||
*(.sd_var)
|
||||
|
||||
/* #include "asm/power/ld/power_bss.ld"*/
|
||||
*(.power_driver.data.bss)
|
||||
|
||||
. = ALIGN(4);
|
||||
driver_bss_end = .;
|
||||
} > ram0
|
||||
|
||||
.text ALIGN(4):SUBALIGN(4)
|
||||
{
|
||||
driver_code_start = .;
|
||||
|
||||
*(.fm_code)
|
||||
|
||||
CLOCK_CODE_START = .;
|
||||
*(.clock_code)
|
||||
*(.clock_const)
|
||||
CLOCK_CODE_SIZE = ABSOLUTE(. - CLOCK_CODE_START);
|
||||
|
||||
#if !TCFG_EXCEPTION_CODE_AT_RAM
|
||||
*(.debug_code)
|
||||
*(.debug_const)
|
||||
#endif
|
||||
|
||||
*(.uart_code)
|
||||
*(.uart_const)
|
||||
|
||||
. = ALIGN(4);
|
||||
tzspi_target_begin = .;
|
||||
PROVIDE(tzspi_target_begin = .);
|
||||
KEEP(*(.tzspi_target))
|
||||
tzspi_target_end = .;
|
||||
PROVIDE(tzspi_target_end = .);
|
||||
|
||||
/*#include "asm/power/ld/power_test.ld"*/
|
||||
*(.power_driver.text)
|
||||
*(.power_driver.text.const)
|
||||
|
||||
. = ALIGN(4);
|
||||
lp_target_begin = .;
|
||||
PROVIDE(lp_target_begin = .);
|
||||
KEEP(*(.lp_target))
|
||||
lp_target_end = .;
|
||||
PROVIDE(lp_target_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
lp_request_begin = .;
|
||||
PROVIDE(lp_request_begin = .);
|
||||
KEEP(*(.lp_request))
|
||||
lp_request_end = .;
|
||||
PROVIDE(lp_request_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
p2m_msg_handler_begin = .;
|
||||
PROVIDE(p2m_msg_handler_begin = .);
|
||||
KEEP(*(.p2m_msg_handler))
|
||||
PROVIDE(p2m_msg_handler_end = .);
|
||||
p2m_msg_handler_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
phw_begin = .;
|
||||
PROVIDE(phw_begin = .);
|
||||
KEEP(*(.phw_operation))
|
||||
PROVIDE(phw_end = .);
|
||||
phw_end = .;
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
pdrv_text_cache_l2_begin = .;
|
||||
PROVIDE(pdrv_text_cache_l2_begin = .);
|
||||
|
||||
deepsleep_target_begin = .;
|
||||
PROVIDE(deepsleep_target_begin = .);
|
||||
KEEP(*(.deepsleep_target))
|
||||
deepsleep_target_end = .;
|
||||
PROVIDE(deepsleep_target_end = .);
|
||||
|
||||
*(.power_driver.text.cache.fetch)
|
||||
|
||||
pdrv_text_cache_l2_end = .;
|
||||
PROVIDE(pdrv_text_cache_l2_end = .);
|
||||
|
||||
|
||||
|
||||
|
||||
driver_code_end = .;
|
||||
. = ALIGN(4);
|
||||
} > code0
|
||||
|
||||
/*代码统计 Code & RAM */
|
||||
DRIVER_RAM_TOTAL = (driver_data_end - driver_data_start) + (driver_bss_end - driver_bss_start);
|
||||
DRIVER_CODE_TOTAL = (driver_code_end - driver_code_start);
|
||||
}
|
||||
@@ -0,0 +1,27 @@
|
||||
#ifndef ASM_INCLUDES_H
|
||||
#define ASM_INCLUDES_H
|
||||
|
||||
#include "asm/cpu.h"
|
||||
#include "asm/crc16.h"
|
||||
|
||||
#include "gpio.h"
|
||||
#include "asm/spiflash.h"
|
||||
#include "asm/csfr.h"
|
||||
#include "asm/power_interface.h"
|
||||
#include "asm/efuse.h"
|
||||
#include "asm/debug.h"
|
||||
#include "clock.h"
|
||||
#include "asm/clock_hal.h"
|
||||
#include "device/tzflash_api.h"
|
||||
|
||||
#include "uart.h"
|
||||
#include "asm/wdt.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,147 @@
|
||||
#ifndef __GPADC_H__
|
||||
#define __GPADC_H__
|
||||
|
||||
#include "asm/gpadc_hw.h"
|
||||
|
||||
enum AD_MODE {
|
||||
AD_MODE_DEFAULT, //普通模式,存储在队列中为原始值
|
||||
AD_MODE_VOLTAGE, //电压模式,存储在队列中为电压值
|
||||
};
|
||||
enum BATTERY_MODE {
|
||||
MEAN_FILTERING_MODE = 0, //均值滤波
|
||||
WEIGHTING_MODE = 1, //加权求值
|
||||
};
|
||||
|
||||
//以下为用户常用api
|
||||
/**@brief 获取指定通道原始值,从队列中获取
|
||||
* @param[in] ch 指定通道
|
||||
* @return value 原始值,范围根据采样精度变化
|
||||
*/
|
||||
u32 adc_get_value(enum AD_CH ch);
|
||||
|
||||
/**@brief 获取指定通道电压值,从队列中获取
|
||||
* @param[in] ch 指定通道
|
||||
* @return voltage 电压值, 单位:mv
|
||||
*/
|
||||
u32 adc_get_voltage(enum AD_CH ch);
|
||||
|
||||
/**@brief 将原始值换算为电压值
|
||||
* @param[in] adc_vbg VBG原始值
|
||||
* @param[in] adc_value 需要换算的原始值
|
||||
* @return voltage 换算得到的电压值, 单位:mv
|
||||
*/
|
||||
u32 adc_value_to_voltage(u32 adc_vbg, u32 adc_value);
|
||||
|
||||
/**@brief 阻塞式采集指定通道原始值,采集一次
|
||||
* @param[in] ch 指定通道
|
||||
* @return value 原始值,范围根据采样精度变化
|
||||
*/
|
||||
u32 adc_get_value_blocking(enum AD_CH ch);
|
||||
|
||||
/**@brief 阻塞式采集指定通道原始值,采集 sample_times次, 求平均值
|
||||
* @param[in] ch 指定通道
|
||||
* @param[in] sample_times 采样次数
|
||||
* @return value 原始值,范围根据采样精度变化
|
||||
*/
|
||||
u32 adc_get_value_blocking_filter(enum AD_CH ch, u32 sample_times);
|
||||
|
||||
/**@brief 阻塞式采集指定通道电压值,采集一次
|
||||
* @param[in] ch 指定通道
|
||||
* @return voltage 电压值, 单位:mv
|
||||
*/
|
||||
u32 adc_get_voltage_blocking(enum AD_CH ch);
|
||||
|
||||
/**@brief 阻塞式采集指定通道电压值,采集 sample_times次, 求平均值
|
||||
* @param[in] ch 指定通道
|
||||
* @param[in] sample_times 采样次数
|
||||
* @return voltage 电压值, 单位:mv
|
||||
*/
|
||||
u32 adc_get_voltage_blocking_filter(enum AD_CH ch, u32 sample_times);
|
||||
|
||||
/**@brief 将IO通道转换为合法的AD通道 如:传入IO_PORTA_00, 返回AD_CH_IO_PA0
|
||||
* @param[in] gpio IO通道
|
||||
* @return ch 合法的AD通道
|
||||
*/
|
||||
u32 adc_io2ch(int gpio);
|
||||
|
||||
/**@brief 添加指定通道到队采样队列中
|
||||
* @param[in] ch 指定通道
|
||||
* @return num 通道在队列中的编号
|
||||
*/
|
||||
u32 adc_add_sample_ch(enum AD_CH ch);
|
||||
|
||||
/**@brief 从队采样队列中删除指定通道
|
||||
* @param[in] ch 指定通道
|
||||
* @return num 通道在队列中的编号
|
||||
*/
|
||||
u32 adc_delete_ch(enum AD_CH ch);
|
||||
|
||||
/**@brief 设置指定通道的采样周期
|
||||
* @param[in] ch 指定通道
|
||||
* @param[in] ms 采样周期,单位:ms
|
||||
* @return num 通道在队列中的编号
|
||||
*/
|
||||
u32 adc_set_sample_period(enum AD_CH ch, u32 ms);
|
||||
|
||||
/**@brief 设置指定通道的采样模式,初始化时设置,采样中设置需调用adc_reset刷新队列数据
|
||||
* @param[in] ch 指定通道
|
||||
* @param[in] mode 采样模式, 1:电压模式,队列中存储为电压值,单位:mv; 0:普通模式,队列中存储为原始值
|
||||
* @return num 通道在队列中的编号
|
||||
*/
|
||||
u32 adc_set_voltage_mode(enum AD_CH ch, enum AD_MODE mode);
|
||||
//以上为用户常用api
|
||||
|
||||
|
||||
/**@brief ADC模块初始化
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void adc_init(void);
|
||||
|
||||
/**@brief 触发一次adc队列采集,定时调用
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void adc_scan(void *priv);
|
||||
|
||||
/**@brief ADC模块复位,将已注册的通道全部刷新一次
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void adc_refresh(void);
|
||||
|
||||
/**@brief 打印ADC相关所有信息
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void adc_dump(void);
|
||||
|
||||
/**@brief 获取电池电压
|
||||
* @param[in] 无
|
||||
* @return 电池电压值,单位:mv 注意:底层已做换算,不需要乘以倍数
|
||||
*/
|
||||
u32 gpadc_battery_get_voltage();
|
||||
|
||||
/**@brief 电池电压fifo 刷新
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void gpadc_battery_refresh();
|
||||
|
||||
/**@brief 电池电压采集初始化
|
||||
* @param[in] 无
|
||||
* @return 0
|
||||
*/
|
||||
int gpadc_battery_init();
|
||||
|
||||
/**@brief 电池电压原始数据采集补偿
|
||||
* @param[in] offset 补偿值
|
||||
* @return 0
|
||||
*/
|
||||
void gpadc_battery_set_offset(int offset);
|
||||
|
||||
|
||||
//兼容老版本芯片
|
||||
u32 adc_check_vbat_lowpower();
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,79 @@
|
||||
#ifndef __GPADC_V4_H__
|
||||
#define __GPADC_V4_H__
|
||||
//适用于 br35
|
||||
|
||||
//ADC_CON0 reg
|
||||
// #define GPADC_CON0_RESERVED 27 //bit27~bit31
|
||||
#define GPADC_CON0_DMA_PND 26
|
||||
#define GPADC_CON0_OV_PND 25
|
||||
#define GPADC_CON0_EOS_PND 24
|
||||
#define GPADC_CON0_EOC_PND 23
|
||||
#define GPADC_CON0_SMP_PND 22
|
||||
#define GPADC_CON0_CAL_PND 21
|
||||
#define GPADC_CON0_ADCRDY_PND 20
|
||||
// #define GPADC_CON0_RESERVED 18 //bit18~bit19
|
||||
#define GPADC_CON0_DMA_STATE 17
|
||||
#define GPADC_CON0_STOP_REQ 16
|
||||
// #define GPADC_CON0_RESERVED 11 //bit11~bit15
|
||||
#define GPADC_CON0_DMA_PND_CLR 10
|
||||
#define GPADC_CON0_OV_PND_CLR 9
|
||||
#define GPADC_CON0_EOS_PND_CLR 8
|
||||
#define GPADC_CON0_EOC_PND_CLR 7
|
||||
#define GPADC_CON0_SMP_PND_CLR 6
|
||||
#define GPADC_CON0_CAL_PND_CLR 5
|
||||
#define GPADC_CON0_ADCRDY_PND_CLR 4
|
||||
#define GPADC_CON0_ADCDIS_KST 3
|
||||
#define GPADC_CON0_STOP_KST 2
|
||||
#define GPADC_CON0_SOFT_KST 1
|
||||
#define GPADC_CON0_CAL_KST 0
|
||||
|
||||
|
||||
//ADC_CON1 reg
|
||||
// #define GPADC_CON1_RESERVED 26 //bit26~bit31
|
||||
#define GPADC_CON1_DMA_MOD 25
|
||||
#define GPADC_CON1_ALIGN 24
|
||||
#define GPADC_CON1_OVSMP_SHIFT 20 //bit20~bit23
|
||||
#define GPADC_CON1_OVSMP_EN 19
|
||||
#define GPADC_CON1_OVSMP_LEN 9 //bit9~bit18
|
||||
#define GPADC_CON1_DATA_RES 7 //bit7~bit8
|
||||
#define GPADC_CON1_AUTO_OFF 6
|
||||
#define GPADC_CON1_OV_MOD 5
|
||||
#define GPADC_CON1_CONT 4
|
||||
#define GPADC_CON1_DISCEN 3
|
||||
#define GPADC_CON1_WAIT_EOC 2
|
||||
#define GPADC_CON1_DMA_EN 1
|
||||
#define GPADC_CON1_ADC_EN 0
|
||||
|
||||
|
||||
//ADC_CON2 reg
|
||||
// #define GPADC_CON2_RESERVED 28 //bit28~bit31
|
||||
#define GPADC_CON2_DMA_PND_IE 27
|
||||
#define GPADC_CON2_OV_PND_IE 26
|
||||
#define GPADC_CON2_EOS_PND_IE 25
|
||||
#define GPADC_CON2_EOC_PND_IE 24
|
||||
#define GPADC_CON2_SMP_PND_IE 23
|
||||
// #define GPADC_CON2_RESERVED 22
|
||||
#define GPADC_CON2_ADCRDY_PND_IE 21
|
||||
#define GPADC_CON2_PWRUP_WAIT 14 //bit14~bit20
|
||||
#define GPADC_CON2_SMP_DIV 6 //bit6~bit13
|
||||
#define GPADC_CON2_SEQ_LEN 2 //bit2~bit5
|
||||
#define GPADC_CON2_CSPT_CMP 0 //bit0~bit1
|
||||
|
||||
|
||||
//ADC_CON3 reg
|
||||
#define GPADC_CON3_TRIG_WAIT 16 //bit16~bit31
|
||||
// #define GPADC_CON3_RESERVED 15 //bit8~bit15
|
||||
#define GPADC_CON3_TRIG_EN 7
|
||||
#define GPADC_CON3_TRIGGER_MOD 5 //bit5~bit6
|
||||
#define GPADC_CON3_TRIGGER_SEL 5 //bit0~bit4
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,134 @@
|
||||
#ifndef __GPTIMER_H__
|
||||
#define __GPTIMER_H__
|
||||
|
||||
#include "asm/gptimer_hw.h"
|
||||
|
||||
extern const u32 lib_gptimer_src_lsb_clk; //时钟源选择lsb_clk, 单位:Hz
|
||||
extern const u32 lib_gptimer_src_std_clk; //时钟源选择std_x_clk, 单位:Hz
|
||||
extern const u8 lib_gptimer_timer_mode_en; //gptimer timer功能使能
|
||||
extern const u8 lib_gptimer_pwm_mode_en; //gptimer pwm功能使能
|
||||
extern const u8 lib_gptimer_capture_mode_en; //gptimer capture功能使能
|
||||
extern const u8 lib_gptimer_auto_tid_en; //gptimer_tid 内部自动分配使能
|
||||
|
||||
enum gptimer_mode : u8 {
|
||||
GPTIMER_MODE_TIMER = 0, //定时模式
|
||||
GPTIMER_MODE_PWM, //pwm模式
|
||||
GPTIMER_MODE_CAPTURE_EDGE_RISE, //上升沿捕获
|
||||
GPTIMER_MODE_CAPTURE_EDGE_FALL, //下降沿捕获
|
||||
GPTIMER_MODE_CAPTURE_EDGE_ANYEDGE, //双边沿捕获
|
||||
};
|
||||
enum gptimer_para : u8 { //从寄存器当前状态获取timer参数
|
||||
GPTIMER_PARA_PERIOD = 0,
|
||||
GPTIMER_PARA_FREQ,
|
||||
GPTIMER_PARA_DUTY,
|
||||
GPTIMER_PARA_CAPTURE,
|
||||
};
|
||||
enum gptimer_err : u8 { //返回值类型
|
||||
GPTIMER_ERR_INIT_FAIL = 0xFF,
|
||||
};
|
||||
|
||||
typedef void (*timer_irq_callback)(u32 tid, void *private_data); //回调函数
|
||||
struct gptimer_timer { //计时（计数）器配置
|
||||
u32 period_us;
|
||||
};
|
||||
struct gptimer_pwm { //pwm配置
|
||||
u32 freq;
|
||||
enum gpio_port port;
|
||||
u16 pin;
|
||||
u16 duty; //x10000
|
||||
};
|
||||
struct gptimer_capture { //捕获配置
|
||||
u32 filter; //需要滤除的频率，单位 Hz
|
||||
u32 max_period; //最大捕获周期, 单位:us, 需要用到才配置,默认配置0
|
||||
enum gpio_port port;
|
||||
u16 pin;
|
||||
};
|
||||
|
||||
struct gptimer_config {
|
||||
union {
|
||||
struct gptimer_timer timer;
|
||||
struct gptimer_pwm pwm;
|
||||
struct gptimer_capture capture;
|
||||
};
|
||||
timer_irq_callback irq_cb;
|
||||
void *private_data; //用户参数
|
||||
u8 irq_priority;
|
||||
enum gptimer_mode mode; //工作模式
|
||||
};
|
||||
|
||||
//以下为对外 api 接口---------------------------------------------------------
|
||||
u32 gptimer_init(const timer_dev timerx, const struct gptimer_config *gt_cfg);
|
||||
u32 gptimer_deinit(u32 tid);
|
||||
u32 gptimer_start(u32 tid);
|
||||
u32 gptimer_pause(u32 tid);
|
||||
u32 gptimer_resume(u32 tid);
|
||||
u32 gptimer_set_timer_period(u32 tid, u32 period_us);
|
||||
u32 gptimer_get_timer_period(u32 tid);
|
||||
u32 gptimer_set_pwm_freq(u32 tid, u32 freq);
|
||||
u32 gptimer_get_pwm_freq(u32 tid);
|
||||
u32 gptimer_set_pwm_duty(u32 tid, u32 duty);
|
||||
u32 gptimer_get_pwm_duty(u32 tid);
|
||||
u32 gptimer_pwm_flip(u32 tid);
|
||||
u32 gptimer_pwm_enable(u32 tid);
|
||||
u32 gptimer_pwm_disable(u32 tid);
|
||||
u32 gptimer_set_capture_edge_type(u32 tid, enum gptimer_mode edge_type);
|
||||
enum gptimer_mode gptimer_get_capture_edge_type(u32 tid);
|
||||
u32 gptimer_set_irq_callback(u32 tid, void (*irq_cb)(u32 tid, void *private_data));
|
||||
enum gptimer_mode gptimer_get_work_mode(u32 tid);
|
||||
u32 gptimer_set_work_mode(u32 tid, enum gptimer_mode type);
|
||||
u32 gptimer_set_capture_filter(u32 tid, u32 filter);
|
||||
u32 gptimer_get_capture_filter(u32 tid);
|
||||
u32 gptimer_set_capture_count(u32 tid, u32 cnt);
|
||||
u32 gptimer_get_capture_count(u32 tid);
|
||||
u32 gptimer_get_capture_cnt2us(u32 tid); //捕获发生时调用有效
|
||||
u32 gptimer_set_count(u32 tid, u32 cnt);
|
||||
u32 gptimer_get_count(u32 tid);
|
||||
u32 gptimer_set_prd(u32 tid, u32 prd);
|
||||
u32 gptimer_get_prd(u32 tid);
|
||||
void *gptimer_get_private_data(u32 tid);
|
||||
void gptimer_set_private_data(u32 tid, void *private_data);
|
||||
|
||||
u32 gptimer_measure_time_init(const timer_dev timerx, u32 max_time_us); //比实际时间少约40us
|
||||
u32 gptimer_measure_time_start(u32 tid);
|
||||
u32 gptimer_measure_time_end(u32 tid);
|
||||
void gptimer_set_extern_clk(u32 tid, u32 clk_freq, enum gpio_port port, u16 pin, u8 enable);
|
||||
void gptimer_dump();
|
||||
|
||||
|
||||
|
||||
|
||||
//以下为底层驱动接口，直接操作寄存器---------------------------------------------------------
|
||||
u32 timer_hw_timer_init(GPTIMER *GPTIMERx, u32 period_us, u32 priority, void (*irq_cb)(u32 tid, void *private_data));
|
||||
u32 timer_hw_pwm_init(GPTIMER *GPTIMERx, enum gpio_port port, u32 pin, u32 freq, u32 duty);
|
||||
u32 timer_hw_capture_init(GPTIMER *GPTIMERx, enum gpio_port port, u32 pin, u32 edge_type, u32 filter, u32 max_period, u32 priority, void (*irq_cb)(u32 tid, void *private_data));
|
||||
// void timer_hw_deinit(GPTIMER *GPTIMERx);
|
||||
void timer_hw_timer_deinit(GPTIMER *GPTIMERx);
|
||||
void timer_hw_pwm_deinit(GPTIMER *GPTIMERx, enum gpio_port port, u32 pin);
|
||||
void timer_hw_capture_deinit(GPTIMER *GPTIMERx, enum gpio_port port, u32 pin, u32 filter);
|
||||
void timer_hw_start(GPTIMER *GPTIMERx, enum gptimer_mode mode);
|
||||
u32 timer_hw_pause(GPTIMER *GPTIMERx);
|
||||
u32 timer_hw_set_cur_para(GPTIMER *GPTIMERx, enum gptimer_para para_type, u32 para0, u32 para1);
|
||||
u32 timer_hw_get_cur_para(GPTIMER *GPTIMERx, enum gptimer_para para_type);
|
||||
void timer_hw_pwm_flip(GPTIMER *GPTIMERx);
|
||||
void timer_hw_pwm_enable(GPTIMER *GPTIMERx);
|
||||
void timer_hw_pwm_disable(GPTIMER *GPTIMERx);
|
||||
void timer_hw_set_irq_cb(GPTIMER *GPTIMERx, void (*irq_cb)(u32 tid, void *private_data), u8 priority);
|
||||
void timer_hw_set_work_mode(GPTIMER *GPTIMERx, enum gptimer_mode type);
|
||||
u32 timer_hw_get_work_mode(GPTIMER *GPTIMERx);
|
||||
u32 timer_hw_get_capture_filter(GPTIMER *GPTIMERx);
|
||||
void timer_hw_set_cnt(GPTIMER *GPTIMERx, int cnt);
|
||||
u32 timer_hw_get_cnt(GPTIMER *GPTIMERx);
|
||||
void timer_hw_set_prd(GPTIMER *GPTIMERx, u32 prd);
|
||||
u32 timer_hw_get_prd(GPTIMER *GPTIMERx);
|
||||
|
||||
u32 hw_irflt_set_clk(u32 *clk_src_set, u32 *clk_div_set, u32 filter);
|
||||
GPTIMER *timer_hw_tid2timer(u32 tid);
|
||||
void timer_hw_clr_pnd(GPTIMER *GPTIMERx);
|
||||
u32 timer_hw_idle_check(GPTIMER *GPTIMERx);
|
||||
u32 timer_hw_tick2us(GPTIMER *GPTIMERx, u32 tick);
|
||||
|
||||
void timer_hw_set_extern_clk(GPTIMER *GPTIMERx, u32 clk_freq, enum gpio_port port, u16 pin, u8 enable);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,51 @@
|
||||
#ifndef __GPTIMER_HW_V5_H__
|
||||
#define __GPTIMER_HW_V5_H__
|
||||
|
||||
/* JL_TIMERx->CON */
|
||||
#define TIMER_MODE 0b11
|
||||
//工作模式选择
|
||||
#define TIMER_MODE_DISABLE (0b00 << 0) //关闭TIMER功能
|
||||
#define TIMER_MODE_TIME (0b01 << 0) //定时、计数模式
|
||||
#define TIMER_MODE_RISE (0b10 << 0) //上升沿捕获
|
||||
#define TIMER_MODE_FALL (0b11 << 0) //下降沿捕获
|
||||
//捕获模式端口选择
|
||||
#define TIMER_CESL_IO (0b00 << 2) //IO口输入
|
||||
#define TIMER_CESL_IRFLT (0b01 << 2) //IRFLT滤波
|
||||
//时钟源和分频系数偏移
|
||||
#define TIMER_PSET 4 //分频系数
|
||||
#define TIMER_SSEL 10 //时钟源
|
||||
//时钟源和分频系数所占位
|
||||
#define TIMER_PSET_ 0xf0 //分频系数
|
||||
#define TIMER_SSEL_ 0x3c00 //时钟源
|
||||
//PWM使能
|
||||
#define TIMER_PWM_EN (0b1 << 8) //PWM输出使能
|
||||
//PWM输出反向使能
|
||||
#define TIMER_PWM_INV (0b1 << 9) //PWM输出反向使能
|
||||
//清PND
|
||||
#define TIMER_PCLR (0b1 << 14) //清PND 只写位
|
||||
//PND
|
||||
#define TIMER_PND (0b1 << 15) //清PND 只读位
|
||||
//双边沿捕获使能
|
||||
#define TIMER_DUAL_EDGE_EN (0b1 << 16) //使能双边沿捕获模式,上升沿或下降沿捕获模式使能时有效
|
||||
#define TIMER_RMT_TX (0b1 << 18)
|
||||
#define TIMER_RMT_RX (0b1 << 19)
|
||||
|
||||
/* JL_IR->RFLT_CON */
|
||||
typedef struct _irfltx_con_reg {
|
||||
volatile u32 RFLTx_CON;
|
||||
} IRFLTx_CON_REG;
|
||||
#define IR_BASE_ADDR (&GPTIMER0->IRFLT)
|
||||
#define IR_OFFSET (&GPTIMER1->IRFLT - &GPTIMER0->IRFLT)
|
||||
//IRFLT模块使能
|
||||
#define IRFLT_EN (0b1 << 0) //使能红外滤波功能
|
||||
//时钟源和分频系数偏移
|
||||
#define IRFLT_TSRC 2 //时钟源
|
||||
#define IRFLT_PSEL 4 //分频系数
|
||||
//时钟源和分频系数所占位
|
||||
#define IRFLT_TSRC_ 0xc //时钟源
|
||||
#define IRFLT_PSEL_ 0xf0 //分频系数
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,51 @@
|
||||
#ifndef __IR_DECODER_H__
|
||||
#define __IR_DECODER_H__
|
||||
|
||||
#include "cpu.h"
|
||||
#include "gptimer.h"
|
||||
|
||||
/**@brief 红外解码功能初始化
|
||||
* @param[in] gpio 接收引脚
|
||||
* @return 无
|
||||
*/
|
||||
void ir_decoder_init(const struct gptimer_config *gt_cfg);
|
||||
|
||||
/**@brief 红外解码功能释放
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void ir_decoder_deinit();
|
||||
|
||||
/**@brief 获取红外原始数据
|
||||
* @param[in] 无
|
||||
* @return 红外原始数据,4*8bit = (命令反码 + 命令码 + 地址反码 +地址码)
|
||||
*/
|
||||
u32 ir_decoder_get_data(void);
|
||||
|
||||
/**@brief 获取红外命令码,内部校验
|
||||
* @param[in] 无
|
||||
* @return 红外命令码 cmd
|
||||
*/
|
||||
u32 ir_decoder_get_command_value(void);
|
||||
|
||||
/**@brief 获取红外命令码,内部不校验
|
||||
* @param[in] 无
|
||||
* @return 红外命令码 cmd
|
||||
*/
|
||||
u32 ir_decoder_get_command_value_uncheck(void);
|
||||
|
||||
/**@brief 获取红外地址码,内部校验
|
||||
* @param[in] 无
|
||||
* @return 红外地址码 addr
|
||||
*/
|
||||
u32 ir_decoder_get_address_value(void);
|
||||
|
||||
/**@brief 获取红外地址码,内部不校验
|
||||
* @param[in] 无
|
||||
* @return 红外地址码 addr
|
||||
*/
|
||||
u32 ir_decoder_get_address_value_uncheck(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,35 @@
|
||||
#ifndef __IR_ENCODER_H__
|
||||
#define __IR_ENCODER_H__
|
||||
|
||||
#include "cpu.h"
|
||||
|
||||
/**@brief 红外编码功能初始化
|
||||
* @param[in] gpio 发送引脚
|
||||
* @param[in] freq 红外载波频率,NEC格式为38KHz
|
||||
* @param[in] duty 红外载波占空比,满量程为10000
|
||||
* @return 无
|
||||
*/
|
||||
void ir_encoder_init(u32 gpio, u32 freq, u32 duty); //gpio:发送脚, freq:载波频率, duty:占空比,满量程10000
|
||||
|
||||
/**@brief 红外编码功能释放
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void ir_encoder_deinit();
|
||||
|
||||
/**@brief 启动一次发送
|
||||
* @param[in] ir_addr 红外地址码
|
||||
* @param[in] ir_cmd 红外命令码
|
||||
* @param[in] repeat_en 重复码发送使能
|
||||
* @return 0:启动发送成功 非0:发送失败
|
||||
*/
|
||||
u32 ir_encoder_tx(u8 ir_addr, u8 ir_cmd, u8 repeat_en); //addr:地址码, cmd:命令码, repeat_en:重复码发送使能
|
||||
|
||||
/**@brief 停止发送重复码
|
||||
* @param[in] 无
|
||||
* @return 无
|
||||
*/
|
||||
void ir_encoder_repeat_stop();
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,91 @@
|
||||
#ifndef __PWM_LED_H__
|
||||
#define __PWM_LED_H__
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
/****************************************************************************************************************
|
||||
|
||||
模块说明 ：（必看）
|
||||
|
||||
通常我们对PWM的认知是：就一种PWM波形，在一个周期内，由高电平和低电平组成，它们所占时间比例可调。
|
||||
但是，LED_PWM不是这样的，他有两种PWM波形:
|
||||
第一种PWM波形是：在一个周期内，由高电平和高阻态组成，它们所占时间比例可调。在此命名为 h_pwm
|
||||
第二种PWM波形是：在一个周期内，由低电平和高阻态组成，它们所占时间比例可调。在此命名为 l_pwm
|
||||
|
||||
高阻态可能是不定的电平，它的电平由外部电路决定，高阻态不会对外围电路起作用。比如接led灯，高阻态不会使灯亮的
|
||||
|
||||
******************************************************************************************************************/
|
||||
|
||||
// *INDENT-OFF*
|
||||
typedef struct pwm_led_platform_data {
|
||||
u8 port0; //输出波形的引脚
|
||||
u8 port1; //输出波形的引脚
|
||||
u8 first_logic; //0,先送出h_pwm 1:先送出l_pwm
|
||||
u8 alternate_out; //范围0~7，两种波形(h_pwm和l_pwm)交替输出，每种波形输出的周期个数。当值为0时：则关闭交替输出模式，那么波形由first_logic决定。
|
||||
u32 pwm_cycle; //pwm的周期，单位10us
|
||||
u32 ctl_cycle; //控制周期, 单位ms, 比如每5s输出一次0.1s的pwm，那么5s就是控制周期
|
||||
u8 ctl_cycle_num; //控制周期的个数，值为0时，则控制周期无限循环， 值为n时， 则第n次控制周期之后，模块自动关闭
|
||||
u8 h_pwm_duty; //h_pwm 占空比0~100, 呼吸模式时，为最大占空比
|
||||
u8 l_pwm_duty; //l_pwm 占空比0~100, 呼吸模式时，为最大占空比
|
||||
u8 out_mode; //0：占空比固定模式, 一个控制周期输出一次pwm 1：占空比固定模式，一个控制周期输出两次pwm 2：占空比呼吸变化模式
|
||||
union {
|
||||
//固定波形输出模式,一个控制周期内只输出一次pwm
|
||||
struct {
|
||||
u32 pwm_out_time; //输出pwm的时间，单位ms
|
||||
} out_once;
|
||||
//固定波形输出模式,一个控制周期内输出两次pwm
|
||||
struct {
|
||||
u32 first_pwm_out_time; //第一次输出pwm的时间,单位ms
|
||||
u32 second_pwm_out_time; //第二次输出pwm的时间,单位ms
|
||||
u32 pwm_gap_time; //第一次和第二次的间隙时间,单位ms
|
||||
} out_twice;
|
||||
//呼吸变化输出模式，即PWM的占空比是变化的
|
||||
struct {
|
||||
u32 pwm_out_time; //输出pwm的时间，单位ms, 等于 占空比自增自减的时间 + 最大占空比保持的时间
|
||||
u32 pwm_duty_max_keep_time; //pwm占空比增到最大的时候， 至少维持的时间，单位ms, 该时间要小于 pwm_out_time
|
||||
} out_breathe;
|
||||
};
|
||||
void (*cbfunc)(u32 cbpriv); //中断回调函数
|
||||
u32 cbpriv;
|
||||
} pwm_led_pdata_t;
|
||||
|
||||
|
||||
struct pwm_led_status_t {
|
||||
u8 dir;
|
||||
u8 level;
|
||||
u16 cur_cnt;
|
||||
u16 cnt_max;
|
||||
u16 next_cnt_max;
|
||||
u32 cnt_unit;
|
||||
};
|
||||
|
||||
|
||||
|
||||
#define PWM_LED_PLATFORM_DATA_BEGIN(data) \
|
||||
struct pwm_led_platform_data data = {
|
||||
|
||||
#define PWM_LED_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
|
||||
|
||||
void pwm_led_hw_init(void *pdata);
|
||||
|
||||
void pwm_led_hw_close(void);
|
||||
|
||||
void pwm_led_io_mount(void);
|
||||
|
||||
void pwm_led_io_unmount(void);
|
||||
|
||||
u32 pwm_led_is_working(void);
|
||||
|
||||
void pwm_led_get_sync_status(struct pwm_led_status_t *status);
|
||||
|
||||
u32 pwm_led_set_sync(struct pwm_led_status_t *status, u32 how_long_ago, u32 *sync_time);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
#ifndef _RDEC_H
|
||||
#define _RDEC_H
|
||||
|
||||
#include "asm/rdec_hw.h"
|
||||
|
||||
#define RDEC_FREQ (1000*16)//预设采样频率
|
||||
#define RDEC_TIME 10000 //预设定时模式定时周期 单位:us
|
||||
|
||||
typedef enum : u8 {
|
||||
RDEC_PHASE_1 = 0,
|
||||
RDEC_PHASE_2,
|
||||
RDEC_PHASE_4,
|
||||
} rdec_phase_mode;
|
||||
|
||||
typedef enum : u8 {
|
||||
RDEC_WORK_AUTO = 0, //自动增减
|
||||
RDEC_WORK_TIMER, //定时模式
|
||||
RDEC_WORK_INTR, //中断模式
|
||||
} rdec_work_mode;
|
||||
|
||||
typedef void (*rdec_irq_callback)(u32 id); //回调函数
|
||||
|
||||
struct rdec_config {
|
||||
u32 rdec_a; //编码器A相
|
||||
u32 rdec_b; //编码器B相
|
||||
rdec_phase_mode phase_mode; //编码器模式
|
||||
rdec_work_mode work_mode; //工作模式
|
||||
rdec_dev rdec_x;//硬件模块选择
|
||||
u8 irq_priority;
|
||||
rdec_irq_callback irq_cb;
|
||||
};
|
||||
|
||||
u32 rdec_init(const struct rdec_config *cfg);
|
||||
u32 rdec_deinit(u32 id);
|
||||
u32 rdec_start(u32 id);
|
||||
u32 rdec_pause(u32 id);
|
||||
u32 rdec_resume(u32 id);
|
||||
int rdec_get_value(u32 id);
|
||||
void rdec_dump();
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,46 @@
|
||||
#ifndef __RDEC_SOFT_H__
|
||||
#define __RDEC_SOFT_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define RDEC_MAX_NUM 1 //软件rdec最大支持数量
|
||||
|
||||
typedef enum : u8 {
|
||||
RDEC_SOFT_PHASE_1, //半码
|
||||
RDEC_SOFT_PHASE_2, //全码
|
||||
RDEC_SOFT_PHASE_2_ADC, //全码 adc单线采集 rdec_a配置IO, rdec_b配置-1
|
||||
} rdec_mode;
|
||||
enum rdec_soft_err : u8 {
|
||||
RDEC_SOFT_ERR_INIT_FAIL = 0xFF,
|
||||
};
|
||||
struct rdec_soft_config {
|
||||
u32 rdec_a; //编码器A相IO口
|
||||
u32 rdec_b; //编码器B相IO口
|
||||
u16 filter_us; //软件滤波参数,单位:us
|
||||
rdec_mode mode; //编码器工作模式
|
||||
const u8 tid; //使用的timer_id, 必须手动分配固定timer_id,不能使用内部自动分配
|
||||
};
|
||||
|
||||
/**@brief 旋转编码器(软件方式)功能初始化
|
||||
* @param[in] *cfg rdec_soft_config定义的结构体指针
|
||||
* @return tid:初始化成功分配的id号 -1:初始化失败
|
||||
*/
|
||||
u32 rdec_soft_init(const struct rdec_soft_config *cfg);
|
||||
|
||||
/**@brief 旋转编码器(软件方式)功能释放
|
||||
* @param[in] id 初始化成功返回的id号
|
||||
* @return 无
|
||||
*/
|
||||
void rdec_soft_deinit(u32 id);
|
||||
|
||||
void rdec_soft_start(u32 id);
|
||||
void rdec_soft_pause(u32 id);
|
||||
void rdec_soft_resume(u32 id);
|
||||
|
||||
/**@brief 获取计数值
|
||||
* @param[in] id 初始化成功返回的id号
|
||||
* @return value 当前累计的计数值,带方向
|
||||
*/
|
||||
int rdec_soft_get_value(u32 id);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,18 @@
|
||||
#ifndef __ANCTOOL_H__
|
||||
#define __ANCTOOL_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
struct anctool_data {
|
||||
void (*send_packet)(u8 *data, u16 size);
|
||||
void (*recv_packet)(u8 *data, u16 size);
|
||||
};
|
||||
|
||||
void anctool_api_rx_data(u8 *buf, u16 len);
|
||||
u8 *anctool_api_write_alloc(u16 len);
|
||||
void anctool_api_set_active(u8 active);
|
||||
u16 anctool_api_write(u8 *buf, u16 length);
|
||||
void anctool_api_init(const struct anctool_data *arg);
|
||||
void anctool_api_uninit(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,105 @@
|
||||
#ifndef __chargebox_H__
|
||||
#define __chargebox_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define DEVICE_EVENT_FROM_CHARGEBOX (('C' << 24) | ('H' << 16) | ('B' << 8) | '\0')
|
||||
|
||||
enum {
|
||||
CMD_COMPLETE,
|
||||
CMD_RECVDATA,
|
||||
CMD_RECVBYTE,
|
||||
};
|
||||
|
||||
enum {
|
||||
MODE_RECVDATA,
|
||||
MODE_SENDDATA,
|
||||
};
|
||||
|
||||
enum {
|
||||
EAR_L,
|
||||
EAR_R,
|
||||
EAR_MAX,
|
||||
};
|
||||
|
||||
struct chargebox_platform_data {
|
||||
u32 baudrate;
|
||||
u32 L_port;
|
||||
u32 R_port;
|
||||
void (*init)(const struct chargebox_platform_data *);
|
||||
void (*open)(u8 l_r, u8 mode);
|
||||
void (*close)(u8 l_r);
|
||||
u8(*write)(u8 l_r, u8 *data, u8 len);
|
||||
void (*set_baud)(u8 l_r, u32 baudrate);
|
||||
};
|
||||
|
||||
/////handshake部分
|
||||
enum {
|
||||
HS_CMD0,
|
||||
HS_CMD1,
|
||||
HS_CMD2,
|
||||
HS_CMD3,
|
||||
};
|
||||
|
||||
enum {
|
||||
HS_DELAY_48M,
|
||||
HS_DELAY_60M,
|
||||
HS_DELAY_80M,
|
||||
HS_DELAY_96M,
|
||||
HS_DELAY_120M,
|
||||
HS_DELAY_160M,
|
||||
HS_DELAY_192M,
|
||||
HS_DELAY_240M,
|
||||
};
|
||||
|
||||
enum {
|
||||
HS_DELAY_2US,
|
||||
HS_DELAY_3US,
|
||||
HS_DELAY_4US,
|
||||
HS_DELAY_7US,
|
||||
HS_DELAY_8US,
|
||||
HS_DELAY_14US,
|
||||
HS_DELAY_16US,
|
||||
};
|
||||
|
||||
//自定义指令
|
||||
enum {
|
||||
CMD_USER = 0xC0,
|
||||
/*可添加自定义指令*/
|
||||
};
|
||||
|
||||
struct _hs_hdl {
|
||||
u32 port0;
|
||||
u32 port1;
|
||||
void (*send_delay_us)(u8 us);
|
||||
};
|
||||
|
||||
//handshake
|
||||
void handshake_ctrl_init(struct _hs_hdl *hs);
|
||||
void handshake_send_app(u8 cmd);
|
||||
u8 handshake_check_fast_charge(u32 ms);
|
||||
|
||||
//app层使用的接口
|
||||
bool chargebox_api_write_read(u8 l_r, u8 *buf, u8 len, u8 timeout);
|
||||
void chargebox_api_init(const struct chargebox_platform_data *arg);
|
||||
void chargebox_api_uninit(void);
|
||||
void chargebox_api_set_baud(u8 l_r, u32 baudrate);
|
||||
void chargebox_api_shutdown_port(u8 l_r);
|
||||
void chargebox_api_close_port(u8 l_r);
|
||||
void chargebox_api_open_port(u8 l_r);
|
||||
void chargebox_api_reset(void);//左右耳掉线时调用
|
||||
|
||||
//协议层api
|
||||
u8 chargebox_get_power(u8 lr);
|
||||
u8 chargebox_send_power_close(u8 lr, u8 power, u8 is_charge, u8 other_power);
|
||||
u8 chargebox_send_power_open(u8 lr, u8 power, u8 is_charge, u8 other_power);
|
||||
u8 chargebox_send_shut_down(u8 lr);
|
||||
u8 chargebox_send_restore_sys(u8 lr);
|
||||
u8 chargebox_send_enter_dut(u8 lr);
|
||||
u8 chargebox_send_close_cid(u8 lr, u8 data);
|
||||
u8 chargebox_delete_tws_addr(u8 lr);
|
||||
u8 chargebox_delete_phone_addr(u8 lr);
|
||||
u8 chargebox_delete_all_addr(u8 lr);
|
||||
u8 chargebox_send_L_or_R(u8 lr);
|
||||
u8 chargebox_exchange_addr(void (*get_addr_cb)(u8 lr, u8 *inbuf), void (*exchange_succ_cb)(void));
|
||||
#endif
|
||||
@@ -0,0 +1,87 @@
|
||||
#ifndef __RTC_H__
|
||||
#define __RTC_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "sys_time.h"
|
||||
|
||||
#define CLK_SEL_LRC 1
|
||||
#define CLK_SEL_32K 2
|
||||
#define CLK_SEL_BTOSC 3
|
||||
|
||||
#define USE_VIR_RTC 1
|
||||
|
||||
#define RTC_ALM_WKUP 1
|
||||
#define RTC_OVERFLOW_WKUP 2
|
||||
|
||||
|
||||
extern const int config_rtc_enable;
|
||||
|
||||
struct rtc_config_init {
|
||||
const struct sys_time *default_sys_time;
|
||||
const struct sys_time *default_alarm;
|
||||
void (*cbfun)(u32 event);
|
||||
u32 rtc_clk;
|
||||
u8 alm_en;
|
||||
};
|
||||
|
||||
enum {
|
||||
P11_LPTMR_WKUP_EVENT = 1, //p11定时唤醒事件
|
||||
MSYS_ALARM_WKUP_EVENT,//闹钟唤醒事件
|
||||
MSYS_RTC_1HZ_EVENT,//触发主系统1s更新1次时间事件
|
||||
MSYS_SOFF_WKUP_EVENT,//soff定时唤醒事件
|
||||
LPTMR_INTERRUPT_EVENT,//lptmr中断事件
|
||||
};
|
||||
|
||||
struct set_lptmr1_wkup_time {
|
||||
u64 wkup_us;
|
||||
u8 type;
|
||||
};
|
||||
|
||||
#if 0
|
||||
struct sys_time {
|
||||
u16 year;
|
||||
u8 month;
|
||||
u8 day;
|
||||
u8 hour;
|
||||
u8 min;
|
||||
u8 sec;
|
||||
} _GNU_PACKED_;
|
||||
#endif
|
||||
|
||||
|
||||
//API
|
||||
void vir_rtc_wakeup_enable(u32 wkup_ms);//softoff定时唤醒配置，wkup_ms单位:ms
|
||||
void vir_rtc_wakeup_disable(void);
|
||||
void rtc_set_1s_read_time_switch(u8 sw);
|
||||
|
||||
u64 lptmr1_get_pass_us(void);
|
||||
|
||||
void rtc_dev_init(const struct rtc_config_init *rtc);
|
||||
void rtc_dev_deinit(void);
|
||||
void rtc_read_time(struct sys_time *time);
|
||||
void rtc_write_time(const struct sys_time *time);
|
||||
void rtc_read_alarm(struct sys_time *time);
|
||||
void rtc_write_alarm(const struct sys_time *time);
|
||||
void rtc_debug_dump(void);
|
||||
void rtc_alarm_switch(u32 en);
|
||||
void rtc_save_context_to_vm(void);
|
||||
void rtc_reset_save_time(void);
|
||||
u32 rtc_is_alarm_en(void);
|
||||
u32 rtc_is_alarm_wkup(void);
|
||||
u32 rtc_get_clk_sel(void);
|
||||
|
||||
|
||||
|
||||
bool leapyear(u32 year); //判断是否为闰年
|
||||
u32 year_to_day(u32 year);
|
||||
u32 month_to_day(u32 year, u32 month);
|
||||
void day_to_ymd(u32 day, struct sys_time *sys_time);
|
||||
u32 ymd_to_day(struct sys_time *time);
|
||||
u32 caculate_weekday_by_time(struct sys_time *r_time); //计算当天为星期几
|
||||
u32 get_day_of_month(u32 year, u32 month); //返回每月的天数
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif // __RTC_API_H__
|
||||
@@ -0,0 +1,31 @@
|
||||
#ifndef SDMMC_MODULE_H
|
||||
#define SDMMC_MODULE_H
|
||||
|
||||
|
||||
#include "generic/typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
|
||||
|
||||
#define SD_CMD_DECT 0
|
||||
#define SD_CLK_DECT 1
|
||||
#define SD_IO_DECT 2
|
||||
|
||||
#define SD_PWR_SDPG 0
|
||||
#define SD_PWR_NULL 1
|
||||
|
||||
|
||||
#define SD_CLASS_0 0
|
||||
#define SD_CLASS_2 1
|
||||
#define SD_CLASS_4 2
|
||||
#define SD_CLASS_6 3
|
||||
#define SD_CLASS_10 4
|
||||
|
||||
#define SD_IOCTL_GET_CLASS _IOR('S', 0, 4)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,211 @@
|
||||
#ifndef __TZFLASH_API_H__
|
||||
#define __TZFLASH_API_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "device.h"
|
||||
|
||||
|
||||
struct flash_func_len {
|
||||
u16 all_len;
|
||||
u8 version;
|
||||
u8 func_len;//lb
|
||||
u8 sta_len;//lb
|
||||
u8 func_otp;//lb
|
||||
u8 func_dtr;
|
||||
u8 func_wp;//bp,tb,sec,cmp
|
||||
u8 func_wps;
|
||||
u8 func_wps_op;
|
||||
u8 func_qe;
|
||||
u8 func_srp;
|
||||
u8 func_sus;
|
||||
u8 func_dc;
|
||||
u8 func_drv;
|
||||
u8 func_mpm;//dp
|
||||
|
||||
u8 func_qpi;
|
||||
u8 func_init;
|
||||
u8 func_read_continue;
|
||||
} __attribute__((packed));
|
||||
#define TZFLASH_STA_NUM 4
|
||||
struct flash_sta_cmd {
|
||||
u8 sta_cmd_r[TZFLASH_STA_NUM];
|
||||
u8 sta_cmd_w[TZFLASH_STA_NUM];
|
||||
} __attribute__((packed));
|
||||
|
||||
struct flash_otp_cfg {//flash otp信息
|
||||
u32 otp_offset[5];//otp page的偏移地址组数
|
||||
u16 otp_page_size;//otp的page大小
|
||||
u8 otp_NumberOfpage;//otp的page数量
|
||||
// struct flash_reg lock_cfg[2];//read,write
|
||||
u8 wr_en_cmd;//0x50h:sr,0x06h:wr_en
|
||||
u8 sr_mask[TZFLASH_STA_NUM];
|
||||
u8 sr_value[TZFLASH_STA_NUM];//注意:锁定后不可擦写,sr的值也常是1
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
struct flash_wps_cfg {//flash wps信息
|
||||
u8 wr_en_cmd;//0x50h:sr,0x06h:wr_en
|
||||
u8 sr_mask[TZFLASH_STA_NUM];
|
||||
u8 sr_value[TZFLASH_STA_NUM];
|
||||
// struct flash_reg r_reg_cfg;//read
|
||||
// struct flash_reg w_reg_cfg;//write
|
||||
} __attribute__((packed));
|
||||
|
||||
struct flash_wp_cfg { //写保护配置信息
|
||||
u8 numOfwp_array;//写保护参数的个数
|
||||
u8 wr_en_cmd;//0x50h:sr,06h:
|
||||
u8 sr_mask[TZFLASH_STA_NUM]; //sr要保留或修改的bit
|
||||
struct {
|
||||
u8 sr_value[TZFLASH_STA_NUM]; //写保护sr取值
|
||||
u16 wp_addr;//写保护结束地址,单位K
|
||||
} wp_array[0]; //写保护的组数，修改可变长
|
||||
} __attribute__((packed));
|
||||
|
||||
struct flash_dtr_cfg {
|
||||
s8 x1_dummy;//-1:使用默认值
|
||||
s8 x2_dummy;//-1:使用默认值
|
||||
s8 x4_dummy;//-1:使用默认值,-2:不支持
|
||||
} __attribute__((packed));
|
||||
|
||||
struct flash_io_drv {
|
||||
u8 cs_drv: 2;
|
||||
u8 clk_drv: 2;
|
||||
u8 do_drv: 2;
|
||||
u8 di_drv: 2;
|
||||
u8 d2_drv: 2;
|
||||
u8 d3_drv: 2;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct flash_reg {
|
||||
u8 cmd[4];
|
||||
u8 sr_value[4];
|
||||
u8 sr_mask[4];
|
||||
u8 continue_mode: 4;
|
||||
u8 num_of_reg: 2;
|
||||
u8 wr_en_mode: 1;
|
||||
u8 rev: 1;
|
||||
};
|
||||
#define FLASH_SUPPORT_MPM_FUNC 0
|
||||
#define FLASH_SUPPORT_DC_FUNC 0
|
||||
#define FLASH_SUPPORT_QPI_FUNC 0
|
||||
#if FLASH_SUPPORT_MPM_FUNC
|
||||
struct flash_mpm_cfg {//flash 多page模式;无该功能配0
|
||||
u16 mpm_size;//page len:256/512/1024/4096; 默认:0：256byte
|
||||
u8 sr_mask[TZFLASH_STA_NUM];
|
||||
u8 sr_value[TZFLASH_STA_NUM];
|
||||
u8 wr_en_cmd;//0x50h:sr,0x06h:wr_en
|
||||
//页擦除命令擦除大小为mpm_size
|
||||
} __attribute__((packed));
|
||||
#endif
|
||||
|
||||
#if FLASH_SUPPORT_DC_FUNC
|
||||
//dummy:cfg
|
||||
//spi模式下:str:bbh,ebh
|
||||
// dtr:bdh,edh
|
||||
//qpi: dtr:0dh,edh
|
||||
struct flash_dc_cfg {//flash dc信息。
|
||||
u32 dtr_freq;
|
||||
u32 str_freq;
|
||||
u8 dtr_2io_NumberOfdummy;//bdh 含M7-M0
|
||||
u8 dtr_4io_NumberOfdummy;//edh 含M7-M0
|
||||
u8 str_2io_NumberOfdummy;//bbh 含M7-M0
|
||||
u8 str_4io_NumberOfdummy;//ebh 含M7-M0
|
||||
// struct flash_reg reg_cfg[2];//read,write
|
||||
u8 sr_mask[TZFLASH_STA_NUM];//set DC
|
||||
u8 sr_value[TZFLASH_STA_NUM];
|
||||
u8 wr_en_cmd;//0x50h:sr,0x06h:wr_en
|
||||
} __attribute__((packed));
|
||||
#endif
|
||||
#if FLASH_SUPPORT_QPI_FUNC
|
||||
//dummy:cfg
|
||||
//qpi: str:0bh,ebh(C0H)
|
||||
// dtr:0dh,edh(DC)
|
||||
struct flash_qpi_cfg {//flash dc信息
|
||||
u32 dtr_freq;
|
||||
u32 str_freq;
|
||||
u8 dtr_1io_NumberOfdummy;//0dh
|
||||
u8 dtr_4io_NumberOfdummy;//edh
|
||||
u8 str_1io_NumberOfdummy;//0bh
|
||||
u8 str_4io_NumberOfdummy;//ebh
|
||||
// struct flash_reg reg_cfg[2];//read,write
|
||||
u8 sr_mask[TZFLASH_STA_NUM];//set DC,cmd_w与qpi_cmd_w只能二选一,不能同时赋值
|
||||
u8 sr_value[TZFLASH_STA_NUM];//set DC
|
||||
u8 wr_en_cmd; //set DC//0x50h:sr,0x06h:wr_en
|
||||
|
||||
u8 qpi_cmd_w;//set C0H
|
||||
u8 qpi_dummy_wl_value;//dummy & wrap len
|
||||
u8 qpi_dummy_wl_mask;//cmd_w与qpi_cmd_w只能二选一,不能同时赋值
|
||||
} __attribute__((packed));
|
||||
#endif
|
||||
|
||||
|
||||
struct flash_wps_area_cfg {
|
||||
u32 start_addr;//任意地址,非对齐时不包含地址所在块
|
||||
u32 end_addr;//任意地址,非对齐时不包含地址所在块
|
||||
u8 lock_en;//1:保护, 0:解保护
|
||||
} __attribute__((packed)); //size(1byte)
|
||||
|
||||
typedef enum {
|
||||
TEE_SUCCESS = 0,
|
||||
|
||||
TEE_ERROR_TZASC_OUT_OF_IDX = 1,
|
||||
TEE_ERROR_TZASC_IDX_CONFLICT = 2,
|
||||
TEE_ERROR_TZASC_IDX_ACCESS_DENIED = 3,
|
||||
|
||||
TEE_ERROR_TZMPU_OUT_OF_IDX = 4,
|
||||
TEE_ERROR_TZMPU_IDX_CONFLICT = 5,
|
||||
TEE_ERROR_TZMPU_IDX_ACCESS_DENIED = 6,
|
||||
|
||||
TEE_ERROR_OUT_OF_MEMORY = 7,
|
||||
TEE_ERROR_NOT_FOUND_TA = 8,
|
||||
|
||||
TEE_ERROR_EINVAL = 22, /* Invalid argument */
|
||||
|
||||
TEE_ERROR_ACCESS_DENIED = 23,
|
||||
|
||||
|
||||
} TEE_Result;
|
||||
|
||||
struct tzspi_target {
|
||||
void (*suspend)(u32 id);
|
||||
void (*resume)(u32 id);
|
||||
};
|
||||
|
||||
#define REGISTER_TZSPI_TARGET(target) \
|
||||
const struct tzspi_target target SEC_USED(.tzspi_target)
|
||||
|
||||
extern const struct tzspi_target tzspi_target_begin[];
|
||||
extern const struct tzspi_target tzspi_target_end[];
|
||||
|
||||
#define list_for_each_tzspi_target(p) \
|
||||
for (p = tzspi_target_begin; p < tzspi_target_end; p++)
|
||||
|
||||
|
||||
|
||||
int tzflash_init(void *arg);
|
||||
int tzflash_origin_read(u8 *buf, u32 offset, u32 len);
|
||||
int tzflash_read(void *buf, u32 len, u32 offset);
|
||||
int tzflash_write(const void *buf, u32 len, u32 offset);
|
||||
int tzflash_ioctl(u32 cmd, u32 arg);
|
||||
void tzflash_dump();
|
||||
|
||||
|
||||
u32 sfc0_flash_addr2cpu_addr(u32 offset);
|
||||
void tzflash_read_uuid(u8 *buf);
|
||||
u8 *tzflash_get_uuid(void);
|
||||
|
||||
u32 tzflash_erase_otp();
|
||||
u32 tzflash_read_otp(void *buf, u32 len, u32 addr);
|
||||
u32 tzflash_write_otp(const u8 *buf, u32 len, u32 addr);
|
||||
|
||||
void tzflash_vm_info_set(void *_arg, u8 early_mode);
|
||||
|
||||
|
||||
void tzflash_mutex_enter();
|
||||
void tzflash_mutex_exit();
|
||||
|
||||
int tzflash_set_write_protect(u32 lock_en, u32 wp_s_addr, u32 wp_e_addr);
|
||||
void tzflash_change_mode();//dtr(clk),continue,wps
|
||||
u32 syscfg_read_otp(u32 id, u8 *buf, u32 len);
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,14 @@
|
||||
#ifndef __CUSTOM_HID_H__
|
||||
#define __CUSTOM_HID_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "usb/usb.h"
|
||||
|
||||
u32 custom_hid_tx_data(const usb_dev usb_id, const u8 *buffer, u32 len);
|
||||
int custom_hid_get_ready(const usb_dev usb_id);
|
||||
void custom_hid_set_rx_hook(void *priv, void (*rx_hook)(void *priv, u8 *buf, u32 len));
|
||||
u32 custom_hid_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
u32 custom_hid_register(usb_dev usb_id);
|
||||
void custom_hid_release();
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,99 @@
|
||||
/**@file descriptor.h
|
||||
* @brief 各种描述符头文件
|
||||
* @details 结构体声明，功能函数声明
|
||||
* @author jieli
|
||||
* @date 2021-9-1
|
||||
* @version V1.0
|
||||
* @copyright Copyright(c)2010-2021 珠海市杰理科技股份有限公司
|
||||
*********************************************************
|
||||
* @attention
|
||||
* 硬件平台：AC632N
|
||||
* SDK版本：AC632N_V1.0.0_SDK
|
||||
* @修改日志：
|
||||
* <table>
|
||||
* <tr><th>Date <th>Version <th>Author <th>Description
|
||||
* <tr><td>2021-9-1 <td>1.0 <td>jieli <td>创建初始版本
|
||||
* </table>
|
||||
*
|
||||
*********************************************************
|
||||
*/
|
||||
#ifndef __DESCRIPTOR_H__
|
||||
#define __DESCRIPTOR_H__
|
||||
|
||||
#include "usb/usb.h"
|
||||
|
||||
/**@brief USB获取设备描述符
|
||||
* @param[in] *ptr 存放设备描述符的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* get_device_descriptor(ptr);
|
||||
* @encode
|
||||
*/
|
||||
void get_device_descriptor(u8 *ptr);
|
||||
|
||||
/**@brief USB获取语言字符串描述符
|
||||
* @param[in] *ptr 存放语言字符串描述符的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* get_language_str(ptr);
|
||||
* @encode
|
||||
*/
|
||||
void get_language_str(u8 *ptr);
|
||||
|
||||
/**@brief USB获取生产商字符串描述符
|
||||
* @param[in] *ptr 存放生产商字符串描述符的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* get_manufacture_str(ptr);
|
||||
* @encode
|
||||
*/
|
||||
void get_manufacture_str(u8 *ptr);
|
||||
|
||||
/**@brief USB获取产品字符串描述符
|
||||
* @param[in] *ptr 存放产品字符串描述符的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* get_product_str(ptr);
|
||||
* @encode
|
||||
*/
|
||||
void get_product_str(u8 *ptr);
|
||||
|
||||
/**@brief USB获取序列号字符串描述符
|
||||
* @param[in] *ptr 存放序列号字符串描述符的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* get_iserialnumber_str(ptr);
|
||||
* @encode
|
||||
*/
|
||||
void get_iserialnumber_str(u8 *ptr);
|
||||
|
||||
/**@brief USB获取***字符串描述符
|
||||
* @param[in] *ptr 存放***字符串描述符的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* get_string_ee(ptr);
|
||||
* @encode
|
||||
*/
|
||||
void get_string_ee(u8 *ptr);
|
||||
|
||||
/**@brief USB设置描述符
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @param[in] class_config 类配置
|
||||
* @param[in] *p 存放描述符的地址
|
||||
* @param[in] max_len 最大长度
|
||||
* @return
|
||||
* @par 示例：
|
||||
* @code
|
||||
* set_descriptor(usb_id,class_config,p,max_len);
|
||||
* @encode
|
||||
*/
|
||||
u32 set_descriptor(const usb_dev usb_id, u32 class_config, u8 *p, u32 max_len);
|
||||
|
||||
|
||||
#endif /*DESCRIPTOR_H*/
|
||||
@@ -0,0 +1,213 @@
|
||||
/**@file hid.h
|
||||
* @brief hid驱动头文件（做从机）
|
||||
* @details 结构体声明，功能函数声明
|
||||
* @author jieli
|
||||
* @date 2021-9-1
|
||||
* @version V1.0
|
||||
* @copyright Copyright(c)2010-2021 珠海市杰理科技股份有限公司
|
||||
*********************************************************
|
||||
* @attention
|
||||
* 硬件平台：AC632N
|
||||
* SDK版本：AC632N_V1.0.0_SDK
|
||||
* @修改日志：
|
||||
* <table>
|
||||
* <tr><th>Date <th>Version <th>Author <th>Description
|
||||
* <tr><td>2021-9-1 <td>1.0 <td>jieli <td>创建初始版本
|
||||
* </table>
|
||||
*
|
||||
*********************************************************
|
||||
*/
|
||||
#ifndef __USB_HID_H__
|
||||
#define __USB_HID_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "usb/usb.h"
|
||||
#include "usb/device/usb_stack.h"
|
||||
|
||||
//do not add brace to the macro outside
|
||||
#define SHORT_ITEMS(prefix, _len, ...) \
|
||||
((prefix) | (((_len) > 0) ? 1 << ((_len) - 1) : 0)), ##__VA_ARGS__
|
||||
|
||||
/*Main Items*/
|
||||
#define INPUT(len, ...) SHORT_ITEMS(0x80, len, ##__VA_ARGS__)
|
||||
#define OUTPUT(len, ...) SHORT_ITEMS(0x90, len, ##__VA_ARGS__)
|
||||
#define COLLECTION(len, ...) SHORT_ITEMS(0xA0, len, ##__VA_ARGS__)
|
||||
#define FEATURE(len, ...) SHORT_ITEMS(0xB0, len, ##__VA_ARGS__)
|
||||
#define END_COLLECTION 0xC0
|
||||
|
||||
/*Golbal Items*/
|
||||
#define USAGE_PAGE(len, ...) SHORT_ITEMS(0x04, len, ##__VA_ARGS__)
|
||||
#define LOGICAL_MIN(len, ...) SHORT_ITEMS(0x14, len, ##__VA_ARGS__)
|
||||
#define LOGICAL_MAX(len, ...) SHORT_ITEMS(0x24, len, ##__VA_ARGS__)
|
||||
#define PHYSICAL_MIN(len, ...) SHORT_ITEMS(0x34, len, ##__VA_ARGS__)
|
||||
#define PHYSICAL_MAX(len, ...) SHORT_ITEMS(0x44, len, ##__VA_ARGS__)
|
||||
#define UNIT_EXPONENT(len, ...) SHORT_ITEMS(0x54, len, ##__VA_ARGS__)
|
||||
#define UNIT(len, ...) SHORT_ITEMS(0x64, len, ##__VA_ARGS__)
|
||||
#define REPORT_SIZE(len, ...) SHORT_ITEMS(0x74, len, ##__VA_ARGS__)
|
||||
#define REPORT_ID(len, ...) SHORT_ITEMS(0x84, len, ##__VA_ARGS__)
|
||||
#define REPORT_COUNT(len, ...) SHORT_ITEMS(0x94, len, ##__VA_ARGS__)
|
||||
#define PUSH SHORT_ITEMS(0xA4, 0)
|
||||
#define POP SHORT_ITEMS(0xB4, 0)
|
||||
|
||||
/*Local Items*/
|
||||
#define USAGE(len, ...) SHORT_ITEMS(0x08, len, ##__VA_ARGS__)
|
||||
#define USAGE_MIN(len, ...) SHORT_ITEMS(0x18, len, ##__VA_ARGS__)
|
||||
#define USAGE_MAX(len, ...) SHORT_ITEMS(0x28, len, ##__VA_ARGS__)
|
||||
#define DESIGNATOR_INDEX(len, ...) SHORT_ITEMS(0x38, len, ##__VA_ARGS__)
|
||||
#define DESIGNATOR_MIN(len, ...) SHORT_ITEMS(0x48, len, ##__VA_ARGS__)
|
||||
#define DESIGNATOR_MAX(len, ...) SHORT_ITEMS(0x58, len, ##__VA_ARGS__)
|
||||
#define STRING_INDEX(len, ...) SHORT_ITEMS(0x78, len, ##__VA_ARGS__)
|
||||
#define STRING_MIN(len, ...) SHORT_ITEMS(0x88, len, ##__VA_ARGS__)
|
||||
#define STRING_MAX(len, ...) SHORT_ITEMS(0x98, len, ##__VA_ARGS__)
|
||||
#define DELIMITER(len, ...) SHORT_ITEMS(0xA8, len, ##__VA_ARGS__)
|
||||
|
||||
|
||||
/*Consumer Page*/
|
||||
#define CONSUMER_PAGE 0x0C
|
||||
#define CONSUMER_CONTROL 0x01
|
||||
#define GENERIC_DESKTOP_CTRLS 0x01
|
||||
|
||||
/*Usage*/
|
||||
#define POINTER 0x01
|
||||
#define MOUSE 0x02
|
||||
#define BUTTON 0x09
|
||||
#define X_AXIS 0x30
|
||||
#define Y_AXIS 0x31
|
||||
|
||||
//Collection
|
||||
#define PHYSICAL 0x00
|
||||
#define APPLICATION 0x01
|
||||
#define LOGICAL 0x02
|
||||
#define REPORT 0x03
|
||||
|
||||
#define USB_HID_DT_HID (USB_TYPE_CLASS | 0x01)
|
||||
#define USB_HID_DT_REPORT (USB_TYPE_CLASS | 0x02)
|
||||
#define USB_HID_DT_PHYSICAL (USB_TYPE_CLASS | 0x03)
|
||||
/*
|
||||
* * HID requests
|
||||
* */
|
||||
#define USB_REQ_GET_REPORT 0x01
|
||||
#define USB_REQ_GET_IDLE 0x02
|
||||
#define USB_REQ_GET_PROTOCOL 0x03
|
||||
#define USB_REQ_SET_REPORT 0x09
|
||||
#define USB_REQ_SET_IDLE 0x0A
|
||||
#define USB_REQ_SET_PROTOCOL 0x0B
|
||||
|
||||
|
||||
|
||||
|
||||
#define PLAY 0xB0
|
||||
#define PAUSE 0xB1
|
||||
#define RECORD 0xB2
|
||||
#define FAST_FORWARD 0xB3
|
||||
#define REWIND 0xB4
|
||||
#define SCAN_NEXT_TRACK 0xB5
|
||||
#define SCAN_PREV_TRACK 0xB6
|
||||
#define STOP 0xB7
|
||||
#define FRAME_FORWARD 0xC0
|
||||
#define FRAME_BACK 0xC1
|
||||
#define TRACKING_INC 0xCA
|
||||
#define TRACKING_DEC 0xCB
|
||||
#define STOP_EJECT 0xCC
|
||||
#define PLAY_PAUSE 0xCD
|
||||
#define PLAY_SKIP 0xCE
|
||||
#define VOLUME 0xE0
|
||||
#define BALANCE 0xE1
|
||||
#define MUTE 0xE2
|
||||
#define BASS 0xE3
|
||||
#define VOLUME_INC 0xE9
|
||||
#define VOLUME_DEC 0xEA
|
||||
#define BALANCE_LEFT 0x50, 0x01
|
||||
#define BALANCE_RIGHT 0x51, 0x01
|
||||
#define CHANNEL_LEFT 0x61, 0x01
|
||||
#define CHANNEL_RIGHT 0x62, 0x01
|
||||
|
||||
|
||||
//----------------------------------
|
||||
// HID key for audio
|
||||
//----------------------------------
|
||||
#define USB_AUDIO_NONE 0
|
||||
#define USB_AUDIO_VOLUP BIT(0)
|
||||
#define USB_AUDIO_VOLDOWN BIT(1)
|
||||
#define USB_AUDIO_MUTE BIT(2)
|
||||
#define USB_AUDIO_PP BIT(3)
|
||||
#define USB_AUDIO_NEXTFILE BIT(4)
|
||||
#define USB_AUDIO_PREFILE BIT(5)
|
||||
#define USB_AUDIO_FASTFORWARD BIT(5)
|
||||
#define USB_AUDIO_STOP BIT(7)
|
||||
|
||||
#define USB_AUDIO_TRACKING_INC BIT(8)
|
||||
#define USB_AUDIO_TRACKING_DEC BIT(9)
|
||||
#define USB_AUDIO_STOP_EJECT BIT(10)
|
||||
#define USB_AUDIO_VOLUME BIT(11)
|
||||
#define USB_AUDIO_BALANCE_RIGHT BIT(12)
|
||||
#define USB_AUDIO_BALANCE_LEFT BIT(13)
|
||||
#define USB_AUDIO_PLAY BIT(14)
|
||||
#define USB_AUDIO_PAUSE BIT(15)
|
||||
|
||||
/**@brief USB hid描述符配置
|
||||
* @param[in] usb_id usb的id号
|
||||
* @param[in] *ptr 指向HID描述符
|
||||
* @param[in] *cur_itf_num 当前接口号
|
||||
* @return HID描述符长度，单位Byte
|
||||
* @par 示例：
|
||||
* @code
|
||||
* hid_desc_config(usb_id,ptr,cur_itf_num);
|
||||
* @encode
|
||||
*/
|
||||
u32 hid_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
u32 hid_second_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
|
||||
/**@brief hid按键处理函数
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @param[in] hid_key hid按键信息
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* hid_key_handler(usb_device,hidkey);
|
||||
* @encode
|
||||
*/
|
||||
void hid_key_handler(struct usb_device_t *usb_device, u32 hid_key);
|
||||
|
||||
/**@brief hid按键处理函数,用于特殊发送一个包的场景(正常hidkey有两个包)
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @param[in] hid_key hid按键信息
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* hid_key_handler_send_one_packet(usb_device,hidkey);
|
||||
* @encode
|
||||
*/
|
||||
void hid_key_handler_send_one_packet(struct usb_device_t *usb_device, u32 hid_key);
|
||||
|
||||
/**@brief hid发送数据
|
||||
* @param[in] *p 数据指针，指向存放数据的地址
|
||||
* @param[in] len 发送的数据长度
|
||||
* @return
|
||||
* @par 示例：
|
||||
* @code
|
||||
* hid_send_data(p,len);
|
||||
* @encode
|
||||
*/
|
||||
u32 hid_send_data(const void *p, u32 len);
|
||||
|
||||
/**@brief hid注册
|
||||
* @param[in] usb_id usb的id号
|
||||
* @return 0
|
||||
* @par 示例：
|
||||
* @code
|
||||
* hid_register(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
u32 hid_register(const usb_dev usb_id);
|
||||
|
||||
/**@brief hid释放（暂未使用）
|
||||
* @param[in] usb_id usb的id号
|
||||
* @return 0
|
||||
* @par 示例：
|
||||
* @code
|
||||
* hid_release(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
void hid_release(const usb_dev usb_id);
|
||||
#endif
|
||||
@@ -0,0 +1,34 @@
|
||||
#ifndef __USBD_MSD_H__
|
||||
#define __USBD_MSD_H__
|
||||
|
||||
#include "usb/usb.h"
|
||||
#include "usb_stack.h"
|
||||
|
||||
#define MAX_MSD_DEV 2
|
||||
#define MSD_DEV_NAME_LEN 14
|
||||
|
||||
struct msd_info {
|
||||
u8 bError;
|
||||
u8 bSenseKey;
|
||||
u8 bAdditionalSenseCode;
|
||||
u8 bAddiSenseCodeQualifier;
|
||||
u8 bDisk_popup[MAX_MSD_DEV];
|
||||
void *dev_handle[MAX_MSD_DEV];
|
||||
char dev_name[MAX_MSD_DEV][MSD_DEV_NAME_LEN];
|
||||
void (*msd_wakeup_handle)(struct usb_device_t *usb_device);
|
||||
void (*msd_reset_wakeup_handle)(struct usb_device_t *usb_device, u32 itf_num);
|
||||
};
|
||||
|
||||
|
||||
|
||||
u32 msd_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
void USB_MassStorage(const struct usb_device_t *usb_device);
|
||||
u32 msd_set_wakeup_handle(void (*handle)(struct usb_device_t *usb_device));
|
||||
u32 msd_register_disk(const char *name, void *arg);
|
||||
u32 msd_unregister_disk(const char *name);
|
||||
u32 msd_unregister_all();
|
||||
u32 msd_register(const usb_dev id);
|
||||
u32 msd_release();
|
||||
void msd_set_reset_wakeup_handle(void (*handle)(struct usb_device_t *usb_device, u32 itf_num));
|
||||
void msd_reset(struct usb_device_t *usb_device, u32 itf_num);
|
||||
#endif /*USBD_MSD_H*/
|
||||
@@ -0,0 +1,464 @@
|
||||
/**
|
||||
* <linux/usb/audio.h> -- USB Audio definitions.
|
||||
*
|
||||
* Copyright (C) 2006 Thumtronics Pty Ltd.
|
||||
* Developed for Thumtronics by Grey Innovation
|
||||
* Ben Williamson <ben.williamson@greyinnovation.com>
|
||||
*
|
||||
* This software is distributed under the terms of the GNU General Public
|
||||
* License ("GPL") version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This file holds USB constants and structures defined
|
||||
* by the USB Device Class Definition for Audio Devices.
|
||||
* Comments below reference relevant sections of that document:
|
||||
*
|
||||
* http://www.usb.org/developers/devclass_docs/audio10.pdf
|
||||
*
|
||||
* Types and defines in this file are either specific to version 1.0 of
|
||||
* this standard or common for newer versions.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_USB_AUDIO_H
|
||||
#define __LINUX_USB_AUDIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#define __le16 u16
|
||||
|
||||
#define u8 unsigned char // u8 to u32 special for struct
|
||||
#define u16 unsigned short // u16 to u32 special for struct
|
||||
#ifndef __s16
|
||||
#define s16 short // only s16
|
||||
#endif
|
||||
#define u32 unsigned int
|
||||
|
||||
/* A.8. Audio Class-Specific Request Codes */
|
||||
#define UAC_RC_UNDEFINED 0x00
|
||||
#define UAC_SET_CUR 0x01
|
||||
#define UAC_GET_CUR 0x81
|
||||
#define UAC_GET_MIN 0x82
|
||||
#define UAC_GET_MAX 0x83
|
||||
#define UAC_GET_RES 0x84
|
||||
#define UAC_GET_LEN 0x85
|
||||
#define UAC_GET_INFO 0x86
|
||||
#define UAC_GET_DEF 0x87
|
||||
|
||||
|
||||
/** bInterfaceProtocol values to denote the version of the standard used */
|
||||
#define UAC_VERSION_1 0x00
|
||||
#define UAC_VERSION_2 0x20
|
||||
|
||||
/** A.2 Audio Interface Subclass Codes */
|
||||
#define USB_SUBCLASS_AUDIOCONTROL 0x01
|
||||
#define USB_SUBCLASS_AUDIOSTREAMING 0x02
|
||||
#define USB_SUBCLASS_MIDISTREAMING 0x03
|
||||
|
||||
/** A.5 Audio Class-Specific AC Interface Descriptor Subtypes */
|
||||
#define UAC_HEADER 0x01
|
||||
#define UAC_INPUT_TERMINAL 0x02
|
||||
#define UAC_OUTPUT_TERMINAL 0x03
|
||||
#define UAC_MIXER_UNIT 0x04
|
||||
#define UAC_SELECTOR_UNIT 0x05
|
||||
#define UAC_FEATURE_UNIT 0x06
|
||||
#define UAC1_PROCESSING_UNIT 0x07
|
||||
#define UAC1_EXTENSION_UNIT 0x08
|
||||
|
||||
/** A.6 Audio Class-Specific AS Interface Descriptor Subtypes */
|
||||
#define UAC_AS_GENERAL 0x01
|
||||
#define UAC_FORMAT_TYPE 0x02
|
||||
#define UAC_FORMAT_SPECIFIC 0x03
|
||||
|
||||
/** A.7 Processing Unit Process Types */
|
||||
#define UAC_PROCESS_UNDEFINED 0x00
|
||||
#define UAC_PROCESS_UP_DOWNMIX 0x01
|
||||
#define UAC_PROCESS_DOLBY_PROLOGIC 0x02
|
||||
#define UAC_PROCESS_STEREO_EXTENDER 0x03
|
||||
#define UAC_PROCESS_REVERB 0x04
|
||||
#define UAC_PROCESS_CHORUS 0x05
|
||||
#define UAC_PROCESS_DYN_RANGE_COMP 0x06
|
||||
|
||||
/** A.8 Audio Class-Specific Endpoint Descriptor Subtypes */
|
||||
#define UAC_EP_GENERAL 0x01
|
||||
|
||||
/** A.9 Audio Class-Specific Request Codes */
|
||||
|
||||
#define UAC_GET_STAT 0xff
|
||||
|
||||
/** A.10 Control Selector Codes */
|
||||
|
||||
/** A.10.1 Terminal Control Selectors */
|
||||
#define UAC_TERM_COPY_PROTECT 0x01
|
||||
|
||||
/** A.10.2 Feature Unit Control Selectors */
|
||||
#define UAC_FU_MUTE 0x01
|
||||
#define UAC_FU_VOLUME 0x02
|
||||
#define UAC_FU_BASS 0x03
|
||||
#define UAC_FU_MID 0x04
|
||||
#define UAC_FU_TREBLE 0x05
|
||||
#define UAC_FU_GRAPHIC_EQUALIZER 0x06
|
||||
#define UAC_FU_AUTOMATIC_GAIN 0x07
|
||||
#define UAC_FU_DELAY 0x08
|
||||
#define UAC_FU_BASS_BOOST 0x09
|
||||
#define UAC_FU_LOUDNESS 0x0a
|
||||
|
||||
#define UAC_CONTROL_BIT(CS) (1 << ((CS) - 1))
|
||||
|
||||
/** A.10.3.1 Up/Down-mix Processing Unit Controls Selectors */
|
||||
#define UAC_UD_ENABLE 0x01
|
||||
#define UAC_UD_MODE_SELECT 0x02
|
||||
|
||||
/** A.10.3.2 Dolby Prologic (tm) Processing Unit Controls Selectors */
|
||||
#define UAC_DP_ENABLE 0x01
|
||||
#define UAC_DP_MODE_SELECT 0x02
|
||||
|
||||
/** A.10.3.3 3D Stereo Extender Processing Unit Control Selectors */
|
||||
#define UAC_3D_ENABLE 0x01
|
||||
#define UAC_3D_SPACE 0x02
|
||||
|
||||
/** A.10.3.4 Reverberation Processing Unit Control Selectors */
|
||||
#define UAC_REVERB_ENABLE 0x01
|
||||
#define UAC_REVERB_LEVEL 0x02
|
||||
#define UAC_REVERB_TIME 0x03
|
||||
#define UAC_REVERB_FEEDBACK 0x04
|
||||
|
||||
/** A.10.3.5 Chorus Processing Unit Control Selectors */
|
||||
#define UAC_CHORUS_ENABLE 0x01
|
||||
#define UAC_CHORUS_LEVEL 0x02
|
||||
#define UAC_CHORUS_RATE 0x03
|
||||
#define UAC_CHORUS_DEPTH 0x04
|
||||
|
||||
/** A.10.3.6 Dynamic Range Compressor Unit Control Selectors */
|
||||
#define UAC_DCR_ENABLE 0x01
|
||||
#define UAC_DCR_RATE 0x02
|
||||
#define UAC_DCR_MAXAMPL 0x03
|
||||
#define UAC_DCR_THRESHOLD 0x04
|
||||
#define UAC_DCR_ATTACK_TIME 0x05
|
||||
#define UAC_DCR_RELEASE_TIME 0x06
|
||||
|
||||
/** A.10.4 Extension Unit Control Selectors */
|
||||
#define UAC_XU_ENABLE 0x01
|
||||
|
||||
/** MIDI - A.1 MS Class-Specific Interface Descriptor Subtypes */
|
||||
#define UAC_MS_HEADER 0x01
|
||||
#define UAC_MIDI_IN_JACK 0x02
|
||||
#define UAC_MIDI_OUT_JACK 0x03
|
||||
|
||||
/** MIDI - A.1 MS Class-Specific Endpoint Descriptor Subtypes */
|
||||
#define UAC_MS_GENERAL 0x01
|
||||
|
||||
/** Terminals - 2.1 USB Terminal Types */
|
||||
#define UAC_TERMINAL_UNDEFINED 0x0100
|
||||
#define UAC_TERMINAL_STREAMING 0x0101
|
||||
#define UAC_TERMINAL_VENDOR_SPEC 0x01FF
|
||||
|
||||
/** Terminal Control Selectors */
|
||||
/** 4.3.2 Class-Specific AC Interface Descriptor */
|
||||
struct uac1_ac_header_descriptor {
|
||||
u8 bLength; /** 8 + n */
|
||||
u8 bDescriptorType; /** USB_DT_CS_INTERFACE */
|
||||
u8 bDescriptorSubtype; /** UAC_MS_HEADER */
|
||||
__le16 bcdADC; /** 0x0100 */
|
||||
__le16 wTotalLength; /** includes Unit and Terminal desc. */
|
||||
u8 bInCollection; /** n */
|
||||
u8 baInterfaceNr[]; /** [n] */
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC_DT_AC_HEADER_SIZE(n) (8 + (n))
|
||||
|
||||
/** As above, but more useful for defining your own descriptors: */
|
||||
#define DECLARE_UAC_AC_HEADER_DESCRIPTOR(n) \
|
||||
struct uac1_ac_header_descriptor_##n { \
|
||||
u8 bLength; \
|
||||
u8 bDescriptorType; \
|
||||
u8 bDescriptorSubtype; \
|
||||
__le16 bcdADC; \
|
||||
__le16 wTotalLength; \
|
||||
u8 bInCollection; \
|
||||
u8 baInterfaceNr[n]; \
|
||||
} __attribute__ ((packed))
|
||||
|
||||
/** 4.3.2.1 Input Terminal Descriptor */
|
||||
struct uac_input_terminal_descriptor {
|
||||
u8 bLength; /** in bytes: 12 */
|
||||
u8 bDescriptorType; /** CS_INTERFACE descriptor type */
|
||||
u8 bDescriptorSubtype; /** INPUT_TERMINAL descriptor subtype */
|
||||
u8 bTerminalID; /** Constant uniquely terminal ID */
|
||||
__le16 wTerminalType; /** USB Audio Terminal Types */
|
||||
u8 bAssocTerminal; /** ID of the Output Terminal associated */
|
||||
u8 bNrChannels; /** Number of logical output channels */
|
||||
__le16 wChannelConfig;
|
||||
u8 iChannelNames;
|
||||
u8 iTerminal;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC_DT_INPUT_TERMINAL_SIZE 12
|
||||
|
||||
/** Terminals - 2.2 Input Terminal Types */
|
||||
#define UAC_INPUT_TERMINAL_UNDEFINED 0x200
|
||||
#define UAC_INPUT_TERMINAL_MICROPHONE 0x201
|
||||
#define UAC_INPUT_TERMINAL_DESKTOP_MICROPHONE 0x202
|
||||
#define UAC_INPUT_TERMINAL_PERSONAL_MICROPHONE 0x203
|
||||
#define UAC_INPUT_TERMINAL_OMNI_DIR_MICROPHONE 0x204
|
||||
#define UAC_INPUT_TERMINAL_MICROPHONE_ARRAY 0x205
|
||||
#define UAC_INPUT_TERMINAL_PROC_MICROPHONE_ARRAY 0x206
|
||||
|
||||
/** Terminals - control selectors */
|
||||
|
||||
#define UAC_TERMINAL_CS_COPY_PROTECT_CONTROL 0x01
|
||||
|
||||
/** 4.3.2.2 Output Terminal Descriptor */
|
||||
struct uac1_output_terminal_descriptor {
|
||||
u8 bLength; /** in bytes: 9 */
|
||||
u8 bDescriptorType; /** CS_INTERFACE descriptor type */
|
||||
u8 bDescriptorSubtype; /** OUTPUT_TERMINAL descriptor subtype */
|
||||
u8 bTerminalID; /** Constant uniquely terminal ID */
|
||||
__le16 wTerminalType; /** USB Audio Terminal Types */
|
||||
u8 bAssocTerminal; /** ID of the Input Terminal associated */
|
||||
u8 bSourceID; /** ID of the connected Unit or Terminal*/
|
||||
u8 iTerminal;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC_DT_OUTPUT_TERMINAL_SIZE 9
|
||||
|
||||
/** Terminals - 2.3 Output Terminal Types */
|
||||
#define UAC_OUTPUT_TERMINAL_UNDEFINED 0x300
|
||||
#define UAC_OUTPUT_TERMINAL_SPEAKER 0x301
|
||||
#define UAC_OUTPUT_TERMINAL_HEADPHONES 0x302
|
||||
#define UAC_OUTPUT_TERMINAL_HEAD_MOUNTED_DISPLAY_AUDIO 0x303
|
||||
#define UAC_OUTPUT_TERMINAL_DESKTOP_SPEAKER 0x304
|
||||
#define UAC_OUTPUT_TERMINAL_ROOM_SPEAKER 0x305
|
||||
#define UAC_OUTPUT_TERMINAL_COMMUNICATION_SPEAKER 0x306
|
||||
#define UAC_OUTPUT_TERMINAL_LOW_FREQ_EFFECTS_SPEAKER 0x307
|
||||
#define UAC_OUTPUT_TERMINAL_HEADSET 0x0402
|
||||
|
||||
/** Set bControlSize = 2 as default setting */
|
||||
#define UAC_DT_FEATURE_UNIT_SIZE(ch) (7 + ((ch) + 1) * 2)
|
||||
|
||||
/** As above, but more useful for defining your own descriptors: */
|
||||
#define DECLARE_UAC_FEATURE_UNIT_DESCRIPTOR(ch) \
|
||||
struct uac_feature_unit_descriptor_##ch { \
|
||||
u8 bLength; \
|
||||
u8 bDescriptorType; \
|
||||
u8 bDescriptorSubtype; \
|
||||
u8 bUnitID; \
|
||||
u8 bSourceID; \
|
||||
u8 bControlSize; \
|
||||
__le16 bmaControls[ch + 1]; \
|
||||
u8 iFeature; \
|
||||
} __attribute__ ((packed))
|
||||
|
||||
/** 4.3.2.3 Mixer Unit Descriptor */
|
||||
struct uac_mixer_unit_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bUnitID;
|
||||
u8 bNrInPins;
|
||||
u8 baSourceID[];
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
|
||||
/** 4.3.2.4 Selector Unit Descriptor */
|
||||
struct uac_selector_unit_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bUintID;
|
||||
u8 bNrInPins;
|
||||
u8 baSourceID[];
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
|
||||
/** 4.3.2.5 Feature Unit Descriptor */
|
||||
struct uac_feature_unit_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bUnitID;
|
||||
u8 bSourceID;
|
||||
u8 bControlSize;
|
||||
u8 bmaControls[0]; /** variable length */
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
|
||||
/** 4.3.2.6 Processing Unit Descriptors */
|
||||
struct uac_processing_unit_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bUnitID;
|
||||
u16 wProcessType;
|
||||
u8 bNrInPins;
|
||||
u8 baSourceID[];
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
|
||||
|
||||
/** 4.5.2 Class-Specific AS Interface Descriptor */
|
||||
struct uac1_as_header_descriptor {
|
||||
u8 bLength; /** in bytes: 7 */
|
||||
u8 bDescriptorType; /** USB_DT_CS_INTERFACE */
|
||||
u8 bDescriptorSubtype; /** AS_GENERAL */
|
||||
u8 bTerminalLink; /** Terminal ID of connected Terminal */
|
||||
u8 bDelay; /** Delay introduced by the data path */
|
||||
__le16 wFormatTag; /** The Audio Data Format */
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC_DT_AS_HEADER_SIZE 7
|
||||
|
||||
/** Formats - A.1.1 Audio Data Format Type I Codes */
|
||||
#define UAC_FORMAT_TYPE_I_UNDEFINED 0x0
|
||||
#define UAC_FORMAT_TYPE_I_PCM 0x1
|
||||
#define UAC_FORMAT_TYPE_I_PCM8 0x2
|
||||
#define UAC_FORMAT_TYPE_I_IEEE_FLOAT 0x3
|
||||
#define UAC_FORMAT_TYPE_I_ALAW 0x4
|
||||
#define UAC_FORMAT_TYPE_I_MULAW 0x5
|
||||
|
||||
struct uac_format_type_i_continuous_descriptor {
|
||||
u8 bLength; /** in bytes: 8 + (ns * 3) */
|
||||
u8 bDescriptorType; /** USB_DT_CS_INTERFACE */
|
||||
u8 bDescriptorSubtype; /** FORMAT_TYPE */
|
||||
u8 bFormatType; /** FORMAT_TYPE_1 */
|
||||
u8 bNrChannels; /** physical channels in the stream */
|
||||
u8 bSubframeSize; /** */
|
||||
u8 bBitResolution;
|
||||
u8 bSamFreqType;
|
||||
u8 tLowerSamFreq[3];
|
||||
u8 tUpperSamFreq[3];
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC_FORMAT_TYPE_I_CONTINUOUS_DESC_SIZE 14
|
||||
|
||||
struct uac_format_type_i_discrete_descriptor {
|
||||
u8 bLength; /** in bytes: 8 + (ns * 3) */
|
||||
u8 bDescriptorType; /** USB_DT_CS_INTERFACE */
|
||||
u8 bDescriptorSubtype; /** FORMAT_TYPE */
|
||||
u8 bFormatType; /** FORMAT_TYPE_1 */
|
||||
u8 bNrChannels; /** physical channels in the stream */
|
||||
u8 bSubframeSize; /** */
|
||||
u8 bBitResolution;
|
||||
u8 bSamFreqType;
|
||||
u8 tSamFreq[][3];
|
||||
} __attribute__((packed));
|
||||
|
||||
#define DECLARE_UAC_FORMAT_TYPE_I_DISCRETE_DESC(n) \
|
||||
struct uac_format_type_i_discrete_descriptor_##n { \
|
||||
u8 bLength; \
|
||||
u8 bDescriptorType; \
|
||||
u8 bDescriptorSubtype; \
|
||||
u8 bFormatType; \
|
||||
u8 bNrChannels; \
|
||||
u8 bSubframeSize; \
|
||||
u8 bBitResolution; \
|
||||
u8 bSamFreqType; \
|
||||
u8 tSamFreq[n][3]; \
|
||||
} __attribute__ ((packed))
|
||||
|
||||
#define UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(n) (8 + (n * 3))
|
||||
|
||||
struct uac_format_type_i_ext_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bFormatType;
|
||||
u8 bSubslotSize;
|
||||
u8 bBitResolution;
|
||||
u8 bHeaderLength;
|
||||
u8 bControlSize;
|
||||
u8 bSideBandProtocol;
|
||||
} __attribute__((packed));
|
||||
|
||||
/** Formats - Audio Data Format Type I Codes */
|
||||
|
||||
#define UAC_FORMAT_TYPE_II_MPEG 0x1001
|
||||
#define UAC_FORMAT_TYPE_II_AC3 0x1002
|
||||
|
||||
struct uac_format_type_ii_discrete_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bFormatType;
|
||||
__le16 wMaxBitRate;
|
||||
__le16 wSamplesPerFrame;
|
||||
u8 bSamFreqType;
|
||||
u8 tSamFreq[][3];
|
||||
} __attribute__((packed));
|
||||
|
||||
struct uac_format_type_ii_ext_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bFormatType;
|
||||
u16 wMaxBitRate;
|
||||
u16 wSamplesPerFrame;
|
||||
u8 bHeaderLength;
|
||||
u8 bSideBandProtocol;
|
||||
} __attribute__((packed));
|
||||
|
||||
/** type III */
|
||||
#define UAC_FORMAT_TYPE_III_IEC1937_AC3 0x2001
|
||||
#define UAC_FORMAT_TYPE_III_IEC1937_MPEG1_LAYER1 0x2002
|
||||
#define UAC_FORMAT_TYPE_III_IEC1937_MPEG2_NOEXT 0x2003
|
||||
#define UAC_FORMAT_TYPE_III_IEC1937_MPEG2_EXT 0x2004
|
||||
#define UAC_FORMAT_TYPE_III_IEC1937_MPEG2_LAYER1_LS 0x2005
|
||||
#define UAC_FORMAT_TYPE_III_IEC1937_MPEG2_LAYER23_LS 0x2006
|
||||
|
||||
/** Formats - A.2 Format Type Codes */
|
||||
#define UAC_FORMAT_TYPE_UNDEFINED 0x0
|
||||
#define UAC_FORMAT_TYPE_I 0x1
|
||||
#define UAC_FORMAT_TYPE_II 0x2
|
||||
#define UAC_FORMAT_TYPE_III 0x3
|
||||
#define UAC_EXT_FORMAT_TYPE_I 0x81
|
||||
#define UAC_EXT_FORMAT_TYPE_II 0x82
|
||||
#define UAC_EXT_FORMAT_TYPE_III 0x83
|
||||
|
||||
struct uac_iso_endpoint_descriptor {
|
||||
u8 bLength; /** in bytes: 7 */
|
||||
u8 bDescriptorType; /** USB_DT_CS_ENDPOINT */
|
||||
u8 bDescriptorSubtype; /** EP_GENERAL */
|
||||
u8 bmAttributes;
|
||||
u8 bLockDelayUnits;
|
||||
__le16 wLockDelay;
|
||||
} __attribute__((packed));
|
||||
#define UAC_ISO_ENDPOINT_DESC_SIZE 7
|
||||
|
||||
#define UAC_EP_CS_ATTR_SAMPLE_RATE 0x01
|
||||
#define UAC_EP_CS_ATTR_PITCH_CONTROL 0x02
|
||||
#define UAC_EP_CS_ATTR_FILL_MAX 0x80
|
||||
|
||||
/** status word format (3.7.1.1) */
|
||||
|
||||
#define UAC1_STATUS_TYPE_ORIG_MASK 0x0f
|
||||
#define UAC1_STATUS_TYPE_ORIG_AUDIO_CONTROL_IF 0x0
|
||||
#define UAC1_STATUS_TYPE_ORIG_AUDIO_STREAM_IF 0x1
|
||||
#define UAC1_STATUS_TYPE_ORIG_AUDIO_STREAM_EP 0x2
|
||||
|
||||
#define UAC1_STATUS_TYPE_IRQ_PENDING (1 << 7)
|
||||
#define UAC1_STATUS_TYPE_MEM_CHANGED (1 << 6)
|
||||
|
||||
#include "usb/usb.h"
|
||||
struct uac1_status_word {
|
||||
u8 bStatusType;
|
||||
u8 bOriginator;
|
||||
} __attribute__((packed));
|
||||
|
||||
u32 uac_spk_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
|
||||
u32 uac_mic_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
u32 uac_audio_desc_config(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
const u8 *uac_get_string(u32 id);
|
||||
void uac_get_cur_vol(const usb_dev usb_id, u16 *l_vol, u16 *r_vol);
|
||||
u16 uac_get_mic_vol(const usb_dev usb_id);
|
||||
u32 uac_spk_register(const usb_dev usb_id);
|
||||
void uac_spk_release(const usb_dev usb_id);
|
||||
u32 uac_mic_register(const usb_dev usb_id);
|
||||
void uac_mic_release(const usb_dev usb_id);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /** __LINUX_USB_AUDIO_H */
|
||||
@@ -0,0 +1,462 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2010 Daniel Mack <daniel@caiaq.de>
|
||||
*
|
||||
* This software is distributed under the terms of the GNU General Public
|
||||
* License ("GPL") version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This file holds USB constants and structures defined
|
||||
* by the USB Device Class Definition for Audio Devices in version 2.0.
|
||||
* Comments below reference relevant sections of the documents contained
|
||||
* in http://www.usb.org/developers/devclass_docs/Audio2.0_final.zip
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_USB_AUDIO_V2_H
|
||||
#define __LINUX_USB_AUDIO_V2_H
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
/* v1.0 and v2.0 of this standard have many things in common. For the rest
|
||||
* of the definitions, please refer to audio.h */
|
||||
|
||||
/*
|
||||
* bmControl field decoders
|
||||
*
|
||||
* From the USB Audio spec v2.0:
|
||||
*
|
||||
* bmaControls() is a (ch+1)-element array of 4-byte bitmaps,
|
||||
* each containing a set of bit pairs. If a Control is present,
|
||||
* it must be Host readable. If a certain Control is not
|
||||
* present then the bit pair must be set to 0b00.
|
||||
* If a Control is present but read-only, the bit pair must be
|
||||
* set to 0b01. If a Control is also Host programmable, the bit
|
||||
* pair must be set to 0b11. The value 0b10 is not allowed.
|
||||
*
|
||||
*/
|
||||
|
||||
static inline bool uac2_control_is_readable(u32 bmControls, u8 control)
|
||||
{
|
||||
return (bmControls >> (control * 2)) & 0x1;
|
||||
}
|
||||
|
||||
static inline bool uac2_control_is_writeable(u32 bmControls, u8 control)
|
||||
{
|
||||
return (bmControls >> (control * 2)) & 0x2;
|
||||
}
|
||||
|
||||
/* 4.7.2 Class-Specific AC Interface Descriptor */
|
||||
struct uac2_ac_header_descriptor {
|
||||
u8 bLength; /* 9 */
|
||||
u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
|
||||
u8 bDescriptorSubtype; /* UAC_MS_HEADER */
|
||||
u16 bcdADC; /* 0x0200 */
|
||||
u8 bCategory;
|
||||
u16 wTotalLength; /* includes Unit and Terminal desc. */
|
||||
u8 bmControls;
|
||||
} __packed;
|
||||
|
||||
/* 2.3.1.6 Type I Format Type Descriptor (Frmts20 final.pdf)*/
|
||||
struct uac2_format_type_i_descriptor {
|
||||
u8 bLength; /* in bytes: 6 */
|
||||
u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
|
||||
u8 bDescriptorSubtype; /* FORMAT_TYPE */
|
||||
u8 bFormatType; /* FORMAT_TYPE_1 */
|
||||
u8 bSubslotSize; /* {1,2,3,4} */
|
||||
u8 bBitResolution;
|
||||
} __packed;
|
||||
|
||||
/* 4.7.2.1 Clock Source Descriptor */
|
||||
|
||||
struct uac_clock_source_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bClockID;
|
||||
u8 bmAttributes;
|
||||
u8 bmControls;
|
||||
u8 bAssocTerminal;
|
||||
u8 iClockSource;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* bmAttribute fields */
|
||||
#define UAC_CLOCK_SOURCE_TYPE_EXT 0x0
|
||||
#define UAC_CLOCK_SOURCE_TYPE_INT_FIXED 0x1
|
||||
#define UAC_CLOCK_SOURCE_TYPE_INT_VAR 0x2
|
||||
#define UAC_CLOCK_SOURCE_TYPE_INT_PROG 0x3
|
||||
#define UAC_CLOCK_SOURCE_SYNCED_TO_SOF (1 << 2)
|
||||
|
||||
/* 4.7.2.2 Clock Source Descriptor */
|
||||
|
||||
struct uac_clock_selector_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bClockID;
|
||||
u8 bNrInPins;
|
||||
u8 baCSourceID[];
|
||||
/* bmControls, bAssocTerminal and iClockSource omitted */
|
||||
} __attribute__((packed));
|
||||
|
||||
/* 4.7.2.3 Clock Multiplier Descriptor */
|
||||
|
||||
struct uac_clock_multiplier_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bClockID;
|
||||
u8 bCSourceID;
|
||||
u8 bmControls;
|
||||
u8 iClockMultiplier;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* 4.7.2.4 Input terminal descriptor */
|
||||
|
||||
struct uac2_input_terminal_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bTerminalID;
|
||||
u16 wTerminalType;
|
||||
u8 bAssocTerminal;
|
||||
u8 bCSourceID;
|
||||
u8 bNrChannels;
|
||||
u32 bmChannelConfig;
|
||||
u8 iChannelNames;
|
||||
u16 bmControls;
|
||||
u8 iTerminal;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* 4.7.2.5 Output terminal descriptor */
|
||||
|
||||
struct uac2_output_terminal_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bTerminalID;
|
||||
u16 wTerminalType;
|
||||
u8 bAssocTerminal;
|
||||
u8 bSourceID;
|
||||
u8 bCSourceID;
|
||||
u16 bmControls;
|
||||
u8 iTerminal;
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
|
||||
/* 4.7.2.8 Feature Unit Descriptor */
|
||||
|
||||
struct uac2_feature_unit_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bUnitID;
|
||||
u8 bSourceID;
|
||||
/* bmaControls is actually u32,
|
||||
* but u8 is needed for the hybrid parser */
|
||||
u8 bmaControls[0]; /* variable length */
|
||||
} __attribute__((packed));
|
||||
|
||||
/* 4.9.2 Class-Specific AS Interface Descriptor */
|
||||
|
||||
struct uac2_as_header_descriptor {
|
||||
u8 bLength;
|
||||
u8 bDescriptorType;
|
||||
u8 bDescriptorSubtype;
|
||||
u8 bTerminalLink;
|
||||
u8 bmControls;
|
||||
u8 bFormatType;
|
||||
u32 bmFormats;
|
||||
u8 bNrChannels;
|
||||
u32 bmChannelConfig;
|
||||
u8 iChannelNames;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC2_FORMAT_TYPE_I_RAW_DATA (1 << 31)
|
||||
|
||||
/* 4.10.1.2 Class-Specific AS Isochronous Audio Data Endpoint Descriptor */
|
||||
|
||||
struct uac2_iso_endpoint_descriptor {
|
||||
u8 bLength; /* in bytes: 8 */
|
||||
u8 bDescriptorType; /* USB_DT_CS_ENDPOINT */
|
||||
u8 bDescriptorSubtype; /* EP_GENERAL */
|
||||
u8 bmAttributes;
|
||||
u8 bmControls;
|
||||
u8 bLockDelayUnits;
|
||||
u16 wLockDelay;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define UAC2_CONTROL_PITCH (3 << 0)
|
||||
#define UAC2_CONTROL_DATA_OVERRUN (3 << 2)
|
||||
#define UAC2_CONTROL_DATA_UNDERRUN (3 << 4)
|
||||
|
||||
/* 6.1 Interrupt Data Message */
|
||||
|
||||
#define UAC2_INTERRUPT_DATA_MSG_VENDOR (1 << 0)
|
||||
#define UAC2_INTERRUPT_DATA_MSG_EP (1 << 1)
|
||||
|
||||
struct uac2_interrupt_data_msg {
|
||||
u8 bInfo;
|
||||
u8 bAttribute;
|
||||
u16 wValue;
|
||||
u16 wIndex;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* A.7 Audio Function Category Codes */
|
||||
#define UAC2_FUNCTION_SUBCLASS_UNDEFINED 0x00
|
||||
#define UAC2_FUNCTION_DESKTOP_SPEAKER 0x01
|
||||
#define UAC2_FUNCTION_HOME_THEATER 0x02
|
||||
#define UAC2_FUNCTION_MICROPHONE 0x03
|
||||
#define UAC2_FUNCTION_HEADSET 0x04
|
||||
#define UAC2_FUNCTION_TELEPHONE 0x05
|
||||
#define UAC2_FUNCTION_CONVERTER 0x06
|
||||
#define UAC2_FUNCTION_SOUND_RECORDER 0x07
|
||||
#define UAC2_FUNCTION_IO_BOX 0x08
|
||||
#define UAC2_FUNCTION_MUSICAL_INSTRUMENT 0x09
|
||||
#define UAC2_FUNCTION_PRO_AUDIO 0x0a
|
||||
#define UAC2_FUNCTION_AUDIO_VIDEO 0x0b
|
||||
#define UAC2_FUNCTION_CONTROL_PANEL 0x0c
|
||||
#define UAC2_FUNCTION_OTHER 0xff
|
||||
|
||||
/* A.9 Audio Class-Specific AC Interface Descriptor Subtypes */
|
||||
/* see audio.h for the rest, which is identical to v1 */
|
||||
#define UAC2_EFFECT_UNIT 0x07
|
||||
#define UAC2_PROCESSING_UNIT_V2 0x08
|
||||
#define UAC2_EXTENSION_UNIT_V2 0x09
|
||||
#define UAC2_CLOCK_SOURCE 0x0a
|
||||
#define UAC2_CLOCK_SELECTOR 0x0b
|
||||
#define UAC2_CLOCK_MULTIPLIER 0x0c
|
||||
#define UAC2_SAMPLE_RATE_CONVERTER 0x0d
|
||||
|
||||
/* A.10 Audio Class-Specific AS Interface Descriptor Subtypes */
|
||||
/* see audio.h for the rest, which is identical to v1 */
|
||||
#define UAC2_ENCODER 0x03
|
||||
#define UAC2_DECODER 0x04
|
||||
|
||||
/* A.11 Effect Unit Effect Types */
|
||||
#define UAC2_EFFECT_UNDEFINED 0x00
|
||||
#define UAC2_EFFECT_PARAM_EQ 0x01
|
||||
#define UAC2_EFFECT_REVERB 0x02
|
||||
#define UAC2_EFFECT_MOD_DELAY 0x03
|
||||
#define UAC2_EFFECT_DYN_RANGE_COMP 0x04
|
||||
|
||||
/* A.12 Processing Unit Process Types */
|
||||
#define UAC2_PROCESS_UNDEFINED 0x00
|
||||
#define UAC2_PROCESS_UP_DOWNMIX 0x01
|
||||
#define UAC2_PROCESS_DOLBY_PROLOCIC 0x02
|
||||
#define UAC2_PROCESS_STEREO_EXTENDER 0x03
|
||||
|
||||
/* A.14 Audio Class-Specific Request Codes */
|
||||
#define UAC2_CS_CUR 0x01
|
||||
#define UAC2_CS_RANGE 0x02
|
||||
#define UAC2_CS_MEM 0x03
|
||||
|
||||
/* A.15 Encoder Type Codes */
|
||||
#define UAC2_ENCODER_UNDEFINED 0x00
|
||||
#define UAC2_ENCODER_OTHER 0x01
|
||||
#define UAC2_ENCODER_MPEG 0x02
|
||||
#define UAC2_ENCODER_AC3 0x03
|
||||
#define UAC2_ENCODER_WMA 0x04
|
||||
#define UAC2_ENCODER_DTS 0x05
|
||||
|
||||
/* A.16 Decoder Type Codes */
|
||||
#define UAC2_DECODER_UNDEFINED 0x00
|
||||
#define UAC2_DECODER_OTHER 0x01
|
||||
#define UAC2_DECODER_MPEG 0x02
|
||||
#define UAC2_DECODER_AC3 0x03
|
||||
#define UAC2_DECODER_WMA 0x04
|
||||
#define UAC2_DECODER_DTS 0x05
|
||||
|
||||
/* A.17.1 Clock Source Control Selectors */
|
||||
#define UAC2_CS_UNDEFINED 0x00
|
||||
#define UAC2_CS_CONTROL_SAM_FREQ 0x01
|
||||
#define UAC2_CS_CONTROL_CLOCK_VALID 0x02
|
||||
|
||||
/* A.17.2 Clock Selector Control Selectors */
|
||||
#define UAC2_CX_UNDEFINED 0x00
|
||||
#define UAC2_CX_CLOCK_SELECTOR 0x01
|
||||
|
||||
/* A.17.3 Clock Multiplier Control Selectors */
|
||||
#define UAC2_CM_UNDEFINED 0x00
|
||||
#define UAC2_CM_NUMERATOR 0x01
|
||||
#define UAC2_CM_DENOMINTATOR 0x02
|
||||
|
||||
/* A.17.4 Terminal Control Selectors */
|
||||
#define UAC2_TE_UNDEFINED 0x00
|
||||
#define UAC2_TE_COPY_PROTECT 0x01
|
||||
#define UAC2_TE_CONNECTOR 0x02
|
||||
#define UAC2_TE_OVERLOAD 0x03
|
||||
#define UAC2_TE_CLUSTER 0x04
|
||||
#define UAC2_TE_UNDERFLOW 0x05
|
||||
#define UAC2_TE_OVERFLOW 0x06
|
||||
#define UAC2_TE_LATENCY 0x07
|
||||
|
||||
/* A.17.5 Mixer Control Selectors */
|
||||
#define UAC2_MU_UNDEFINED 0x00
|
||||
#define UAC2_MU_MIXER 0x01
|
||||
#define UAC2_MU_CLUSTER 0x02
|
||||
#define UAC2_MU_UNDERFLOW 0x03
|
||||
#define UAC2_MU_OVERFLOW 0x04
|
||||
#define UAC2_MU_LATENCY 0x05
|
||||
|
||||
/* A.17.6 Selector Control Selectors */
|
||||
#define UAC2_SU_UNDEFINED 0x00
|
||||
#define UAC2_SU_SELECTOR 0x01
|
||||
#define UAC2_SU_LATENCY 0x02
|
||||
|
||||
/* A.17.7 Feature Unit Control Selectors */
|
||||
/* see audio.h for the rest, which is identical to v1 */
|
||||
#define UAC2_FU_INPUT_GAIN 0x0b
|
||||
#define UAC2_FU_INPUT_GAIN_PAD 0x0c
|
||||
#define UAC2_FU_PHASE_INVERTER 0x0d
|
||||
#define UAC2_FU_UNDERFLOW 0x0e
|
||||
#define UAC2_FU_OVERFLOW 0x0f
|
||||
#define UAC2_FU_LATENCY 0x10
|
||||
|
||||
/* A.17.8.1 Parametric Equalizer Section Effect Unit Control Selectors */
|
||||
#define UAC2_PE_UNDEFINED 0x00
|
||||
#define UAC2_PE_ENABLE 0x01
|
||||
#define UAC2_PE_CENTERFREQ 0x02
|
||||
#define UAC2_PE_QFACTOR 0x03
|
||||
#define UAC2_PE_GAIN 0x04
|
||||
#define UAC2_PE_UNDERFLOW 0x05
|
||||
#define UAC2_PE_OVERFLOW 0x06
|
||||
#define UAC2_PE_LATENCY 0x07
|
||||
|
||||
/* A.17.8.2 Reverberation Effect Unit Control Selectors */
|
||||
#define UAC2_RV_UNDEFINED 0x00
|
||||
#define UAC2_RV_ENABLE 0x01
|
||||
#define UAC2_RV_TYPE 0x02
|
||||
#define UAC2_RV_LEVEL 0x03
|
||||
#define UAC2_RV_TIME 0x04
|
||||
#define UAC2_RV_FEEDBACK 0x05
|
||||
#define UAC2_RV_PREDELAY 0x06
|
||||
#define UAC2_RV_DENSITY 0x07
|
||||
#define UAC2_RV_HIFREQ_ROLLOFF 0x08
|
||||
#define UAC2_RV_UNDERFLOW 0x09
|
||||
#define UAC2_RV_OVERFLOW 0x0a
|
||||
#define UAC2_RV_LATENCY 0x0b
|
||||
|
||||
/* A.17.8.3 Modulation Delay Effect Control Selectors */
|
||||
#define UAC2_MD_UNDEFINED 0x00
|
||||
#define UAC2_MD_ENABLE 0x01
|
||||
#define UAC2_MD_BALANCE 0x02
|
||||
#define UAC2_MD_RATE 0x03
|
||||
#define UAC2_MD_DEPTH 0x04
|
||||
#define UAC2_MD_TIME 0x05
|
||||
#define UAC2_MD_FEEDBACK 0x06
|
||||
#define UAC2_MD_UNDERFLOW 0x07
|
||||
#define UAC2_MD_OVERFLOW 0x08
|
||||
#define UAC2_MD_LATENCY 0x09
|
||||
|
||||
/* A.17.8.4 Dynamic Range Compressor Effect Unit Control Selectors */
|
||||
#define UAC2_DR_UNDEFINED 0x00
|
||||
#define UAC2_DR_ENABLE 0x01
|
||||
#define UAC2_DR_COMPRESSION_RATE 0x02
|
||||
#define UAC2_DR_MAXAMPL 0x03
|
||||
#define UAC2_DR_THRESHOLD 0x04
|
||||
#define UAC2_DR_ATTACK_TIME 0x05
|
||||
#define UAC2_DR_RELEASE_TIME 0x06
|
||||
#define UAC2_DR_UNDEFLOW 0x07
|
||||
#define UAC2_DR_OVERFLOW 0x08
|
||||
#define UAC2_DR_LATENCY 0x09
|
||||
|
||||
/* A.17.9.1 Up/Down-mix Processing Unit Control Selectors */
|
||||
#define UAC2_UD_UNDEFINED 0x00
|
||||
#define UAC2_UD_ENABLE 0x01
|
||||
#define UAC2_UD_MODE_SELECT 0x02
|
||||
#define UAC2_UD_CLUSTER 0x03
|
||||
#define UAC2_UD_UNDERFLOW 0x04
|
||||
#define UAC2_UD_OVERFLOW 0x05
|
||||
#define UAC2_UD_LATENCY 0x06
|
||||
|
||||
/* A.17.9.2 Dolby Prologic[tm] Processing Unit Control Selectors */
|
||||
#define UAC2_DP_UNDEFINED 0x00
|
||||
#define UAC2_DP_ENABLE 0x01
|
||||
#define UAC2_DP_MODE_SELECT 0x02
|
||||
#define UAC2_DP_CLUSTER 0x03
|
||||
#define UAC2_DP_UNDERFFLOW 0x04
|
||||
#define UAC2_DP_OVERFLOW 0x05
|
||||
#define UAC2_DP_LATENCY 0x06
|
||||
|
||||
/* A.17.9.3 Stereo Expander Processing Unit Control Selectors */
|
||||
#define UAC2_ST_EXT_UNDEFINED 0x00
|
||||
#define UAC2_ST_EXT_ENABLE 0x01
|
||||
#define UAC2_ST_EXT_WIDTH 0x02
|
||||
#define UAC2_ST_EXT_UNDEFLOW 0x03
|
||||
#define UAC2_ST_EXT_OVERFLOW 0x04
|
||||
#define UAC2_ST_EXT_LATENCY 0x05
|
||||
|
||||
/* A.17.10 Extension Unit Control Selectors */
|
||||
#define UAC2_XU_UNDEFINED 0x00
|
||||
#define UAC2_XU_ENABLE 0x01
|
||||
#define UAC2_XU_CLUSTER 0x02
|
||||
#define UAC2_XU_UNDERFLOW 0x03
|
||||
#define UAC2_XU_OVERFLOW 0x04
|
||||
#define UAC2_XU_LATENCY 0x05
|
||||
|
||||
/* A.17.11 AudioStreaming Interface Control Selectors */
|
||||
#define UAC2_AS_UNDEFINED 0x00
|
||||
#define UAC2_AS_ACT_ALT_SETTING 0x01
|
||||
#define UAC2_AS_VAL_ALT_SETTINGS 0x02
|
||||
#define UAC2_AS_AUDIO_DATA_FORMAT 0x03
|
||||
|
||||
/* A.17.12 Encoder Control Selectors */
|
||||
#define UAC2_EN_UNDEFINED 0x00
|
||||
#define UAC2_EN_BIT_RATE 0x01
|
||||
#define UAC2_EN_QUALITY 0x02
|
||||
#define UAC2_EN_VBR 0x03
|
||||
#define UAC2_EN_TYPE 0x04
|
||||
#define UAC2_EN_UNDERFLOW 0x05
|
||||
#define UAC2_EN_OVERFLOW 0x06
|
||||
#define UAC2_EN_ENCODER_ERROR 0x07
|
||||
#define UAC2_EN_PARAM1 0x08
|
||||
#define UAC2_EN_PARAM2 0x09
|
||||
#define UAC2_EN_PARAM3 0x0a
|
||||
#define UAC2_EN_PARAM4 0x0b
|
||||
#define UAC2_EN_PARAM5 0x0c
|
||||
#define UAC2_EN_PARAM6 0x0d
|
||||
#define UAC2_EN_PARAM7 0x0e
|
||||
#define UAC2_EN_PARAM8 0x0f
|
||||
|
||||
/* A.17.13.1 MPEG Decoder Control Selectors */
|
||||
#define UAC2_MPEG_UNDEFINED 0x00
|
||||
#define UAC2_MPEG_DUAL_CHANNEL 0x01
|
||||
#define UAC2_MPEG_SECOND_STEREO 0x02
|
||||
#define UAC2_MPEG_MULTILINGUAL 0x03
|
||||
#define UAC2_MPEG_DYN_RANGE 0x04
|
||||
#define UAC2_MPEG_SCALING 0x05
|
||||
#define UAC2_MPEG_HILO_SCALING 0x06
|
||||
#define UAC2_MPEG_UNDERFLOW 0x07
|
||||
#define UAC2_MPEG_OVERFLOW 0x08
|
||||
#define UAC2_MPEG_DECODER_ERROR 0x09
|
||||
|
||||
/* A17.13.2 AC3 Decoder Control Selectors */
|
||||
#define UAC2_AC3_UNDEFINED 0x00
|
||||
#define UAC2_AC3_MODE 0x01
|
||||
#define UAC2_AC3_DYN_RANGE 0x02
|
||||
#define UAC2_AC3_SCALING 0x03
|
||||
#define UAC2_AC3_HILO_SCALING 0x04
|
||||
#define UAC2_AC3_UNDERFLOW 0x05
|
||||
#define UAC2_AC3_OVERFLOW 0x06
|
||||
#define UAC2_AC3_DECODER_ERROR 0x07
|
||||
|
||||
/* A17.13.3 WMA Decoder Control Selectors */
|
||||
#define UAC2_WMA_UNDEFINED 0x00
|
||||
#define UAC2_WMA_UNDERFLOW 0x01
|
||||
#define UAC2_WMA_OVERFLOW 0x02
|
||||
#define UAC2_WMA_DECODER_ERROR 0x03
|
||||
|
||||
/* A17.13.4 DTS Decoder Control Selectors */
|
||||
#define UAC2_DTS_UNDEFINED 0x00
|
||||
#define UAC2_DTS_UNDERFLOW 0x01
|
||||
#define UAC2_DTS_OVERFLOW 0x02
|
||||
#define UAC2_DTS_DECODER_ERROR 0x03
|
||||
|
||||
/* A17.14 Endpoint Control Selectors */
|
||||
#define UAC2_EP_CS_UNDEFINED 0x00
|
||||
#define UAC2_EP_CS_PITCH 0x01
|
||||
#define UAC2_EP_CS_DATA_OVERRUN 0x02
|
||||
#define UAC2_EP_CS_DATA_UNDERRUN 0x03
|
||||
|
||||
#endif /* __LINUX_USB_AUDIO_V2_H */
|
||||
|
||||
@@ -0,0 +1,231 @@
|
||||
#ifndef __USB_STACK_H__
|
||||
#define __USB_STACK_H__
|
||||
#include "typedef.h"
|
||||
#include "usb/usb.h"
|
||||
#include "usb/ch9.h"
|
||||
#include "usb/usb_phy.h"
|
||||
#include "usb/otg.h"
|
||||
|
||||
|
||||
#define MAX_INTERFACE_NUM 6
|
||||
#define USB_SUSPEND_RESUME 0
|
||||
#define USB_SUSPEND_RESUME_SYSTEM_NO_SLEEP 1
|
||||
#define USB_REMOTE_WAKEUP_TIMEOUT_DETECT_TIMES 2000
|
||||
#define USB_SETUP_SIZE (512)
|
||||
|
||||
#if 0
|
||||
#define USB_ATTACHED BIT(0)
|
||||
#define USB_POWERED BIT(1)
|
||||
#define USB_DEFAULT BIT(2)
|
||||
#define USB_ADDRESS BIT(3)
|
||||
#define USB_CONFIGURED BIT(4)
|
||||
#define USB_SUSPENDED BIT(5)
|
||||
#else
|
||||
enum {
|
||||
USB_ATTACHED,
|
||||
USB_POWERED,
|
||||
USB_DEFAULT,
|
||||
USB_ADDRESS,
|
||||
USB_CONFIGURED,
|
||||
USB_SUSPENDED
|
||||
};
|
||||
#endif
|
||||
|
||||
struct usb_device_t {
|
||||
u8 baddr;
|
||||
u8 bsetup_phase; //ep0 setup状态机
|
||||
u16 wDataLength; //ep0 setup data stage数据长度
|
||||
|
||||
u8 *setup_buffer; //本次传输的bufer地址
|
||||
u8 *setup_ptr; //当前传输的位置
|
||||
u32(*setup_hook)(struct usb_device_t *, struct usb_ctrlrequest *);
|
||||
u32(*setup_recv)(struct usb_device_t *, struct usb_ctrlrequest *);
|
||||
|
||||
u8 bDeviceStates;
|
||||
u8 bDataOverFlag; //ep0 0包标识
|
||||
u8 wDeviceClass; // 设备类
|
||||
u8 bSpeed; //速率：如USB_SPEED_FULL
|
||||
u8 bRemoteWakup: 1;
|
||||
u8 baddr_config: 1;
|
||||
u8 usb_id: 1;
|
||||
u8 res: 5;
|
||||
};
|
||||
|
||||
typedef u32(*itf_hander)(struct usb_device_t *usb_device, struct usb_ctrlrequest *);
|
||||
typedef u32(*ep_setup_hander)(struct usb_device_t *usb_device, struct usb_ctrlrequest *);
|
||||
typedef void(*itf_reset_hander)(struct usb_device_t *, u32 itf);
|
||||
typedef void(*usb_interrupt)(struct usb_device_t *, u32 ep);
|
||||
typedef u32(*desc_config)(const usb_dev usb_id, u8 *ptr, u32 *cur_itf_num);
|
||||
|
||||
struct usb_setup_t {
|
||||
struct usb_device_t usb_device;
|
||||
struct usb_ctrlrequest request;
|
||||
itf_hander interface_hander[MAX_INTERFACE_NUM];
|
||||
itf_reset_hander reset_hander[MAX_INTERFACE_NUM];
|
||||
ep_setup_hander ep_setup_tx[USB_MAX_HW_EPNUM];
|
||||
ep_setup_hander ep_setup_rx[USB_MAX_HW_EPNUM];
|
||||
} __attribute__((aligned(4)));
|
||||
|
||||
/**@brief 获取USB接口的id号
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @return USB的id号
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_device2id(usb_device);
|
||||
* @encode
|
||||
*/
|
||||
const usb_dev usb_device2id(const struct usb_device_t *usb_device);
|
||||
|
||||
/**@brief 获取usb_device_t定义的结构体地址
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 该结构的地址
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_id2device(usb_device);
|
||||
* @encode
|
||||
*/
|
||||
struct usb_device_t *usb_id2device(const usb_dev usb_id);
|
||||
|
||||
/**@brief USB setup阶段控制传输
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_control_transfer(usb_device);
|
||||
* @encode
|
||||
*/
|
||||
void usb_control_transfer(struct usb_device_t *usb_device);
|
||||
|
||||
/**@brief USB设置设备类
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @param[in] class_config 设备类设置
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_device_set_class(usb_device,class_config);
|
||||
* @encode
|
||||
*/
|
||||
void usb_device_set_class(struct usb_device_t *usb_device, u32 class_config);
|
||||
u32 usb_g_set_intr_hander(const usb_dev usb_id, u32 ep, usb_interrupt hander);
|
||||
|
||||
/**@brief USB设置接口服务函数
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @param[in] itf_num 接口号
|
||||
* @param[in] hander 自己定义的函数
|
||||
* @return itf_num:成功 0:失败
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_set_interface_hander(usb_id,itf_num,hander);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_set_interface_hander(const usb_dev usb_id, u32 itf_num, itf_hander hander);
|
||||
u32 usb_set_ep_setup_hander(const usb_dev usb_id, u32 ep, ep_setup_hander hander);
|
||||
void usb_add_desc_config(const usb_dev usb_id, u32 index, const desc_config desc);
|
||||
const u8 *usb_get_config_desc();
|
||||
|
||||
/**@brief USB设置复位服务函数
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @param[in] itf_num 接口号
|
||||
* @param[in] hander 自己定义的函数
|
||||
* @return itf_num:成功 0:失败
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_set_reset_hander(usb_id,itf_num,hander);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_set_reset_hander(const usb_dev usb_id, u32 itf_num, itf_reset_hander hander);
|
||||
|
||||
/**@brief USB接口复位
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_reset_interface(usb_device);
|
||||
* @encode
|
||||
*/
|
||||
void usb_reset_interface(struct usb_device_t *usb_device);
|
||||
void usb_set_setup_recv(struct usb_device_t *usb_device, void *recv);
|
||||
void usb_set_setup_hook(struct usb_device_t *usb_device, void *hook);
|
||||
int usb_device_mode(const usb_dev usb_id, const u32 class);
|
||||
|
||||
/**@brief otg检测中sof初始化
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 1:等待sof信号
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_otg_sof_check_init(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_otg_sof_check_init(const usb_dev id);
|
||||
|
||||
/**@brief USB setup阶段初始化
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @param[in] *ptr usb_setup_t定义的结构体地址
|
||||
* @param[in] *setup_buffer setup_buffer的地址
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_setup_init(usb_id,ptr,setup_buffer);
|
||||
* @encode
|
||||
*/
|
||||
void usb_setup_init(const usb_dev usb_id, void *ptr, u8 *setup_buffer);
|
||||
|
||||
/**@brief USB setup阶段释放
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 0:成功
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_setup_release(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_setup_release(const usb_dev usb_id);
|
||||
|
||||
/**@brief USB设置数据载荷
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @param[in] *req usb_ctrlrequest定义的结构体指针
|
||||
* @param[in] *data 存放数据指针
|
||||
* @param[in] len 数据长度
|
||||
* @return setup_buffer的地址
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_set_data_payload(usb_device,req,tx_payload,len);
|
||||
* @encode
|
||||
*/
|
||||
u8 *usb_set_data_payload(struct usb_device_t *usb_device, struct usb_ctrlrequest *req, const void *data, u32 len);
|
||||
|
||||
/**@brief USB设置控制传输阶段
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @param[in] setup_phase 需要设置成的阶段
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_set_setup_phase(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
void usb_set_setup_phase(struct usb_device_t *usb_device, u8 setup_phase);
|
||||
void dump_setup_request(const struct usb_ctrlrequest *request);
|
||||
void user_setup_filter_install(struct usb_device_t *usb_device);
|
||||
void usb_ep_enable(const usb_dev usb_id, u32 ep, u32 is_enable);
|
||||
|
||||
/**@brief USB获取本次传输的buffer地址
|
||||
* @param[in] *usb_device usb_device_t定义的结构体指针
|
||||
* @return setup_buffer地址
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_get_setup_buffer(usb_device);
|
||||
* @encode
|
||||
*/
|
||||
void *usb_get_setup_buffer(const struct usb_device_t *usb_device);
|
||||
u32 usb_root2_testing();
|
||||
|
||||
void usb_start(const usb_dev usbfd);
|
||||
void usb_stop(const usb_dev usbfd);
|
||||
void usb_pause(const usb_dev usbfd);
|
||||
int usb_standby(const usb_dev usbfd);
|
||||
void get_device_info_to_ota(void *parm_priv);
|
||||
int pc_device_event_handler(int *msg);
|
||||
|
||||
/* #define usb_add_desc_config(fn) \ */
|
||||
/* const desc_config usb_desc_config##fn sec(.usb.desc_config) = fn */
|
||||
|
||||
#endif /*USB_STACK_H*/
|
||||
@@ -0,0 +1,271 @@
|
||||
/**@file usb_host.h
|
||||
* @brief usb_host驱动头文件（做主机）
|
||||
* @details 结构体声明，功能函数声明
|
||||
* @author jieli
|
||||
* @date 2021-8-1
|
||||
* @version V1.0
|
||||
* @copyright Copyright(c)2010-2021 珠海市杰理科技股份有限公司
|
||||
*********************************************************
|
||||
* @attention
|
||||
* 硬件平台：AC695N
|
||||
* SDK版本：AC695N_V1.0.0_SDK
|
||||
* @修改日志：
|
||||
* <table>
|
||||
* <tr><th>Date <th>Version <th>Author <th>Description
|
||||
* <tr><td>2021-8-1 <td>1.0 <td>jieli <td>创建初始版本
|
||||
* </table>
|
||||
*
|
||||
*********************************************************
|
||||
*/
|
||||
#ifndef __USB_HOST_H__
|
||||
#define __USB_HOST_H__
|
||||
#include "system/task.h"
|
||||
#include "device/device.h"
|
||||
#include "usb/usb.h"
|
||||
#include "usb/ch9.h"
|
||||
#include "usb/usb_phy.h"
|
||||
// #include "usb_config.h"
|
||||
|
||||
|
||||
#define USB_HUB 0
|
||||
|
||||
/**@struct usb_private_data
|
||||
* @brief usb_private_data私有数据结构体\n
|
||||
* 自定义一些私有数据信息存储在该结构体中
|
||||
*/
|
||||
struct usb_private_data {
|
||||
usb_dev usb_id; ///<USB的id号，如：0 : USB0 ; 1 : USB1
|
||||
u8 status; ///<当前状态,如：0:上线 ; 1:下线
|
||||
u8 devnum; ///<设备编号
|
||||
u8 ep0_max_packet_size;///<端点0最大包长，单位：byte
|
||||
/* ///<以下为保留信息，暂时未使用
|
||||
u8 speed; ///<传输速度
|
||||
u16 vendor_id; ///<供应商
|
||||
u16 product_id; ///<产品id号
|
||||
u16 language; ///<语言
|
||||
u8 manufacturer[64]; ///<制造商
|
||||
u8 product[64]; ///<产品序列
|
||||
*/
|
||||
};
|
||||
|
||||
struct usb_host_device;
|
||||
|
||||
/**@struct interface_ctrl
|
||||
* @brief interface_ctrl
|
||||
*/
|
||||
struct interface_ctrl {
|
||||
u8 interface_class;
|
||||
int (*set_power)(struct usb_host_device *host_dev, u32 value);
|
||||
int (*get_power)(struct usb_host_device *host_dev, u32 value);
|
||||
int (*ioctl)(struct usb_host_device *host_dev, u32 cmd, u32 arg);
|
||||
int (*release)(struct usb_host_device *host_dev);
|
||||
};
|
||||
|
||||
/**@struct usb_interface_info
|
||||
*@brief usb_interface_info
|
||||
*/
|
||||
struct usb_interface_info {
|
||||
struct interface_ctrl *ctrl;
|
||||
union {
|
||||
struct mass_storage *disk;
|
||||
struct adb_device_t *adb;
|
||||
struct hid_device_t *hid;
|
||||
struct aoa_device_t *aoa;
|
||||
struct audio_device_t *audio;
|
||||
struct usb_uvc *uvc;
|
||||
void *p;
|
||||
} dev;
|
||||
};
|
||||
#define MAX_HOST_INTERFACE 6
|
||||
|
||||
/**@struct usb_host_device
|
||||
*@brief usb_host_device
|
||||
*/
|
||||
struct usb_host_device {
|
||||
#if USB_HUB
|
||||
struct usb_host_device *father;
|
||||
#endif
|
||||
OS_SEM *sem;
|
||||
struct usb_private_data private_data;
|
||||
const struct usb_interface_info *interface_info[MAX_HOST_INTERFACE];
|
||||
};
|
||||
|
||||
|
||||
#define device_to_usbdev(device) ((struct usb_host_device *)((device)->private_data))
|
||||
#define usbdev_to_usbpriv(host) ((struct usb_private_data *)(&host->private_data))
|
||||
#define usbpriv_to_usbid(priv) ((usb_dev)(priv->usb_id))
|
||||
|
||||
|
||||
|
||||
/**@brief USB设备id号获取
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @return USB设备的id号，如 0:USB0 ; 1:USB1
|
||||
* @par 示例：
|
||||
* @code
|
||||
* host_device2id(host_dev); 获取host_dev的USB设备id号
|
||||
* @encode
|
||||
*/
|
||||
u32 host_device2id(const struct usb_host_device *host_dev);
|
||||
|
||||
/**@brief USB设备状态获取
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @return USB设备的状态，如 0:下线 ; 1:上线
|
||||
* @par 示例：
|
||||
* @code
|
||||
* host_dev_status(host_dev); 获取host_dev的USB设备状态
|
||||
* @encode
|
||||
*/
|
||||
int host_dev_status(const struct usb_host_device *host_dev);
|
||||
|
||||
/**@brief 获取usb_host_device结构体的信息
|
||||
* @param[in] USB的id号
|
||||
* @return 结构体信息的存储首地址
|
||||
* @par 示例：
|
||||
* @code
|
||||
* struct usb_host_device *host_dev = &host_devices[usb_id];
|
||||
* @encode
|
||||
*/
|
||||
const struct usb_host_device *host_id2device(const usb_dev id);
|
||||
|
||||
#define check_usb_mount(ret) \
|
||||
if(ret == -DEV_ERR_OFFLINE){\
|
||||
log_error("%s() @ %d DEV_ERR_OFFLINE\n", __func__, __LINE__);\
|
||||
goto __exit_fail;\
|
||||
} else if(ret){\
|
||||
log_error("%s() @ %d %x\n", __func__, __LINE__, ret);\
|
||||
continue;\
|
||||
}
|
||||
|
||||
|
||||
typedef void(*usb_h_interrupt)(struct usb_host_device *, u32 ep);
|
||||
|
||||
/**@brief USB_sem初始化
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @return 0:成功
|
||||
* @par 示例：
|
||||
* @code
|
||||
* host_sem_init(host_dev);
|
||||
* @encode
|
||||
*/
|
||||
int usb_sem_init(struct usb_host_device *host_dev);
|
||||
|
||||
/**@brief USB_sem申请一个信号量
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @param[in] timeout 超时时间设置,单位ms
|
||||
* @return
|
||||
* @par 示例：
|
||||
* @code
|
||||
* host_sem_pend(host_dev,1000);
|
||||
* @encode
|
||||
*/
|
||||
int usb_sem_pend(struct usb_host_device *host_dev, u32 timeout);
|
||||
|
||||
/**@brief USB_sem释放一个信号量
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @return 0:成功
|
||||
* @par 示例：
|
||||
* @code
|
||||
* host_sem_psot(host_dev);
|
||||
* @encode
|
||||
*/
|
||||
int usb_sem_post(struct usb_host_device *host_dev);
|
||||
|
||||
/**@brief USB_sem删除
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @return
|
||||
* @par 示例：
|
||||
* @code
|
||||
* host_sem_del(host_dev);
|
||||
* @encode
|
||||
*/
|
||||
int usb_sem_del(struct usb_host_device *host_dev);
|
||||
|
||||
/**@brief USB主机模式设置端点中断
|
||||
* @param[in] usb_host_device定义的结构体指针
|
||||
* @param[in] ep 端点号
|
||||
* @param[in] hander usb_h_interrupt定义的指针函数
|
||||
* @param[in] *p
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_h_set_ep_isr(host_dev , 0 , func , host_dev);
|
||||
* @encode
|
||||
*/
|
||||
void usb_h_set_ep_isr(struct usb_host_device *host_dev, u32 ep, usb_h_interrupt hander, void *p);
|
||||
|
||||
/**@brief USB主机设置中断处理函数
|
||||
* @param[in] usb_id USB的id号
|
||||
* @param[in] ep 端点号
|
||||
* @param[in] hander usb_h_interrupt定义的指针函数
|
||||
* @return 0:成功
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_h_set_intr_hander(usb_id , 0 , func);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_h_set_intr_hander(const usb_dev usb_id, u32 ep, usb_h_interrupt hander);
|
||||
|
||||
/**@brief USB主机模式挂载
|
||||
* @param[in] usb_id USB的id号
|
||||
* @param[in] retry 主机挂载重试次数
|
||||
* @param[in] reset_delay 复位等待延时 单位ms
|
||||
* @param[in] mount_timeout 挂载超时时间 单位ms
|
||||
* @return
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_host_mount(usb_id , 5 , 10 , 1000 );
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_host_mount(const usb_dev usb_id, u32 retry, u32 reset_delay, u32 mount_timeout);
|
||||
|
||||
/**@brief USB主机模式卸载
|
||||
* @param[in] usb_id USB的id号
|
||||
* @return 0:成功
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_host_unmount(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_host_unmount(const usb_dev usb_id);
|
||||
|
||||
/**@brief USB主机模式重新挂载
|
||||
* @param[in] usb_id USB的id号
|
||||
* @param[in] retry 主机挂载重试次数
|
||||
* @param[in] delay 复位等待延时 单位ms
|
||||
* @param[in] ot 挂载超时时间 单位ms
|
||||
* @param[in] notify 事件发送开关 1:开启 0:关闭
|
||||
* @return 0:成功
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_host_remount(usb_id , 5 , 10 , 1000 , 1);
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_host_remount(const usb_dev usb_id, u32 retry, u32 delay, u32 ot, u8 notify);
|
||||
|
||||
/**@brief USB主机模式挂起
|
||||
* @param[in] usb_id USB的id号
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_host_suspend(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
void usb_host_suspend(const usb_dev usb_id);
|
||||
|
||||
/**@brief USB主机模式恢复
|
||||
* @param[in] usb_id USB的id号
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_host_resume(usb_id);
|
||||
* @encode
|
||||
*/
|
||||
void usb_host_resume(const usb_dev usb_id);
|
||||
|
||||
int usb_host_force_reset(const usb_dev usb_id);
|
||||
|
||||
void usb_host_clock_lock(void);
|
||||
|
||||
void usb_host_clock_unlock(void *priv);
|
||||
|
||||
#endif /*USB_HOST_H*/
|
||||
@@ -0,0 +1,207 @@
|
||||
/*****************************************************************
|
||||
>file name : uvc_device.h
|
||||
>author : lichao
|
||||
>create time : Sat 02 Sep 2017 03:22:12 PM HKT
|
||||
*****************************************************************/
|
||||
#ifndef _UVC_DEVICE_H_
|
||||
#define _UVC_DEVICE_H_
|
||||
#include "video.h"
|
||||
// #include "video/camera.h"
|
||||
|
||||
#define UVC_CMD_BASE 0x00010000
|
||||
|
||||
#define UVC_SET_CUR_FPS (UVC_CMD_BASE + 0)
|
||||
#define UVC_GET_CUR_FPS (UVC_CMD_BASE + 1)
|
||||
#define UVC_GET_CUR_BITS_RATE (UVC_CMD_BASE + 2)
|
||||
|
||||
#define UVC_CAMERA_FMT_YUY2 0x1
|
||||
#define UVC_CAMERA_FMT_MJPG 0x2
|
||||
#define UVC_CAMERA_FMT_H264 0x3
|
||||
|
||||
#define USBIOC_MASS_STORAGE_CONNECT _IOW('U', 0, sizeof(struct usb_mass_storage))
|
||||
#define USBIOC_UVC_CAMERA_CONNECT _IOW('U', 1, sizeof(struct uvc_format))
|
||||
#define USBIOC_UAC_MICROPHONE_CONNECT _IOW('U', 2, sizeof(struct uvc_format))
|
||||
//#define USBIOC_UVC_CAMERA1_CONNECT _IOW('U', 2, sizeof(struct uvc_format))
|
||||
#define USBIOC_SLAVE_MODE_START _IOW('U', 3, sizeof(unsigned int))
|
||||
#define USBIOC_SLAVE_DISCONNECT _IOW('U', 4, sizeof(unsigned int))
|
||||
#define UVCIOC_QUERYCAP _IOR('U', 5, sizeof(struct uvc_capability))
|
||||
#define UVCIOC_SET_CAP_SIZE _IOW('U', 5, sizeof(unsigned int))
|
||||
#define UVCIOC_SET_FPS _IOW('U', 6, sizeof(unsigned int))
|
||||
#define UVCIOC_STREAM_ON _IOW('U', 7, sizeof(unsigned int))
|
||||
#define UVCIOC_STREAM_OFF _IOW('U', 8, sizeof(unsigned int))
|
||||
#define UVCIOC_REQBUFS _IOW('U', 9, sizeof(unsigned int))
|
||||
#define UVCIOC_DQBUF _IOW('U', 10, sizeof(unsigned int))
|
||||
#define UVCIOC_QBUF _IOW('U', 11, sizeof(unsigned int))
|
||||
#define UVCIOC_RESET _IOW('U', 12, sizeof(unsigned int))
|
||||
#define UVCIOC_REQ_PROCESSING_UNIT _IOR('U', 13, sizeof(struct uvc_processing_unit))
|
||||
#define UVCIOC_SET_PROCESSING_UNIT _IOW('U', 14, sizeof(struct uvc_processing_unit))
|
||||
#define UVCIOC_GET_DEVICE_ID _IOR('U', 15, sizeof(struct usb_device_id))
|
||||
|
||||
#define USBIOC_SLAVE_RESET _IOW('U', 16, sizeof(unsigned int))
|
||||
|
||||
/***********2018-06-21************/
|
||||
#define USBIOC_GET_DEVICE_ID _IOR('U', 17, sizeof(struct usb_device_id))
|
||||
#define USBIOC_GET_MANUFACTURER _IOR('U', 18, sizeof(struct usb_string))
|
||||
#define USBIOC_GET_PRODUCT_NAME _IOR('U', 19, sizeof(struct usb_string))
|
||||
/*********************************/
|
||||
/***********2018-07-30************/
|
||||
#define UVCIOC_SET_EVENT_LISTENER _IOW('U', 19, sizeof(struct uvc_event_listener))
|
||||
/*********************************/
|
||||
|
||||
#define USBIOC_HID_CONNECT _IOW('U', 20, sizeof(struct usb_hid_arg))
|
||||
#define USBIOC_HID_CONTROL _IOW('U', 21, sizeof(struct usb_hid_arg))
|
||||
#define USBIOC_CDC_CONNECT _IOW('U', 22, sizeof(struct usb_cdc_arg))
|
||||
#define USBIOC_CDC_CONTROL _IOW('U', 23, sizeof(unsigned int))
|
||||
|
||||
/***********2020-05-11，设置uvc摄像头黑白切换************/
|
||||
#define UVCIOC_SET_CUR_GRAY _IOW('U', 24, sizeof(unsigned int))
|
||||
#define UVCIOC_GET_IMAMGE _IOR('U', 24, sizeof(unsigned int))
|
||||
#define UVCIOC_SET_CUR_FPS _IOW('U', 25, sizeof(unsigned int))
|
||||
/*********************************/
|
||||
#define UVCIOC_GET_FMT _IOR('U', 26, sizeof(unsigned int))
|
||||
|
||||
/* ------------------------------------------------------------------------
|
||||
* Driver specific constants.
|
||||
*/
|
||||
typedef int (*UVC_STREAM_OUT)(void *, int, void *, int);
|
||||
struct uvc_parm {
|
||||
s16 brightness_min;
|
||||
s16 brightness_max;
|
||||
s16 brightness_def;
|
||||
s16 brightness_res;
|
||||
s16 brightness_cur;
|
||||
|
||||
s16 contrast_min;
|
||||
s16 contrast_max;
|
||||
s16 contrast_def;
|
||||
s16 contrast_res;
|
||||
s16 contrast_cur;
|
||||
|
||||
s16 hue_min;
|
||||
s16 hue_max;
|
||||
s16 hue_def;
|
||||
s16 hue_res;
|
||||
s16 hue_cur;
|
||||
|
||||
s16 saturation_min;
|
||||
s16 saturation_max;
|
||||
s16 saturation_def;
|
||||
s16 saturation_res;
|
||||
s16 saturation_cur;
|
||||
|
||||
s16 sharpness_min;
|
||||
s16 sharpness_max;
|
||||
s16 sharpness_def;
|
||||
s16 sharpness_res;
|
||||
s16 sharpness_cur;
|
||||
|
||||
s16 gamma_min;
|
||||
s16 gamma_max;
|
||||
s16 gamma_def;
|
||||
s16 gamma_res;
|
||||
s16 gamma_cur;
|
||||
|
||||
s16 white_balance_temp_min;
|
||||
s16 white_balance_temp_max;
|
||||
s16 white_balance_temp_def;
|
||||
s16 white_balance_temp_res;
|
||||
s16 white_balance_temp_cur;
|
||||
|
||||
s16 power_line_freq_min;
|
||||
s16 power_line_freq_max;
|
||||
s16 power_line_freq_def;
|
||||
s16 power_line_freq_res;
|
||||
s16 power_line_freq_cur;
|
||||
};
|
||||
struct uvc_host_param {
|
||||
char *name;
|
||||
void *priv;
|
||||
UVC_STREAM_OUT uvc_stream_out;
|
||||
int (*uvc_out)(void *priv);
|
||||
};
|
||||
|
||||
struct uvc_stream_list {
|
||||
void *addr;
|
||||
u32 length;
|
||||
};
|
||||
struct uvc_frame_info {
|
||||
u16 width;
|
||||
u16 height;
|
||||
};
|
||||
struct uvc_reqbufs {
|
||||
void *buf;
|
||||
int size;
|
||||
};
|
||||
|
||||
struct uvc_capability {
|
||||
int fmt;
|
||||
int fps;
|
||||
int reso_num;
|
||||
struct uvc_frame_info reso[8];
|
||||
};
|
||||
|
||||
struct uvc_processing_unit {
|
||||
u8 request;
|
||||
u8 type;
|
||||
u16 value;
|
||||
u16 index;
|
||||
u8 buf[4];
|
||||
int len;
|
||||
};
|
||||
|
||||
|
||||
struct usb_device_id {
|
||||
u16 vendor;
|
||||
u16 product;
|
||||
};
|
||||
|
||||
struct usb_string {
|
||||
u8 code_type;
|
||||
u16 language;
|
||||
int len;
|
||||
u8 *string;
|
||||
};
|
||||
|
||||
enum trans_mode {
|
||||
UVC_PUSH_PHY_MODE,
|
||||
UVC_PUSH_VIRTUAL_MODE,
|
||||
};
|
||||
|
||||
struct usb_camera_info {
|
||||
u16 width;
|
||||
u16 height;
|
||||
int fps;
|
||||
int sample_fmt;
|
||||
enum trans_mode mode;
|
||||
};
|
||||
|
||||
struct uvc_platform_data {
|
||||
u16 width;
|
||||
u16 height;
|
||||
int fps;
|
||||
int fmt;
|
||||
int mem_size;
|
||||
int timeout;
|
||||
u8 put_msg;
|
||||
};
|
||||
|
||||
#define UVC_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct uvc_platform_data data = {\
|
||||
|
||||
#define UVC_PLATFORM_DATA_END() \
|
||||
};
|
||||
extern const struct device_operations uvc_dev_ops;
|
||||
|
||||
int uvc_get_src_pixformat(void *fh);
|
||||
int uvc_set_output_buf(void *fh, void *buf, int size);
|
||||
void set_uvc_gray(u32 flag);
|
||||
// void *uvc_output_open(u8 mijor, struct camera_device_info *info);
|
||||
// int uvc_output_set_fmt(void *fh, struct video_format *f);
|
||||
int uvc_get_real_fps(void *fh);
|
||||
int uvc_output_one_frame(void *fh);
|
||||
int uvc_output_stop(void *fh);
|
||||
int uvc_output_close(void *fh);
|
||||
int uvc_set_output_buffer(void *fh, void *buf, int num);
|
||||
// int uvc_set_scaler_handler(void *fh, void *priv, int (*handler)(void *, struct YUV_frame_data *));
|
||||
// int uvc_output_set_reso(void *fh, struct video_format *f, u16 *width, u16 *height);
|
||||
#endif
|
||||
@@ -0,0 +1,137 @@
|
||||
/**@file otg.h
|
||||
* @brief otg驱动头文件
|
||||
* @details 结构体声明，功能函数声明
|
||||
* @author jieli
|
||||
* @date 2021-7-22
|
||||
* @version V1.0
|
||||
* @copyright Copyright(c)2010-2021 珠海市杰理科技股份有限公司
|
||||
*********************************************************************
|
||||
* @attention
|
||||
* 硬件平台：AC632N
|
||||
* SDK版本：AC632N_V1.0.0_SDK
|
||||
* @修改日志：
|
||||
* <table>
|
||||
* <tr><th>Date <th>Version <th>Author <th>Description
|
||||
* <tr><td>2021-7-22 <td>1.0 <td>jieli <td>创建初始版本
|
||||
* </table>
|
||||
*
|
||||
*********************************************************************
|
||||
*/
|
||||
#ifndef __OTG_H__
|
||||
#define __OTG_H__
|
||||
|
||||
#include "usb/usb.h"
|
||||
|
||||
/**@enum usb_hotplug.state 或 usb_hotplug.last_state
|
||||
* @brief otg当前所处模式 或 上一次所处模式
|
||||
*/
|
||||
enum {
|
||||
IDLE_MODE = 0, ///<空闲模式
|
||||
DISCONN_MODE = 1, ///<断连模式
|
||||
HOST_MODE = 2, ///<主机模式
|
||||
PRE_SLAVE_MODE, ///<成为从机模式前的一个中间模式
|
||||
SLAVE_MODE_WAIT_CONFIRMATION, ///<从机模式还需等待再次确认
|
||||
SLAVE_MODE, ///<从机模式
|
||||
CHARGE_MODE, ///<充电模式
|
||||
OTG_USER_MODE, ///<用户模式，暂时未具体定义
|
||||
};
|
||||
|
||||
/**@enum 空
|
||||
* @brief otg挂起时，所选操作模式
|
||||
*/
|
||||
enum {
|
||||
OTG_OP_NULL = 0, ///< ///<空，无意义
|
||||
OTG_UNINSTALL = 1, ///<OTG卸载
|
||||
OTG_KEEP_STATE, ///<OTG保持
|
||||
OTG_SUSPEND, ///< OTG挂起
|
||||
OTG_RESUME, ///< OTG恢复
|
||||
};
|
||||
|
||||
/**@struct otg_dev_data
|
||||
* @brief otg_dev_data信息结构体 \n
|
||||
* 自定义的存储otg设备相关数据信息
|
||||
*/
|
||||
struct otg_dev_data {
|
||||
u8 usb_dev_en; ///<有哪几个otg设备使能，如USB0，USB1。
|
||||
u8 slave_online_cnt; ///<从机上线阈值
|
||||
u8 slave_offline_cnt; ///<从机下线阈值
|
||||
u8 host_online_cnt; ///<主机上线阈值
|
||||
u8 host_offline_cnt; ///<主机下线阈值
|
||||
u8 detect_mode; ///<otg可用模式配置
|
||||
u8 detect_time_interval; ///<检测时间间隔，单位 ms
|
||||
|
||||
void *otg1; //需要使用双USB口独立配置时，在板级.c文件用户自定义一个otg信息的结构体，并指向它。
|
||||
};
|
||||
|
||||
|
||||
/**@brief USB设备当前模式获取
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 函数的执行结果
|
||||
* - IDLE_MODE
|
||||
* - DISCONN_MODE
|
||||
* - HOST_MODE
|
||||
* - PRE_SLAVE_MODE
|
||||
* - SLAVE_MODE_WAIT_CONFIRMATION
|
||||
* - SLAVE_MODE
|
||||
* - CHARGE_MODE
|
||||
* - OTG_USER_MODE
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_otg_online(0); 获取USB0当前模式
|
||||
* @encode
|
||||
*/
|
||||
u32 usb_otg_online(const usb_dev usb_id);
|
||||
// u32 usb_otg_init(u32 mode);
|
||||
|
||||
/**@brief 将DP/DM脚设为高阻
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_otg_io_suspend(0); 将USB0的DP/DM脚设为高阻状态
|
||||
* @encode
|
||||
*/
|
||||
void usb_otg_io_suspend(usb_dev usb_id);
|
||||
|
||||
/**@brief 恢复DP/DM引脚的USB功能，并发起usb reset
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_otg_io_resume(0); 将USB0的IO口功能恢复
|
||||
* @encode
|
||||
*/
|
||||
void usb_otg_io_resume(usb_dev usb_id);
|
||||
|
||||
/**@brief 将usb_otg设备挂起
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @param[in] op_mode 选择挂起模式
|
||||
* @ref OTG_UNINSTALL OTG卸载
|
||||
* @ref OTG_KEEP_STATE OTG保持原模式
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_otg_suspend(0,OTG_KEEP_STATE); USB0保持原来的模式
|
||||
* @encode
|
||||
*/
|
||||
void usb_otg_suspend(usb_dev usb_id, u8 op_mode);
|
||||
|
||||
/**@brief 将usb_otg设备恢复
|
||||
* @param[in] usb_id USB接口的id号
|
||||
* @return 无
|
||||
* @par 示例：
|
||||
* @code
|
||||
* usb_otg_resume(0); USB0恢复
|
||||
* @encode
|
||||
*/
|
||||
void usb_otg_resume(usb_dev usb_id);
|
||||
|
||||
void usb_detect_timer_add();
|
||||
|
||||
void usb_detect_timer_del();
|
||||
|
||||
|
||||
extern const struct device_operations usb_dev_ops;
|
||||
|
||||
|
||||
#endif /*OTG_H*/
|
||||
@@ -0,0 +1,251 @@
|
||||
#ifndef __SCSI_H__
|
||||
#define __SCSI_H__
|
||||
|
||||
#define USB_MSD_MAX_LUN 0xfe
|
||||
#define USB_MSD_RESET 0xff
|
||||
|
||||
|
||||
/*
|
||||
* SCSI opcodes
|
||||
*/
|
||||
#define TEST_UNIT_READY 0x00
|
||||
#define REZERO_UNIT 0x01
|
||||
#define REQUEST_SENSE 0x03
|
||||
#define FORMAT_UNIT 0x04
|
||||
#define READ_BLOCK_LIMITS 0x05
|
||||
#define REASSIGN_BLOCKS 0x07
|
||||
#define INITIALIZE_ELEMENT_STATUS 0x07
|
||||
#define READ_6 0x08
|
||||
#define WRITE_6 0x0a
|
||||
#define SEEK_6 0x0b
|
||||
#define READ_REVERSE 0x0f
|
||||
#define WRITE_FILEMARKS 0x10
|
||||
#define SPACE 0x11
|
||||
#define INQUIRY 0x12
|
||||
#define RECOVER_BUFFERED_DATA 0x14
|
||||
#define MODE_SELECT 0x15
|
||||
#define RESERVE 0x16
|
||||
#define RELEASE 0x17
|
||||
#define COPY 0x18
|
||||
#define ERASE 0x19
|
||||
#define MODE_SENSE 0x1a
|
||||
#define START_STOP 0x1b
|
||||
#define RECEIVE_DIAGNOSTIC 0x1c
|
||||
#define SEND_DIAGNOSTIC 0x1d
|
||||
#define ALLOW_MEDIUM_REMOVAL 0x1e
|
||||
|
||||
#define READ_FORMAT_CAPACITIES 0x23
|
||||
#define SET_WINDOW 0x24
|
||||
#define READ_CAPACITY 0x25
|
||||
#define READ_10 0x28
|
||||
#define WRITE_10 0x2a
|
||||
#define SEEK_10 0x2b
|
||||
#define POSITION_TO_ELEMENT 0x2b
|
||||
#define WRITE_VERIFY 0x2e
|
||||
#define VERIFY 0x2f
|
||||
#define SEARCH_HIGH 0x30
|
||||
#define SEARCH_EQUAL 0x31
|
||||
#define SEARCH_LOW 0x32
|
||||
#define SET_LIMITS 0x33
|
||||
#define PRE_FETCH 0x34
|
||||
#define READ_POSITION 0x34
|
||||
#define SYNCHRONIZE_CACHE 0x35
|
||||
#define LOCK_UNLOCK_CACHE 0x36
|
||||
#define READ_DEFECT_DATA 0x37
|
||||
#define MEDIUM_SCAN 0x38
|
||||
#define COMPARE 0x39
|
||||
#define COPY_VERIFY 0x3a
|
||||
#define WRITE_BUFFER 0x3b
|
||||
#define READ_BUFFER 0x3c
|
||||
#define UPDATE_BLOCK 0x3d
|
||||
#define READ_LONG 0x3e
|
||||
#define WRITE_LONG 0x3f
|
||||
#define CHANGE_DEFINITION 0x40
|
||||
#define WRITE_SAME 0x41
|
||||
#define UNMAP 0x42
|
||||
#define READ_TOC 0x43
|
||||
#define READ_HEADER 0x44
|
||||
#define GET_EVENT_STATUS_NOTIFICATION 0x4a
|
||||
#define LOG_SELECT 0x4c
|
||||
#define LOG_SENSE 0x4d
|
||||
#define XDWRITEREAD_10 0x53
|
||||
#define MODE_SELECT_10 0x55
|
||||
#define RESERVE_10 0x56
|
||||
#define RELEASE_10 0x57
|
||||
#define MODE_SENSE_10 0x5a
|
||||
#define PERSISTENT_RESERVE_IN 0x5e
|
||||
#define PERSISTENT_RESERVE_OUT 0x5f
|
||||
#define VARIABLE_LENGTH_CMD 0x7f
|
||||
#define REPORT_LUNS 0xa0
|
||||
#define SECURITY_PROTOCOL_IN 0xa2
|
||||
#define MAINTENANCE_IN 0xa3
|
||||
#define MAINTENANCE_OUT 0xa4
|
||||
#define MOVE_MEDIUM 0xa5
|
||||
#define EXCHANGE_MEDIUM 0xa6
|
||||
#define READ_12 0xa8
|
||||
#define WRITE_12 0xaa
|
||||
#define READ_MEDIA_SERIAL_NUMBER 0xab
|
||||
#define WRITE_VERIFY_12 0xae
|
||||
#define VERIFY_12 0xaf
|
||||
#define SEARCH_HIGH_12 0xb0
|
||||
#define SEARCH_EQUAL_12 0xb1
|
||||
#define SEARCH_LOW_12 0xb2
|
||||
#define SECURITY_PROTOCOL_OUT 0xb5
|
||||
#define READ_ELEMENT_STATUS 0xb8
|
||||
#define SEND_VOLUME_TAG 0xb6
|
||||
#define WRITE_LONG_2 0xea
|
||||
#define EXTENDED_COPY 0x83
|
||||
#define RECEIVE_COPY_RESULTS 0x84
|
||||
#define ACCESS_CONTROL_IN 0x86
|
||||
#define ACCESS_CONTROL_OUT 0x87
|
||||
#define READ_16 0x88
|
||||
#define WRITE_16 0x8a
|
||||
#define READ_ATTRIBUTE 0x8c
|
||||
#define WRITE_ATTRIBUTE 0x8d
|
||||
#define VERIFY_16 0x8f
|
||||
#define SYNCHRONIZE_CACHE_16 0x91
|
||||
#define WRITE_SAME_16 0x93
|
||||
#define SERVICE_ACTION_IN 0x9e
|
||||
|
||||
/*
|
||||
* SENSE KEYS
|
||||
*/
|
||||
|
||||
#define NO_SENSE 0x00
|
||||
#define RECOVERED_ERROR 0x01
|
||||
#define NOT_READY 0x02
|
||||
#define MEDIUM_ERROR 0x03
|
||||
#define HARDWARE_ERROR 0x04
|
||||
#define ILLEGAL_REQUEST 0x05
|
||||
#define UNIT_ATTENTION 0x06
|
||||
#define DATA_PROTECT 0x07
|
||||
#define BLANK_CHECK 0x08
|
||||
#define COPY_ABORTED 0x0a
|
||||
#define ABORTED_COMMAND 0x0b
|
||||
#define VOLUME_OVERFLOW 0x0d
|
||||
#define MISCOMPARE 0x0e
|
||||
/* Additional Sense code definition*/
|
||||
#define ASC_NO_ADDITIONAL_SENSE_INFORMATION 0x00
|
||||
#define ASC_RECOVERED_DATA_WITH_RETRIES 0x17
|
||||
#define ASC_RECOVERED_DATA_WITH_ECC 0x18
|
||||
#define ASC_MEDIUM_PRESENT 0x3A
|
||||
#define ASC_LOGICAL_DRIVE_NOT_READY_BEING_READY 0x04
|
||||
#define ASC_LOGICAL_DRIVE_NOT_READY_FMT_IN_PRGS 0x04
|
||||
#define ASC_NO_REFERENCE_POSITION_FOUND 0x06
|
||||
#define ASC_NO_SEEK_COMPLETE 0x02
|
||||
#define ASC_WRITE_FAULT 0x03
|
||||
#define ASC_ID_CRC_ERROR 0x10
|
||||
#define ASC_UNRECOVERED_READ_ERROR 0x11
|
||||
#define ASC_ADDRESS_MARK_NOT_FOUND_FOR_ID_FIELD 0x12
|
||||
#define ASC_RECORDED_ENTITY_NOT_FOUND 0x14
|
||||
#define ASC_INCOMPATIBLE_MEDIUM_INSTALLED 0x30
|
||||
#define ASC_CANNOT_READ_MEDIUM_INCOMPATIBLE_FMT 0x30
|
||||
#define ASC_CANNOT_READ_MEDIUM_UNKNOWN_FORMAT 0x30
|
||||
#define ASC_FORMAT_COMMAND_FAILED 0x31
|
||||
#define ASC_INVALID_COMMAND_OPERATION_CODE 0x20
|
||||
#define ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x21
|
||||
#define ASC_INVALID_FIELD_IN_COMMAND_PACKET 0x24
|
||||
#define ASC_LOGICAL_UNIT_NOT_SUPPORTED 0x25
|
||||
#define ASC_INVALID_FIELD_IN_PARAMETER_LIST 0x26
|
||||
#define ASC_MEDIUM_REMOVAL_PREVENTED 0x53
|
||||
#define ASC_NOT_READY_TO_READY_TRANSIT_MDI_CHNG 0x28
|
||||
#define ASC_POWER_ON_OR_BUS_DEVICE_RESET 0x29
|
||||
#define ASC_WRITE_PROTECTED_MEDIA 0x27
|
||||
#define ASC_OVERLAPPED_COMMAND_ATTEMPTED 0x4E
|
||||
|
||||
/* Definition of additional sense code qualifier*/
|
||||
/* Additional Sense code definition */
|
||||
#define ASCQ_NO_ADDITIONAL_SENSE_INFORMATION 0x00
|
||||
#define ASCQ_RECOVERED_DATA_WITH_RETRIES 0x01
|
||||
#define ASCQ_RECOVERED_DATA_WITH_ECC 0x00
|
||||
#define ASCQ_MEDIUM_PRESENT 0x00
|
||||
#define ASCQ_LOGICAL_DRIVE_NOT_READY_BEING_READY 0x01
|
||||
#define ASCQ_LOGICAL_DRIVE_NOT_READY_FMT_IN_PRGS 0x04
|
||||
#define ASCQ_NO_REFERENCE_POSITION_FOUND 0x00
|
||||
#define ASCQ_NO_SEEK_COMPLETE 0x00
|
||||
#define ASCQ_WRITE_FAULT 0x00
|
||||
#define ASCQ_ID_CRC_ERROR 0x00
|
||||
#define ASCQ_UNRECOVERED_READ_ERROR 0x00
|
||||
#define ASCQ_ADDRESS_MARK_NOT_FOUND_FOR_ID_FIELD 0x00
|
||||
#define ASCQ_RECORDED_ENTITY_NOT_FOUND 0x00
|
||||
#define ASCQ_INCOMPATIBLE_MEDIUM_INSTALLED 0x00
|
||||
#define ASCQ_CANNOT_READ_MEDIUM_INCOMPATIBLE_FMT 0x02
|
||||
#define ASCQ_CANNOT_READ_MEDIUM_UNKNOWN_FORMAT 0x01
|
||||
#define ASCQ_FORMAT_COMMAND_FAILED 0x01
|
||||
#define ASCQ_INVALID_COMMAND_OPERATION_CODE 0x00
|
||||
#define ASCQ_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x00
|
||||
#define ASCQ_INVALID_FIELD_IN_COMMAND_PACKET 0x00
|
||||
#define ASCQ_LOGICAL_UNIT_NOT_SUPPORTED 0x00
|
||||
#define ASCQ_INVALID_FIELD_IN_PARAMETER_LIST 0x00
|
||||
#define ASCQ_MEDIUM_REMOVAL_PREVENTED 0x02
|
||||
#define ASCQ_NOT_READY_TO_READY_TRANSIT_MDI_CHNG 0x00
|
||||
#define ASCQ_POWER_ON_OR_BUS_DEVICE_RESET 0x00
|
||||
#define ASCQ_WRITE_PROTECTED_MEDIA 0x00
|
||||
#define ASCQ_OVERLAPPED_COMMAND_ATTEMPTED 0x00
|
||||
#define USB_LITTLE_ENDIAN
|
||||
#ifdef USB_LITTLE_ENDIAN
|
||||
#define CBW_SIGNATURE 0x43425355L
|
||||
#define CSW_SIGNATURE 0x53425355L
|
||||
#define CBW_TAG 0x34675326L
|
||||
#elif defined(USB_BIG_ENDIAN)
|
||||
#define CBW_SIGNATURE 0x55534243L
|
||||
#define CSW_SIGNATURE 0x55534253L
|
||||
#define CBW_TAG 0x26536734L
|
||||
#else
|
||||
#error not define endian
|
||||
#endif
|
||||
|
||||
struct usb_scsi_cbw {
|
||||
u32 dCBWSignature; //[3:0]
|
||||
u32 dCBWTag; //[7:4]
|
||||
u32 dCBWDataTransferLength; //[11:8]
|
||||
u8 bmCBWFlags; //[12]
|
||||
u8 bCBWLUN; //[13] lun=[3:0] res=[7:4]
|
||||
u8 bCBWLength; //[14] len=[4:0] res=[7:5]
|
||||
u8 operationCode;
|
||||
u8 lun; //<Logical Unit Number
|
||||
u8 lba[4]; //<Logical Block Address[7:31]
|
||||
u8 Reserved;
|
||||
u8 LengthH; //<Transfer or Parameter List or Allocation Length
|
||||
u8 LengthL;
|
||||
u8 XLength;
|
||||
u8 Null[6];
|
||||
} __attribute__((packed)) ;
|
||||
|
||||
struct usb_scsi_csw {
|
||||
u32 dCSWSignature; //[3:0]
|
||||
u32 dCSWTag; //[7:4]
|
||||
u32 uCSWDataResidue; //[11:8]
|
||||
volatile u8 bCSWStatus; //[12]
|
||||
} __attribute__((packed)) ;
|
||||
|
||||
struct inquiry_data {
|
||||
u8 PeripheralDeviceType;
|
||||
u8 RMB;
|
||||
u8 ISO;
|
||||
u8 ResponseDataFormat;
|
||||
u8 AdditionalLength;
|
||||
u8 Reserved[3];
|
||||
u8 VendorInfo[8];
|
||||
u8 ProductInfo[16];
|
||||
u8 ProductRevisionLevel[4];
|
||||
} __attribute__((packed)) ;
|
||||
|
||||
struct read_capacity_data {
|
||||
u32 block_num;
|
||||
u32 block_size;
|
||||
} __attribute__((packed)) ;
|
||||
|
||||
struct request_sense_data {
|
||||
u8 ErrorCode;
|
||||
u8 Reserved;
|
||||
volatile u8 SenseKey;
|
||||
u8 Info[4];
|
||||
u8 ASL;
|
||||
u8 Reserved1[4];
|
||||
u8 ASC;
|
||||
u8 ASCQ;
|
||||
u8 Reserved2[4];
|
||||
} __attribute__((packed)) ;
|
||||
|
||||
#endif /*SCSI_H*/
|
||||
@@ -0,0 +1,139 @@
|
||||
#ifndef _USB_H_
|
||||
#define _USB_H_
|
||||
#include "typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
#include "asm/usb_hw.h"
|
||||
|
||||
|
||||
#ifndef USB_DIR_OUT
|
||||
#define USB_DIR_OUT 0 /* to device */
|
||||
#endif
|
||||
#ifndef USB_DIR_IN
|
||||
#define USB_DIR_IN 0x80 /* to host */
|
||||
#endif
|
||||
|
||||
#define EP0_SETUP_LEN 0x40
|
||||
|
||||
|
||||
|
||||
|
||||
struct usb_ep_addr_t {
|
||||
u32 ep0_addr;
|
||||
u32 ep_usage;
|
||||
u32 ep_taddr[4];
|
||||
u32 ep_dual_taddr[4];
|
||||
u32 ep_raddr[4];
|
||||
u32 ep_dual_raddr[4];
|
||||
u32 ep_tsize[4];
|
||||
u32 ep_rsize[4];
|
||||
} __attribute__((aligned(4)));
|
||||
|
||||
typedef struct {
|
||||
u32 stamp;
|
||||
u32 left_time;
|
||||
} usb_ot_t;
|
||||
|
||||
|
||||
typedef u8 usb_dev;
|
||||
|
||||
u32 usb_phy_status(const usb_dev id);
|
||||
u32 usb_sie_status(const usb_dev id);
|
||||
u32 usb_check_dpo(const usb_dev id);
|
||||
u32 usb_check_dmo(const usb_dev id);
|
||||
u32 usb_read_dp_se(const usb_dev id);
|
||||
u32 usb_read_dm_se(const usb_dev id);
|
||||
u16 usb_read_sofframe(const usb_dev id);
|
||||
void usb_sie_enable(const usb_dev usb_id);
|
||||
void usb_sie_disable(const usb_dev id);
|
||||
void usb_write_ep_cnt(const usb_dev usb_id, u32 ep, u32 len);
|
||||
u32 usb_g_dev_status(const usb_dev usb_id);
|
||||
u32 usb_h_dev_status(const usb_dev usb_id);
|
||||
void usb_set_low_speed(const usb_dev usb_id, u8 flag);
|
||||
void usb_write_ep0(const usb_dev usb_id, const u8 *ptr, u32 len);
|
||||
void usb_read_ep0(const usb_dev usb_id, u8 *ptr, u32 len);
|
||||
u32 usb_get_dma_size(const usb_dev usb_id, u32 ep);
|
||||
void usb_set_dma_tsize(const usb_dev usb_id, u32 ep, u32 size);
|
||||
void usb_set_dma_rsize(const usb_dev usb_id, u32 ep, u32 size);
|
||||
void *usb_get_dma_taddr(const usb_dev usb_id, u32 ep);
|
||||
void usb_set_dma_taddr(const usb_dev usb_id, u32 ep, void *ptr);
|
||||
void *usb_get_dma_raddr(const usb_dev usb_id, u32 ep);
|
||||
void usb_set_dma_raddr(const usb_dev usb_id, u32 ep, void *ptr);
|
||||
void usb_set_dma_dual_raddr(const usb_dev usb_id, u32 ep, void *ptr);
|
||||
void usb_write_power(const usb_dev usb_id, u32 value);
|
||||
u32 usb_read_power(const usb_dev usb_id);
|
||||
u32 usb_read_devctl(const usb_dev usb_id);
|
||||
void usb_write_devctl(const usb_dev usb_id, u32 value);
|
||||
u32 usb_read_csr0(const usb_dev usb_id);
|
||||
void usb_write_csr0(const usb_dev usb_id, u32 csr0);
|
||||
void usb_ep0_ClrRxPktRdy(const usb_dev usb_id);
|
||||
void usb_ep0_TxPktEnd(const usb_dev usb_id);
|
||||
void usb_ep0_RxPktEnd(const usb_dev usb_id);
|
||||
void usb_ep0_Set_Stall(const usb_dev usb_id);
|
||||
u32 usb_read_count0(const usb_dev usb_id);
|
||||
void usb_read_intre(const usb_dev usb_id,
|
||||
u32 *const intr_usbe,
|
||||
u32 *const intr_txe,
|
||||
u32 *const intr_rxe);
|
||||
|
||||
void usb_read_intr(const usb_dev usb_id,
|
||||
u32 *const intr_usb,
|
||||
u32 *const intr_tx,
|
||||
u32 *const intr_rx);
|
||||
void usb_write_intr_usbe(const usb_dev usb_id, u32 intr_usbe);
|
||||
void usb_set_intr_txe(const usb_dev usb_id, const u32 ep);
|
||||
void usb_clr_intr_txe(const usb_dev usb_id, const u32 ep);
|
||||
void usb_set_intr_rxe(const usb_dev usb_id, const u32 ep);
|
||||
void usb_clr_intr_rxe(const usb_dev usb_id, const u32 ep);
|
||||
void usb_write_faddr(const usb_dev usb_id, u32 addr);
|
||||
void usb_write_txcsr(const usb_dev usb_id, const u32 ep, u32 txcsr);
|
||||
u32 usb_read_txcsr(const usb_dev usb_id, const u32 ep);
|
||||
void usb_write_rxcsr(const usb_dev usb_id, const u32 ep, u32 rxcsr);
|
||||
u32 usb_read_rxcsr(const usb_dev usb_id, const u32 ep);
|
||||
void usb_write_rxmaxp(const usb_dev usb_id, const u32 ep, u32 value);
|
||||
void usb_write_txmaxp(const usb_dev usb_id, const u32 ep, u32 value);
|
||||
void usb_write_rxtype(const usb_dev usb_id, const u32 ep, u32 value);
|
||||
void usb_write_txtype(const usb_dev usb_id, const u32 ep, u32 value);
|
||||
int usb_read_rxcount(const usb_dev usb_id, u32 ep);
|
||||
u32 usb_g_ep_read64byte_fast(const usb_dev usb_id, const u32 ep, u8 *ptr, u32 len);
|
||||
u32 usb_g_ep_read(const usb_dev usb_id, const u32 ep, u8 *ptr, u32 len, u32 block);
|
||||
u32 usb_g_ep_write(const usb_dev usb_id, u32 ep, const u8 *ptr, u32 len);
|
||||
u32 usb_g_ep_config(const usb_dev usb_id, u32 ep, u32 type, u32 ie, u8 *ptr, u32 dma_size);
|
||||
void usb_g_sie_init(const usb_dev usb_id);
|
||||
void usb_g_hold(const usb_dev usb_id);
|
||||
u32 usb_get_ep_num(const usb_dev usb_id, u32 ep_dir, u32 type);
|
||||
u32 usb_h_ep_config(const usb_dev usb_id, u32 ep, u32 type, u32 ie, u32 interval, u8 *ptr, u32 dma_size);
|
||||
u32 usb_h_ep_write(const usb_dev usb_id, u8 host_ep, u16 txmaxp, u8 target_ep, const u8 *ptr, u32 len, u32 xfer);
|
||||
int usb_h_ep_write_async(const usb_dev id, u8 host_ep, u16 txmaxp, u8 target_ep, const u8 *ptr, u32 len, u32 xfer, u32 kstart);
|
||||
u32 usb_h_ep_read(const usb_dev usb_id, u8 host_ep, u16 rxmaxp, u8 target_ep, u8 *ptr, u32 len, u32 xfer);
|
||||
int usb_h_ep_read_async(const usb_dev id, u8 host_ep, u8 target_ep, u8 *ptr, u32 len, u32 xfer, u32 kstart);
|
||||
void usb_h_sie_init(const usb_dev usb_id);
|
||||
void usb_h_sie_close(const usb_dev usb_id);
|
||||
u32 usb_h_chirp_and_reset(const usb_dev id, u32 reset_delay, u32 timeout);
|
||||
void usb_h_sie_reset(const usb_dev usb_id);
|
||||
void usb_hotplug_disable(const usb_dev usb_id);
|
||||
void usb_hotplug_enable(const usb_dev usb_id, u32 mode);
|
||||
void usb_pdchkdp_disable(const usb_dev usb_id);
|
||||
void usb_pdchkdp_enable(const usb_dev usb_id);
|
||||
void usb_sie_close(const usb_dev usb_id);
|
||||
void usb_sie_close_all(void);
|
||||
void usb_var_init(const usb_dev usb_id, void *ptr);
|
||||
void usb_var_release(const usb_dev usb_id);
|
||||
void usb_enable_ep(const usb_dev usb_id, u32 eps);
|
||||
void usb_disable_ep(const usb_dev usb_id, u32 eps);
|
||||
u32 usb_get_ep_status(const usb_dev usb_id, u32 epx);
|
||||
void usb_sofie_enable(const usb_dev id);
|
||||
void usb_sofie_disable(const usb_dev id);
|
||||
u32 usb_read_sofpnd(const usb_dev id);
|
||||
void usb_sof_clr_pnd(const usb_dev id);
|
||||
void usb_ep0_Set_ignore(const usb_dev id, u32 addr);
|
||||
void usb_recover_io_status(const usb_dev id);
|
||||
void usb_write_rxinterval(const usb_dev id, const u32 ep, u32 value);
|
||||
void usb_write_txinterval(const usb_dev id, const u32 ep, u32 value);
|
||||
void usb_write_txfuncaddr(const usb_dev id, const u32 ep, const u32 devnum);
|
||||
void usb_write_rxfuncaddr(const usb_dev id, const u32 ep, const u32 devnum);
|
||||
void usb_h_force_reset(const usb_dev usb_id);
|
||||
void usb_lowpower_enter_sleep(void);
|
||||
void usb_lowpower_exit_sleep(void);
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,209 @@
|
||||
#ifndef __USB_PHY_H__
|
||||
#define __USB_PHY_H__
|
||||
#include "typedef.h"
|
||||
#include "usb/usb.h"
|
||||
|
||||
#ifndef min
|
||||
#define min(a,b) ((a)<(b) ? (a) : (b))
|
||||
#endif
|
||||
#ifndef max
|
||||
#define max(a,b) ((a)>(b) ? (a) : (b))
|
||||
#endif
|
||||
|
||||
#define ___ntohl(X) ((((u16)(X) & 0xff00) >> 8) |(((u16)(X) & 0x00ff) << 8))
|
||||
|
||||
#define ___ntohs(X) ((((u32)(X) & 0xff000000) >> 24) | \
|
||||
(((u32)(X) & 0x00ff0000) >> 8) | \
|
||||
(((u32)(X) & 0x0000ff00) << 8) | \
|
||||
(((u32)(X) & 0x000000ff) << 24))
|
||||
|
||||
#if defined(cpu_to_be16) || defined(cpu_to_be32) || defined(be16_to_cpu) || defined(be32_to_cpu)
|
||||
#error #define cpu_to_be16
|
||||
#endif
|
||||
|
||||
#define cpu_to_be16(v16) ___ntohl(v16)
|
||||
#define cpu_to_be32(v32) ___ntohs(v32)
|
||||
|
||||
#define be16_to_cpu(v16) cpu_to_be16(v16)
|
||||
#define be32_to_cpu(v32) cpu_to_be32(v32)
|
||||
#define __le16_to_cpu(v16) (v16)
|
||||
#define __le32_to_cpu(v32) (v32)
|
||||
|
||||
#if defined(cpu_to_le16) || defined(cpu_to_le32) || defined(le16_to_cpu) || defined(le32_to_cpu)
|
||||
#error #define cpu_to_be16
|
||||
#endif
|
||||
|
||||
#define cpu_to_le16(v16) (v16)
|
||||
#define cpu_to_le32(v32) (v32)
|
||||
|
||||
#define le16_to_cpu(v16) cpu_to_le16(v16)
|
||||
#define le32_to_cpu(v32) cpu_to_le32(v32)
|
||||
|
||||
#define LOWORD(l) ((u16)(l))
|
||||
#define HIWORD(l) ((u16)(((u32)(l) >> 16) & 0xFFFF))
|
||||
|
||||
#define LOBYTE(w) ((u8)(w))
|
||||
#define HIBYTE(w) ((u8)(((u16)(w) >> 8) & 0xFF))
|
||||
|
||||
#define DW1BYTE(dw) (LOBYTE(LOWORD(dw)))
|
||||
#define DW2BYTE(dw) (HIBYTE(LOWORD(dw)))
|
||||
#define DW3BYTE(dw) (LOBYTE(HIWORD(dw)))
|
||||
#define DW4BYTE(dw) (HIBYTE(HIWORD(dw)))
|
||||
|
||||
//............. Full Speed USB ...................
|
||||
#define MUSB_FADDR 0x00
|
||||
#define MUSB_POWER 0x01
|
||||
#define MUSB_INTRTX1 0x02
|
||||
#define MUSB_INTRTX2 0x03
|
||||
#define MUSB_INTRRX1 0x04
|
||||
#define MUSB_INTRRX2 0x05
|
||||
#define MUSB_INTRUSB 0x06
|
||||
#define MUSB_INTRTX1E 0x07
|
||||
#define MUSB_INTRTX2E 0x08
|
||||
#define MUSB_INTRRX1E 0x09
|
||||
#define MUSB_INTRRX2E 0x0a
|
||||
#define MUSB_INTRUSBE 0x0b
|
||||
#define MUSB_FRAME1 0x0c
|
||||
#define MUSB_FRAME2 0x0d
|
||||
#define MUSB_INDEX 0x0e
|
||||
#define MUSB_DEVCTL 0x0f
|
||||
#define MUSB_TXMAXP 0x10
|
||||
#define MUSB_CSR0 0x11
|
||||
#define MUSB_TXCSR1 0x11
|
||||
#define MUSB_TXCSR2 0x12
|
||||
#define MUSB_RXMAXP 0x13
|
||||
#define MUSB_RXCSR1 0x14
|
||||
#define MUSB_RXCSR2 0x15
|
||||
#define MUSB_COUNT0 0x16
|
||||
#define MUSB_RXCOUNT1 0x16
|
||||
#define MUSB_RXCOUNT2 0x17
|
||||
#define MUSB_TXTYPE 0x18
|
||||
#define MUSB_TXINTERVAL 0x19
|
||||
#define MUSB_RXTYPE 0x1a
|
||||
#define MUSB_RXINTERVAL 0x1b
|
||||
|
||||
/*****MUSB SFR BitMap******/
|
||||
/*INTRUSB mode*/
|
||||
#define INTRUSB_SUSPEND BIT(0)
|
||||
#define INTRUSB_RESUME BIT(1)
|
||||
#define INTRUSB_RESET_BABBLE BIT(2)
|
||||
#define INTRUSB_SOF BIT(3)
|
||||
#define INTRUSB_CONNECT BIT(4)
|
||||
#define INTRUSB_DISCONNECT BIT(5)
|
||||
#define INTRUSB_SESS_REQ BIT(6)
|
||||
#define INTRUSB_VBUS_ERROR BIT(7)
|
||||
|
||||
/*CSR0 peripheral mode*/
|
||||
#define CSR0P_RxPktRdy 0x01
|
||||
#define CSR0P_TxPktRdy 0x02
|
||||
#define CSR0P_SentStall 0x04
|
||||
#define CSR0P_DataEnd 0x08
|
||||
#define CSR0P_SetupEnd 0x10
|
||||
#define CSR0P_SendStall 0x20
|
||||
#define CSR0P_ClrRxPktRdy 0x40
|
||||
#define CSR0P_ClrSetupEnd 0x80
|
||||
|
||||
|
||||
/*TXCSR1 peripheral mode*/
|
||||
#define TXCSRP_TxPktRdy 0x01
|
||||
#define TXCSRP_FIFONotEmpty 0x02
|
||||
#define TXCSRP_UnderRun 0x04
|
||||
#define TXCSRP_FlushFIFO 0x08
|
||||
#define TXCSRP_SendStall 0x10
|
||||
#define TXCSRP_SentStall 0x20
|
||||
#define TXCSRP_ClrDataTog 0x40
|
||||
#define TXCSRP_IncompTx 0x80
|
||||
#define TXCSRP_DIR (BIT(13))
|
||||
#define TXCSRP_ISOCHRONOUS (BIT(14))
|
||||
|
||||
/*RXCSR1 peripheral mode*/
|
||||
#define RXCSRP_RxPktRdy 0x01
|
||||
#define RXCSRP_FIFOFull 0x02
|
||||
#define RXCSRP_OverRun 0x04
|
||||
#define RXCSRP_DataError 0x08
|
||||
#define RXCSRP_FlushFIFO 0x10
|
||||
#define RXCSRP_SendStall 0x20
|
||||
#define RXCSRP_SentStall 0x40
|
||||
#define RXCSRP_ClrDataTog 0x80
|
||||
#define RXCSRP_IncompRx (BIT(8))
|
||||
#define RXCSRP_ISOCHRONOUS (BIT(14))
|
||||
|
||||
/*CSR0 host mode*/
|
||||
#define CSR0H_RxPktRdy 0x01
|
||||
#define CSR0H_TxPktRdy 0x02
|
||||
#define CSR0H_RxStall 0x04
|
||||
#define CSR0H_SetupPkt 0x08
|
||||
#define CSR0H_Error 0x10
|
||||
#define CSR0H_ReqPkt 0x20
|
||||
#define CSR0H_StatusPkt 0x40
|
||||
#define CSR0H_DISPING (BIT(11))
|
||||
|
||||
/*TXCSR1 host mode*/
|
||||
#define TXCSRH_TxPktRdy 0x01
|
||||
#define TXCSRH_FIFONotEmpty 0x02
|
||||
#define TXCSRH_Error 0x04
|
||||
#define TXCSRH_FlushFIFO 0x08
|
||||
#define TXCSRH_RxStall 0x20
|
||||
#define TXCSRH_ClrDataTog 0x40
|
||||
#define TXCSRH_NAK 0x80
|
||||
|
||||
/*RXCSR1 host mode*/
|
||||
#define RXCSRH_RxPktRdy 0x01
|
||||
#define RXCSRH_FIFOFull 0x02
|
||||
#define RXCSRH_Error 0x04
|
||||
#define RXCSRH_DataError 0x08
|
||||
#define RXCSRH_FlushFIFO 0x10
|
||||
#define RXCSRH_ReqPkt 0x20
|
||||
#define RXCSRH_RxStall 0x40
|
||||
#define RXCSRH_ClrDataTog 0x80
|
||||
#define RXCSRH_IncompRx BIT(8)
|
||||
#define RXCSRH_PIDError BIT(12)
|
||||
|
||||
|
||||
///USB Slave 控制传输各阶段
|
||||
#define USB_EP0_STAGE_SETUP 0
|
||||
#define USB_EP0_STAGE_IN 1
|
||||
#define USB_EP0_STAGE_OUT 2
|
||||
#define USB_EP0_SET_STALL 3
|
||||
#define USB_EP0_IGNORE 4
|
||||
#define USB_EP0_STAGE_NAK 5
|
||||
|
||||
///USB suspend_resume各阶段状态
|
||||
#define USB_READY 0
|
||||
#define USB_SUSPEND 1
|
||||
#define USB_RESUME_WAIT 2
|
||||
#define USB_RESUME_OK 3
|
||||
|
||||
/* common api */
|
||||
u32 usb_get_jiffies();
|
||||
u32 usb_host_timeout(u32 ot);
|
||||
void usb_mdelay(unsigned int ms);
|
||||
|
||||
|
||||
/* slave api */
|
||||
u32 usb_g_bulk_read64byte_fast(const usb_dev usb_id, u32 ep, u8 *ptr, u32 len);
|
||||
u32 usb_g_bulk_read(const usb_dev usb_id, u32 ep, u8 *ptr, u32 len, u32 block);
|
||||
u32 usb_g_bulk_write(const usb_dev usb_id, u32 ep, const u8 *ptr, u32 len);
|
||||
u32 usb_g_intr_read(const usb_dev usb_id, u32 ep, u8 *ptr, u32 len, u32 block);
|
||||
u32 usb_g_intr_write(const usb_dev usb_id, u32 ep, const u8 *ptr, u32 len);
|
||||
u32 usb_g_iso_read(const usb_dev usb_id, u32 ep, u8 *ptr, u32 len, u32 block);
|
||||
u32 usb_g_iso_write(const usb_dev usb_id, u32 ep, const u8 *ptr, u32 len);
|
||||
void usb_slave_init(const usb_dev usb_id, u32 speed);
|
||||
|
||||
/* host api */
|
||||
|
||||
u32 usb_h_bulk_read(const usb_dev usb_id, u8 host_ep, u16 rxmaxp, u8 target_ep, u8 *ptr, u32 len);
|
||||
u32 usb_h_bulk_write(const usb_dev usb_id, u8 host_ep, u16 txmaxp, u8 target_ep, u8 *ptr, u32 len);
|
||||
u32 usb_h_intr_read(const usb_dev usb_id, u8 host_ep, u16 rxmaxp, u8 target_ep, u8 *ptr, u32 len);
|
||||
u32 usb_h_intr_write(const usb_dev usb_id, u8 host_ep, u16 txmaxp, u8 target_ep, u8 *ptr, u32 len);
|
||||
u32 usb_h_iso_read(const usb_dev usb_id, u8 host_ep, u16 rxmaxp, u8 target_ep, u8 *ptr, u32 len);
|
||||
u32 usb_h_iso_write(const usb_dev usb_id, u8 host_ep, u16 txmaxp, u8 target_ep, u8 *ptr, u32 len);
|
||||
void usb_h_entry_suspend(const usb_dev usb_id);
|
||||
void usb_h_resume(const usb_dev usb_id);
|
||||
u32 usb_host_init(const usb_dev usb_id, u32 reset_delay, u32 timeout, u32 speed);
|
||||
u32 usb_host_reset(const usb_dev usb_id, u32 reset_delay, u32 timeout, u32 speed);
|
||||
|
||||
void usb_driver_event_to_user(u32 from, u32 event, void *arg);
|
||||
void usb_driver_event_from_otg(u32 from, u32 event, void *arg);
|
||||
|
||||
#endif /*USB_PHY_H*/
|
||||
@@ -0,0 +1,53 @@
|
||||
#ifndef __WIRELESS_H__
|
||||
#define __WIRELESS_H__
|
||||
|
||||
#include "cpu/includes.h"
|
||||
|
||||
enum {
|
||||
IO_LOW, //低
|
||||
IO_HIGH, //高
|
||||
IO_OVERTURN, //翻转
|
||||
IO_OPEN, //打开
|
||||
IO_DIR_IN,//高阻
|
||||
IO_INIT, //初始化
|
||||
};
|
||||
|
||||
struct _wireless_info {
|
||||
volatile u8 busy: 1;
|
||||
volatile u8 open: 1;
|
||||
volatile u8 flag: 1;
|
||||
volatile u8 dcdc_en: 1;
|
||||
volatile u8 bit_totle: 4;
|
||||
volatile u8 bit_num: 4;
|
||||
volatile u8 byte_num: 4;
|
||||
volatile u8 data_number: 4;
|
||||
volatile u8 error_count: 4;
|
||||
volatile u8 bit_count;
|
||||
volatile u8 nex_packet;
|
||||
};
|
||||
|
||||
typedef struct _wireless_hdl_ {
|
||||
u16(*get_wl_power)(void);
|
||||
void (*dcdc_en_set)(u8 en);
|
||||
void (*wpc_set)(u8 en);
|
||||
u16 *send_buff;
|
||||
u16 voltage_max;
|
||||
u16 voltage_min;
|
||||
u8 err_packet_fast_cnt;
|
||||
struct _wireless_info info;
|
||||
} _wireless_hdl;
|
||||
|
||||
|
||||
//库C函数声明
|
||||
void wireless_250us_run(void);
|
||||
void wireless_open(u16 min, u16 max);
|
||||
void wireless_close(void);
|
||||
void get_signal_value(void);
|
||||
void get_configuration(void);
|
||||
void get_identification(void);
|
||||
void wireless_100ms_run(void);
|
||||
void wireless_lib_init(_wireless_hdl *wldata, u16 min, u16 max);
|
||||
|
||||
|
||||
#endif/*__WIRELESS_H__*/
|
||||
|
||||
@@ -0,0 +1,76 @@
|
||||
#ifndef _GPCNT_H
|
||||
#define _GPCNT_H
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
enum gpcnt_gss_css_src {
|
||||
GPCNT_SRC_SYSPLL_D1P0 = 1,
|
||||
GPCNT_SRC_RINGCLK = 2,
|
||||
GPCNT_SRC_RC16M = 3,
|
||||
GPCNT_SRC_RC250K = 4,
|
||||
GPCNT_SRC_LRC_TRC = 5,
|
||||
GPCNT_SRC_PATCLK = 6,
|
||||
GPCNT_SRC_LRC24M = 7,
|
||||
GPCNT_SRC_BTOSC24M = 8,
|
||||
GPCNT_SRC_BTOSC48M = 9,
|
||||
GPCNT_SRC_P33_DBG = 10,
|
||||
GPCNT_SRC_HSBCLK = 11,
|
||||
GPCNT_SRC_LSBCLK = 12,
|
||||
GPCNT_SRC_PLL96M = 13,
|
||||
GPCNT_SRC_STD48M = 14,
|
||||
GPCNT_SRC_STD24M = 15,
|
||||
GPCNT_SRC_ASS_DBG = 16,
|
||||
GPCNT_SRC_P11_DBG = 17,
|
||||
GPCNT_SRC_WATCLK = 18
|
||||
};
|
||||
|
||||
#define CSS_CLK_SRC GPCNT_SRC_PLL96M
|
||||
#define CSS_CLK_FREQ 96000000
|
||||
|
||||
int gpcnt_trim_early_init();
|
||||
|
||||
void gpcnt_trim_cfg(u32 gss_ck, u32 css_ck, u32 gts_mul);
|
||||
u32 gpcnt_trim_wait_pnd(u32 sync);
|
||||
u32 gpcnt_trim_num2freq(u32 css_num, u32 gts_mul, u32 css_freq);
|
||||
u32 gpcnt_trim_freq(u32 gss_ck, u32 css_ck, u32 gts_mul, u32 css_freq);
|
||||
|
||||
u32 gpcnt_trim_num2cssfreq(u32 css_num, u32 gts_mul, u32 gss_freq);
|
||||
u32 gpcnt_trim_cssfreq(u32 gss_ck, u32 css_ck, u32 gts_mul, u32 gss_freq);
|
||||
|
||||
|
||||
// avg 实际返回的是中心值，不是算术平均值
|
||||
u32 rc250k_trim_get_avg();
|
||||
u32 rc250k_trim_get_latest();
|
||||
void rc250k_trim_dump();
|
||||
u32 rc250k_trim_get_drift();
|
||||
u32 rc250k_trim_get_high();
|
||||
u32 rc250k_trim_get_low();
|
||||
|
||||
u32 rc16m_trim_get_avg();
|
||||
u32 rc16m_trim_get_latest();
|
||||
void rc16m_trim_dump();
|
||||
u32 rc16m_trim_get_drift();
|
||||
u32 rc16m_trim_get_high();
|
||||
u32 rc16m_trim_get_low();
|
||||
|
||||
u32 lrc24m_trim_get_avg();
|
||||
u32 lrc24m_trim_get_latest();
|
||||
void lrc24m_trim_dump();
|
||||
u32 lrc24m_trim_get_drift();
|
||||
u32 lrc24m_trim_get_high();
|
||||
u32 lrc24m_trim_get_low();
|
||||
void lrc24m_init(u32 ftis, u32 ftcs, u32 ftrs);
|
||||
|
||||
u32 lrc200k_trim_get_avg();
|
||||
u32 lrc200k_trim_get_center();
|
||||
u32 lrc200k_trim_get_latest();
|
||||
void lrc200k_trim_dump();
|
||||
u32 lrc200k_trim_get_drift();
|
||||
u32 lrc200k_trim_get_high();
|
||||
u32 lrc200k_trim_get_low();
|
||||
|
||||
void m2p_lrc_update(u32 osc_hz);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,172 @@
|
||||
#ifndef _GPIO_H
|
||||
#define _GPIO_H
|
||||
|
||||
#define IO_PORT_SPILT(io) ((u32)(io)) / 16, BIT(((u32)(io)) %16)
|
||||
|
||||
|
||||
// PORT引脚输入输出模式
|
||||
enum gpio_mode {
|
||||
PORT_OUTPUT_LOW = 0,
|
||||
PORT_OUTPUT_HIGH = 1,
|
||||
PORT_HIGHZ = 2, //高阻模式
|
||||
|
||||
PORT_INPUT_FLOATING = 0x10, //浮空输入
|
||||
PORT_INPUT_PULLUP_10K = 0x11,
|
||||
PORT_INPUT_PULLUP_100K,
|
||||
PORT_INPUT_PULLUP_1M,
|
||||
|
||||
PORT_INPUT_PULLDOWN_10K = 0x21,
|
||||
PORT_INPUT_PULLDOWN_100K,
|
||||
PORT_INPUT_PULLDOWN_1M,
|
||||
|
||||
PORT_KEEP_STATE = 0x30,
|
||||
};
|
||||
|
||||
enum gpio_drive_strength {
|
||||
PORT_DRIVE_STRENGT_2p4mA, ///< 最大驱动电流 2.4mA
|
||||
PORT_DRIVE_STRENGT_8p0mA, ///< 最大驱动电流 8.0mA
|
||||
PORT_DRIVE_STRENGT_24p0mA, ///< 最大驱动电流 24.0mA
|
||||
PORT_DRIVE_STRENGT_64p0mA, ///< 最大驱动电流 64.0mA
|
||||
};
|
||||
|
||||
enum gpio_pullup_mode {
|
||||
GPIO_PULLUP_DISABLE,
|
||||
GPIO_PULLUP_10K,
|
||||
GPIO_PULLUP_100K,
|
||||
GPIO_PULLUP_1M,
|
||||
};
|
||||
enum gpio_pulldown_mode {
|
||||
GPIO_PULLDOWN_DISABLE,
|
||||
GPIO_PULLDOWN_10K,
|
||||
GPIO_PULLDOWN_100K,
|
||||
GPIO_PULLDOWN_1M,
|
||||
};
|
||||
|
||||
|
||||
#define PORT_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
|
||||
#define PORT_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
|
||||
#define PORT_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
|
||||
#define PORT_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
|
||||
#define PORT_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
|
||||
#define PORT_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
|
||||
#define PORT_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
|
||||
#define PORT_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
|
||||
#define PORT_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
|
||||
#define PORT_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
|
||||
#define PORT_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
|
||||
#define PORT_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
|
||||
#define PORT_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
|
||||
#define PORT_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
|
||||
#define PORT_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
|
||||
#define PORT_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
|
||||
#define PORT_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
|
||||
|
||||
#define PORT_PIN_MASK (0x0000FFFFu) /* PIN mask for assert test */
|
||||
|
||||
#include "asm/gpio_hw.h"
|
||||
|
||||
struct gpio_config {
|
||||
u32 pin;
|
||||
enum gpio_mode mode;
|
||||
enum gpio_drive_strength hd;
|
||||
};
|
||||
//配置同组多个io模式及强驱. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
|
||||
int gpio_init(enum gpio_port port, const struct gpio_config *config);
|
||||
//恢复同组多个io为高阻态. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
|
||||
int gpio_deinit(enum gpio_port port, u32 pin);
|
||||
//配置同组多个io模式. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
|
||||
//return:<0:error
|
||||
int gpio_set_mode(enum gpio_port port, u32 pin, enum gpio_mode mode);
|
||||
int gpio_keep_mode_at_sleep(enum gpio_port port, u32 pin);
|
||||
enum gpio_mode gpio_get_mode(enum gpio_port port, u32 pin);
|
||||
|
||||
// 读取单个io输入值. gpio:IO_PORTA_00
|
||||
int gpio_read(u32 gpio);
|
||||
//读取同组多个io值. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
|
||||
int gpio_read_port(enum gpio_port port, u32 pin);
|
||||
|
||||
// 设置单个io输出电平(需先配置为输出). gpio:IO_PORTA_00; value:0:out 0, 1:out 1
|
||||
int gpio_write(u32 gpio, u32 value);
|
||||
// 设置同组多个io输出电平(需先配置为输出).
|
||||
// pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
|
||||
// out_state:0:out 0, 1:out 1
|
||||
int gpio_write_port(enum gpio_port port, u32 pin, int out_state);
|
||||
|
||||
//翻转同组多个io输出电平(需先配置为输出). pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
|
||||
//return:<0:error
|
||||
int gpio_toggle_port(enum gpio_port port, u32 pin);
|
||||
|
||||
// 获取同组多个io输出电平
|
||||
int gpio_get_out_level(enum gpio_port port, u32 pin);
|
||||
|
||||
// 设置同组多个io强驱
|
||||
int gpio_set_drive_strength(enum gpio_port port, u32 pin, enum gpio_drive_strength drive);
|
||||
|
||||
// 获取单个io输出强度 pin:只能带入1个io
|
||||
enum gpio_drive_strength gpio_get_drive_strength(enum gpio_port port, u32 pin);
|
||||
|
||||
//打印芯片全部gpio寄存器,crossbar信息
|
||||
void gpio_dump();
|
||||
//打印芯片指定io寄存器,crossbar信息
|
||||
void gpio_appoint_dump(enum gpio_port port, u32 pin);
|
||||
|
||||
|
||||
// ----------------------------------------
|
||||
// PORT中断
|
||||
enum gpio_irq_edge {
|
||||
PORT_IRQ_DISABLE = 0, ///< Disable PORT interrupt
|
||||
PORT_IRQ_EDGE_RISE = 1, ///< PORT interrupt type : rising edge
|
||||
PORT_IRQ_EDGE_FALL = 2, ///< PORT interrupt type : falling edge
|
||||
PORT_IRQ_ANYEDGE = 3, ///< PORT interrupt type : both rising and falling edge
|
||||
};
|
||||
typedef void (*gpio_irq_callback_p)(enum gpio_port port, u32 pin, enum gpio_irq_edge edge);
|
||||
struct gpio_irq_config_st {
|
||||
u32 pin;
|
||||
enum gpio_irq_edge irq_edge;
|
||||
gpio_irq_callback_p callback;
|
||||
u8 irq_priority;//中断优先级
|
||||
};
|
||||
//配置中断(已使能)
|
||||
//禁止同一个io同一边沿多次注册
|
||||
//单边沿与双边沿切换: 请先注销(PORT_IRQ_DISABLE)再注册
|
||||
int gpio_irq_config(enum gpio_port port, const struct gpio_irq_config_st *config);//pa,pb,pc,pp0,usb
|
||||
//注销io中断接口
|
||||
int gpio_irq_deinit(enum gpio_port port, u32 pin);
|
||||
//修改中断回调函数
|
||||
int gpio_irq_set_callback(enum gpio_port port, u32 pin, gpio_irq_callback_p callback);
|
||||
//快速切换使能同组多个io中断响应
|
||||
int gpio_irq_enable(enum gpio_port port, u32 pin);
|
||||
//快速切换暂停同组多个io中断响应
|
||||
int gpio_irq_disable(enum gpio_port port, u32 pin);
|
||||
|
||||
//只有注册单边沿触发才能调用该函数切换边沿
|
||||
//单边沿与双边沿切换: 请先注销再注册
|
||||
int gpio_irq_set_edge(enum gpio_port port, u32 pin, enum gpio_irq_edge irq_edge);
|
||||
// 获取单个io触发边沿 pin:只能带入1个io
|
||||
enum gpio_irq_edge gpio_irq_get_edge(enum gpio_port port, u32 pin);
|
||||
|
||||
|
||||
|
||||
|
||||
// ----------------------------------------
|
||||
// PORT 功能配置
|
||||
// 配置单个io为特殊功能. pin:只能带入1个io
|
||||
//return:<0:error
|
||||
int gpio_set_function(enum gpio_port port, u32 pin, enum gpio_function fn);
|
||||
// 注销单个io的特殊功能. pin:只能带入1个io
|
||||
//return:<0:error
|
||||
int gpio_disable_function(enum gpio_port port, u32 pin, enum gpio_function fn);
|
||||
/* 示例：
|
||||
gpio_set_function(PORTA, PORT_PIN_0, PORT_FUNC_UART0_TX);
|
||||
gpio_set_function(PORTA, PORT_PIN_1, PORT_FUNC_UART0_RX);
|
||||
gpio_set_function(PORTA, PORT_PIN_2, PORT_FUNC_UART0_CTS);
|
||||
gpio_set_function(PORTA, PORT_PIN_3, PORT_FUNC_UART0_RTS);
|
||||
*/
|
||||
|
||||
// io复用时，io资源申请
|
||||
int gpio_request_function(enum gpio_port port, u32 pin, enum gpio_function fn, u32 timeout);
|
||||
// io复用时，io资源释放
|
||||
int gpio_release_function(enum gpio_port port, u32 pin, enum gpio_function fn);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,15 @@
|
||||
#ifndef GPIO_CONFIG_H
|
||||
#define GPIO_CONFIG_H
|
||||
|
||||
#include "generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
u8 uuid2gpio(u16 uuid);
|
||||
|
||||
int gpio_config_init();
|
||||
int gpio_config_uninit();
|
||||
void gpio_enter_sleep_config();
|
||||
void gpio_exit_sleep_config();
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,139 @@
|
||||
#ifndef _IIC_API_H_
|
||||
#define _IIC_API_H_
|
||||
|
||||
#include "generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
enum iic_state_enum {
|
||||
IIC_OK = 0,
|
||||
IIC_ERROR_INIT_FAIL = -1,
|
||||
IIC_ERROR_NO_INIT = -2,
|
||||
IIC_ERROR_SUSPEND_FAIL = -3,
|
||||
IIC_ERROR_RESUME_FAIL = -4,
|
||||
IIC_ERROR_BUSY = -5,
|
||||
IIC_ERROR_PARAM_ERROR = -6,
|
||||
IIC_ERROR_DEV_ADDR_ACK_ERROR = -7,
|
||||
IIC_ERROR_REG_ADDR_ACK_ERROR = -8,
|
||||
IIC_ERROR_INDEX_ERROR = -9,
|
||||
IIC_ERROR_FREQUENCY_ERROR = -10,
|
||||
IIC_ERROR_RESLOCK_BUSY = -11,
|
||||
IIC_ERROR_MASTER_ERROR = -12,//iic主机卡死
|
||||
};
|
||||
|
||||
enum iic_role {IIC_MASTER, IIC_SLAVE};
|
||||
|
||||
struct iic_master_config {
|
||||
enum iic_role role; //软件只有IIC_MASTER
|
||||
int scl_io;
|
||||
int sda_io;
|
||||
enum gpio_mode io_mode;//上拉或浮空
|
||||
enum gpio_drive_strength hdrive; //enum GPIO_HDRIVE 0:2.4MA, 1:8MA, 2:26.4MA, 3:40MA
|
||||
u32 master_frequency; //软件iic频率(hz 不准)
|
||||
u8 ie_en; //中断使能
|
||||
u8 irq_priority; //中断
|
||||
//br27,28,36:0:close filter; 1:enable filter
|
||||
//br50:0:close filter; 1:<1*Tiic_baud_clk, 2:<2*Tiic_baud_clk, 3:<3*Tiic_baud_clk
|
||||
u8 io_filter;
|
||||
};
|
||||
#include "iic_soft.h"
|
||||
#if defined CONFIG_IIC_VERSION2
|
||||
#include "iic_hw_v2.h"
|
||||
#else
|
||||
#include "iic_hw_v1.h"
|
||||
#endif
|
||||
|
||||
/******************************soft iic*****************************/
|
||||
//如果无reg_addr:reg_addr=NULL,reg_len=0
|
||||
//return: <0:error, =read_len:ok
|
||||
int soft_i2c_master_read_nbytes_from_device_reg(soft_iic_dev iic,
|
||||
unsigned char dev_addr, //设备地址
|
||||
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址，长度
|
||||
unsigned char *read_buf, int read_len);//缓存buf，读取长度
|
||||
|
||||
//如果无reg_addr:reg_addr=NULL,reg_len=0
|
||||
//return: =write_len:ok, other:error
|
||||
int soft_i2c_master_write_nbytes_to_device_reg(soft_iic_dev iic,
|
||||
unsigned char dev_addr, //设备地址
|
||||
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址，长度
|
||||
unsigned char *write_buf, int write_len);//数据buf, 写入长度
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************hw iic master*****************************/
|
||||
//如果无reg_addr:reg_addr=NULL,reg_len=0
|
||||
//return: <0:error, =read_len:ok
|
||||
int hw_i2c_master_read_nbytes_from_device_reg(hw_iic_dev iic,
|
||||
unsigned char dev_addr, //设备地址
|
||||
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址，长度
|
||||
unsigned char *read_buf, int read_len);//缓存buf，读取长度
|
||||
|
||||
//如果无reg_addr:reg_addr=NULL,reg_len=0
|
||||
//return: =write_len:ok, other:error
|
||||
int hw_i2c_master_write_nbytes_to_device_reg(hw_iic_dev iic,
|
||||
unsigned char dev_addr, //设备地址
|
||||
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址，长度
|
||||
unsigned char *write_buf, int write_len);//数据buf, 写入长度
|
||||
|
||||
//********************hw-iic for tp/alipay se/compass**********************//
|
||||
int system_iic_init(hw_iic_dev iic, struct iic_master_config *i2c_config);
|
||||
int system_iic_deinit(hw_iic_dev iic);
|
||||
void system_iic_reset(hw_iic_dev iic);
|
||||
int system_iic_suspend(hw_iic_dev iic);
|
||||
int system_iic_resume(hw_iic_dev iic);
|
||||
int system_iic_read_nbytes(hw_iic_dev iic,
|
||||
unsigned char dev_7bit_addr, //7位设备地址
|
||||
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址，长度
|
||||
unsigned char *read_buf, int read_len);//缓存buf，读取长度
|
||||
int system_iic_write_nbytes(hw_iic_dev iic,
|
||||
unsigned char dev_7bit_addr, //7位设备地址
|
||||
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址，长度
|
||||
unsigned char *write_buf, int write_len);//数据buf, 写入长度
|
||||
|
||||
|
||||
#ifdef _IIC_USE_HW
|
||||
#define get_iic_config(iic) get_hw_iic_config(iic)
|
||||
#define iic_init(iic, config) hw_iic_init(iic, config)
|
||||
#define iic_deinit(iic) hw_iic_deinit(iic)
|
||||
#define iic_start(iic) hw_iic_start(iic)
|
||||
#define iic_stop(iic) hw_iic_stop(iic)
|
||||
#define iic_reset(iic) hw_iic_reset(iic)
|
||||
#define iic_err_reset(iic) hw_iic_err_reset(iic)
|
||||
#define iic_tx_byte(iic, byte) hw_iic_tx_byte(iic, byte)
|
||||
#define iic_rx_byte(iic, ack, err) hw_iic_rx_byte(iic, ack, err)//err:指针返回错误状态
|
||||
#define iic_read_buf(iic, buf, len) hw_iic_read_buf(iic, buf, len)
|
||||
#define iic_write_buf(iic, buf, len) hw_iic_write_buf(iic, buf, len)
|
||||
#define iic_suspend(iic) hw_iic_suspend(iic)
|
||||
#define iic_resume(iic) hw_iic_resume(iic)
|
||||
|
||||
#define i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len) \
|
||||
hw_i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len)
|
||||
#define i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len) \
|
||||
hw_i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len)
|
||||
#else
|
||||
#define get_iic_config(iic) get_soft_iic_config(iic)
|
||||
#define iic_init(iic, config) soft_iic_init(iic, config)
|
||||
#define iic_deinit(iic) soft_iic_deinit(iic)
|
||||
#define iic_start(iic) soft_iic_start(iic)
|
||||
#define iic_stop(iic) soft_iic_stop(iic)
|
||||
#define iic_reset(iic) soft_iic_reset(iic)
|
||||
#define iic_err_reset(iic)
|
||||
#define iic_tx_byte(iic, byte) soft_iic_tx_byte(iic, byte)
|
||||
#define iic_rx_byte(iic, ack, err) soft_iic_rx_byte(iic, ack, err)
|
||||
#define iic_read_buf(iic, buf, len) soft_iic_read_buf(iic, buf, len)
|
||||
#define iic_write_buf(iic, buf, len) soft_iic_write_buf(iic, buf, len)
|
||||
#define iic_suspend(iic) soft_iic_suspend(iic)
|
||||
#define iic_resume(iic) soft_iic_resume(iic)
|
||||
|
||||
#define i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len) \
|
||||
soft_i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len)
|
||||
#define i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len) \
|
||||
soft_i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len)
|
||||
#endif
|
||||
|
||||
/******************************hw iic slave*****************************/
|
||||
int hw_iic_slave_polling_rx(hw_iic_dev iic, u8 *rx_buf);
|
||||
int hw_iic_slave_polling_tx(hw_iic_dev iic, u8 *tx_buf);
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,119 @@
|
||||
#ifndef _IIC_HW_V1_H_
|
||||
#define _IIC_HW_V1_H_
|
||||
|
||||
#include "system/generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
|
||||
#define IIC_WHILE_TIMEOUT_CNT_ 100000 //等待pnd超时,单位:us(udelay()不准确)
|
||||
|
||||
#define MAX_HW_IIC_NUM 1
|
||||
// #define IIC_PORT_GROUP_NUM 4
|
||||
|
||||
|
||||
#define iic_enable(reg) (reg->CON0 |= BIT(0))
|
||||
#define iic_disable(reg) (reg->CON0 &= ~BIT(0))
|
||||
#define is_iic_enable(reg) (reg->CON0 & BIT(0))
|
||||
#define iic_role_host(reg) (reg->CON0 &= ~BIT(1))
|
||||
#define iic_role_slave(reg) (reg->CON0 |= BIT(1))
|
||||
#define iic_cfg_done(reg) (reg->CON0 |= BIT(2))
|
||||
#define iic_dir_out(reg) (reg->CON0 &= ~BIT(3))
|
||||
#define iic_dir_in(reg) (reg->CON0 |= BIT(3))
|
||||
#define iic_preset_end(reg) (reg->CON0 |= BIT(4))
|
||||
#define iic_preset_restart(reg) (reg->CON0 |= BIT(5))
|
||||
#define iic_recv_ack(reg) (reg->CON0 &= ~BIT(6))
|
||||
#define iic_recv_nack(reg) (reg->CON0 |= BIT(6))
|
||||
#define iic_send_is_ack(reg) (!(reg->CON0 & BIT(7)))
|
||||
#define iic_isel_direct(reg) (reg->CON0 &= ~BIT(9))
|
||||
#define iic_isel_filter(reg) (reg->CON0 |= BIT(9))
|
||||
#define iic_isel_filter_en(reg) (reg->CON0 &= ~BIT(11))//only br27
|
||||
#define iic_isel_bypass(reg) (reg->CON0 |= BIT(11)) //only br27
|
||||
#define iic_si_mode_en(reg) (reg->CON1 |= BIT(13))
|
||||
#define iic_si_mode_dis(reg) (reg->CON1 &= ~BIT(13))
|
||||
|
||||
#define iic_set_ie(reg) (reg->CON0 |= BIT(8))
|
||||
#define iic_clr_ie(reg) (reg->CON0 &= ~BIT(8))
|
||||
#define iic_pnd(reg) (reg->CON0 & BIT(15))
|
||||
#define iic_pnd_clr(reg) (reg->CON0 |= BIT(14))
|
||||
|
||||
#define iic_set_end_ie(reg) (reg->CON0 |= BIT(10))
|
||||
#define iic_clr_end_ie(reg) (reg->CON0 &=~BIT(10))
|
||||
#define iic_end_pnd(reg) (reg->CON0 & BIT(13))
|
||||
#define iic_end_pnd_clr(reg) (reg->CON0 |= BIT(12))
|
||||
|
||||
#define iic_start_pnd(reg) (reg->CON1 & BIT(15))
|
||||
#define iic_start_pnd_clr(reg) (reg->CON1 |= BIT(14))
|
||||
|
||||
#define iic_reset0(reg) (reg->CON0 = (BIT(14)|BIT(12)))
|
||||
#define iic_reset1(reg) (reg->CON1 = BIT(14))
|
||||
#define iic_baud_reg(reg) (reg->BAUD)
|
||||
#define iic_buf_reg(reg) (reg->BUF)
|
||||
|
||||
typedef enum {
|
||||
I2C_PND_TASK_DONE,
|
||||
I2C_PND_START,//no ie
|
||||
I2C_PND_STOP,
|
||||
} i2c_pnd_typedef;
|
||||
|
||||
enum {
|
||||
HW_IIC_0,
|
||||
};
|
||||
|
||||
typedef const u8 hw_iic_dev;
|
||||
#include "iic_api.h"
|
||||
|
||||
struct hw_iic_slave_config {
|
||||
struct iic_master_config config;
|
||||
void (*iic_slave_irq_func)(void);
|
||||
u8 slave_addr;//bit7~bit1
|
||||
};
|
||||
|
||||
struct iic_master_config *get_hw_iic_config(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_init(hw_iic_dev iic, struct iic_master_config *i2c_config);
|
||||
enum iic_state_enum hw_iic_deinit(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_resume(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_suspend(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_check_busy(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_start(hw_iic_dev iic);
|
||||
void hw_iic_stop(hw_iic_dev iic);
|
||||
void hw_iic_reset(hw_iic_dev iic);//无效
|
||||
void hw_iic_err_reset(hw_iic_dev iic);
|
||||
u8 hw_iic_tx_byte(hw_iic_dev iic, u8 byte);
|
||||
u8 hw_iic_rx_byte(hw_iic_dev iic, u8 ack, s8 *err);//err:错误返回
|
||||
//return: =len:ok
|
||||
int hw_iic_read_buf(hw_iic_dev iic, void *buf, int len);
|
||||
//return: =len:ok
|
||||
int hw_iic_write_buf(hw_iic_dev iic, const void *buf, int len);
|
||||
|
||||
int hw_iic_set_baud(hw_iic_dev iic, u32 baud);
|
||||
|
||||
void hw_iic_set_ie(hw_iic_dev iic, i2c_pnd_typedef png, u8 en);
|
||||
u8 hw_iic_get_pnd(hw_iic_dev iic, i2c_pnd_typedef png);
|
||||
void hw_iic_clr_pnd(hw_iic_dev iic, i2c_pnd_typedef png);
|
||||
void hw_iic_clr_all_pnd(hw_iic_dev iic);
|
||||
|
||||
|
||||
|
||||
|
||||
//从机接口:
|
||||
enum iic_slave_rx_state {
|
||||
IIC_SLAVE_RX_PREPARE_TIMEOUT = -1,
|
||||
IIC_SLAVE_RX_PREPARE_OK = 0,
|
||||
IIC_SLAVE_RX_PREPARE_END_OK = 1,
|
||||
IIC_SLAVE_RX_ADDR_NO_MATCH = -2,
|
||||
IIC_SLAVE_RX_ADDR_TX = 2,
|
||||
IIC_SLAVE_RX_ADDR_RX = 3,
|
||||
IIC_SLAVE_RX_DATA = 4,
|
||||
};
|
||||
|
||||
enum iic_state_enum hw_iic_slave_init(hw_iic_dev iic, struct hw_iic_slave_config *i2c_config);
|
||||
void hw_iic_slave_set_addr(hw_iic_dev iic, u8 addr, u8 addr_ack);
|
||||
void hw_iic_slave_set_isr_func(hw_iic_dev iic, void (*iic_slave_irq_func)(void));
|
||||
u8 hw_iic_slave_get_addr(hw_iic_dev iic);
|
||||
enum iic_slave_rx_state hw_iic_slave_rx_prepare(hw_iic_dev iic, u8 ack, u32 wait_time);//轮询, 准备收
|
||||
//判断地址，返回数据类型, 不检查结束位
|
||||
enum iic_slave_rx_state hw_iic_slave_rx_byte(hw_iic_dev iic, u8 *rx_byte);
|
||||
int hw_iic_slave_rx_nbyte(hw_iic_dev iic, u8 *rx_buf);//轮询,含结束位
|
||||
u8 hw_iic_slave_tx_check_ack(hw_iic_dev iic);//return:1:ack; 0:no ack
|
||||
void hw_iic_slave_tx_byte(hw_iic_dev iic, u8 byte);//准备发
|
||||
int hw_iic_slave_tx_nbyte(hw_iic_dev iic, u8 *tx_buf);//轮询,含结束位
|
||||
#endif
|
||||
@@ -0,0 +1,209 @@
|
||||
#ifndef _IIC_HW_V2_H_
|
||||
#define _IIC_HW_V2_H_
|
||||
|
||||
#include "system/generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
#include "os/os_api.h"
|
||||
|
||||
#define MASTER_IIC_WRITE_MODE_FAST_RESP 0
|
||||
#define MASTER_IIC_READ_MODE_FAST_RESP 0//接收移位,客户根据协议修改
|
||||
#define SLAVE_NO_STRETCH_AUTO_TASK 0 // 1+PULL_IIC_BUS=0:图3(no stretch)
|
||||
|
||||
#define IIC_WHILE_TIMEOUT_CNT_ 100000 //等待pnd超时,单位:us(udelay()不准确)
|
||||
|
||||
// #define IIC_PORT_GROUP_NUM 4
|
||||
|
||||
#define iic_init_prepare(reg) (reg->CON = 1)
|
||||
#define iic_enable(reg) (reg->CON |= BIT(0))
|
||||
#define iic_disable(reg) (reg->CON &= ~BIT(0))
|
||||
#define is_iic_enable(reg) ((reg->CON & 0x03)==0x03)
|
||||
#define iic_rst_rst(reg) (reg->CON &= ~BIT(1))
|
||||
#define iic_rst_release(reg) (reg->CON |= BIT(1))
|
||||
#define iic_role_host(reg) (reg->CON &= ~BIT(2))
|
||||
#define iic_role_slave(reg) (reg->CON |= BIT(2))
|
||||
#define iic_flt_sel(reg,x) SFR(reg->CON, 3, 2, x)//0:close; 1:<1*Tiic_baud_clk, 2:<2*Tiic_baud_clk, 3:<3*Tiic_baud_clk
|
||||
#define iic_stretch_en(reg) (reg->CON &= ~BIT(5))
|
||||
#define iic_stretch_dis(reg) (reg->CON |= BIT(5))
|
||||
#define iic_ignore_nack_dis(reg) (reg->CON &= ~BIT(6))
|
||||
#define iic_ignore_nack_en(reg) (reg->CON |= BIT(6))
|
||||
#define iic_addr_resp_manu(reg) (reg->CON &= ~BIT(7))
|
||||
#define iic_addr_resp_auto(reg) (reg->CON |= BIT(7))
|
||||
#define iic_slv_rx_manu(reg) (reg->CON &= ~BIT(8))
|
||||
#define iic_slv_rx_auto(reg) (reg->CON |= BIT(8))
|
||||
#define iic_slv_tx_manu(reg) (reg->CON &= ~BIT(9))
|
||||
#define iic_slv_tx_auto(reg) (reg->CON |= BIT(9))
|
||||
|
||||
#define iic_baddr_resp_dis(reg) (reg->CON &= ~BIT(10))
|
||||
#define iic_baddr_resp_en(reg) (reg->CON |= BIT(10))
|
||||
|
||||
typedef enum {
|
||||
I2C_TASK_SEND_RESET = 0x0,
|
||||
I2C_TASK_SEND_ADDR = 0x1,
|
||||
I2C_TASK_SEND_DATA = 0x2,
|
||||
I2C_TASK_SEND_ACK = 0x3,
|
||||
I2C_TASK_SEND_NACK = 0x4,
|
||||
I2C_TASK_SEND_STOP = 0x5,
|
||||
I2C_TASK_SEND_NACK_STOP = 0x6,
|
||||
I2C_TASK_RECV_DATA = 0x7,
|
||||
I2C_TASK_RECV_DATA_ACK = 0x8,
|
||||
I2C_TASK_RECV_DATA_NACK = 0x9,
|
||||
} i2c_task_typedef;
|
||||
|
||||
#define iic_task_sel(reg,x) SFR(reg->TASK, 0, 4, x)//i2c_task_typedef
|
||||
|
||||
typedef enum {
|
||||
I2C_PND_TASK_DONE = BIT(20),
|
||||
I2C_PND_START = BIT(21),
|
||||
I2C_PND_STOP = BIT(22),
|
||||
I2C_PND_RXACK = BIT(23),
|
||||
I2C_PND_RXNACK = BIT(24),
|
||||
I2C_PND_ADR_MATCH = BIT(25),
|
||||
I2C_PND_RXDATA_DONE = BIT(26),
|
||||
I2C_PND_TXTASK_LOAD = BIT(27),
|
||||
I2C_PND_RXTASK_LOAD = BIT(28),
|
||||
} i2c_pnd_typedef;
|
||||
|
||||
|
||||
#define iic_set_task_ie(reg) (reg->PND |= BIT(0))
|
||||
#define iic_clr_task_ie(reg) (reg->PND &= ~BIT(0))
|
||||
#define iic_task_pnd(reg) (reg->PND & BIT(20))
|
||||
#define iic_task_pnd_clr(reg) (reg->PND |= BIT(10))
|
||||
|
||||
#define iic_set_start_ie(reg) (reg->PND |= BIT(1))
|
||||
#define iic_clr_start_ie(reg) (reg->PND &= ~BIT(1))
|
||||
#define iic_start_pnd(reg) (reg->PND & BIT(21))
|
||||
#define iic_start_pnd_clr(reg) (reg->PND |= BIT(11))
|
||||
|
||||
#define iic_set_stop_ie(reg) (reg->PND |= BIT(2))
|
||||
#define iic_clr_stop_ie(reg) (reg->PND &= ~BIT(2))
|
||||
#define iic_stop_pnd(reg) (reg->PND & BIT(22))
|
||||
#define iic_stop_pnd_clr(reg) (reg->PND |= BIT(12))
|
||||
|
||||
#define iic_set_rxack_ie(reg) (reg->PND |= BIT(3))
|
||||
#define iic_clr_rxack_ie(reg) (reg->PND &= ~BIT(3))
|
||||
#define iic_rxack_pnd(reg) (reg->PND & BIT(23))
|
||||
#define iic_rxack_pnd_clr(reg) (reg->PND |= BIT(13))
|
||||
|
||||
#define iic_set_rxnack_ie(reg) (reg->PND |= BIT(4))
|
||||
#define iic_clr_rxnack_ie(reg) (reg->PND &= ~BIT(4))
|
||||
#define iic_rxnack_pnd(reg) (reg->PND & BIT(24))
|
||||
#define iic_rxnack_pnd_clr(reg) (reg->PND |= BIT(14))
|
||||
|
||||
#define iic_set_adr_match_ie(reg) (reg->PND |= BIT(5))
|
||||
#define iic_clr_adr_match_ie(reg) (reg->PND &= ~BIT(5))
|
||||
#define iic_adr_match_pnd(reg) (reg->PND & BIT(25))
|
||||
#define iic_adr_match_pnd_clr(reg) (reg->PND |= BIT(15))
|
||||
|
||||
#define iic_set_rxdata_done_ie(reg) (reg->PND |= BIT(6))
|
||||
#define iic_clr_rxdata_done_ie(reg) (reg->PND &= ~BIT(6))
|
||||
#define iic_rxdata_done_pnd(reg) (reg->PND & BIT(26))
|
||||
#define iic_rxdata_done_pnd_clr(reg) (reg->PND |= BIT(16))
|
||||
|
||||
#define iic_set_txtask_load_ie(reg) (reg->PND |= BIT(7))
|
||||
#define iic_clr_txtask_load_ie(reg) (reg->PND &= ~BIT(7))
|
||||
#define iic_txtask_load_pnd(reg) (reg->PND & BIT(27))
|
||||
#define iic_txtask_load_pnd_clr(reg) (reg->PND |= BIT(17))
|
||||
|
||||
#define iic_set_rxtask_load_ie(reg) (reg->PND |= BIT(8))
|
||||
#define iic_clr_rxtask_load_ie(reg) (reg->PND &= ~BIT(8))
|
||||
#define iic_rxtask_load_pnd(reg) (reg->PND & BIT(28))
|
||||
#define iic_rxtask_load_pnd_clr(reg) (reg->PND |= BIT(18))
|
||||
#define iic_reset_pnd(reg) (reg->PND = 0x1ff << 10)
|
||||
|
||||
|
||||
#define iic_png_reg(reg) (reg->PND)
|
||||
#define iic_tx_buf_reg(reg) (reg->TX_BUF)
|
||||
#define iic_rx_buf_reg(reg) (reg->RX_BUF)//8bit only read
|
||||
#define iic_addr_reg(reg) (reg->ADDR)//bit0:r/w
|
||||
#define iic_baud_reg(reg) (reg->BAUD)//12bit BAUD_CNT > (SETUP_CNT+HOLD_CNT)>0
|
||||
#define iic_tsu_reg(reg) (reg->TSU)//7bit(0~6) sda信号保持时间
|
||||
#define iic_thd_reg(reg) (reg->THD)//7bit(0~6) sda信号建立时间
|
||||
#define iic_dbg_reg(reg) (reg->DBG)//32bit only read
|
||||
|
||||
typedef const int hw_iic_dev;
|
||||
#include "asm/iic_hw.h"
|
||||
#include "iic_api.h"
|
||||
|
||||
|
||||
struct hw_iic_slave_config {
|
||||
struct iic_master_config config;
|
||||
void (*iic_slave_irq_func)(void);
|
||||
u8 slave_addr;//bit7~bit1
|
||||
};
|
||||
|
||||
|
||||
|
||||
struct iic_master_config *get_hw_iic_config(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_init(hw_iic_dev iic, struct iic_master_config *i2c_config);
|
||||
enum iic_state_enum hw_iic_deinit(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_resume(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_suspend(hw_iic_dev iic);
|
||||
enum iic_state_enum hw_iic_check_busy(hw_iic_dev iic);
|
||||
|
||||
enum iic_state_enum hw_iic_start(hw_iic_dev iic);
|
||||
void hw_iic_stop(hw_iic_dev iic);
|
||||
void hw_iic_reset(hw_iic_dev iic);
|
||||
void hw_iic_err_reset(hw_iic_dev iic);
|
||||
u8 hw_iic_tx_byte(hw_iic_dev iic, u8 byte);
|
||||
u8 hw_iic_rx_byte(hw_iic_dev iic, u8 ack, s8 *err);//err:错误返回
|
||||
int hw_iic_read_buf(hw_iic_dev iic, void *buf, int len);
|
||||
int hw_iic_write_buf(hw_iic_dev iic, const void *buf, int len);
|
||||
int hw_iic_set_baud(hw_iic_dev iic, u32 baud);
|
||||
|
||||
void hw_iic_set_ack(hw_iic_dev iic, u8 ack_en);
|
||||
void hw_iic_set_ie(hw_iic_dev iic, i2c_pnd_typedef png, u8 en);
|
||||
u8 hw_iic_get_pnd(hw_iic_dev iic, i2c_pnd_typedef png);
|
||||
void hw_iic_clr_pnd(hw_iic_dev iic, i2c_pnd_typedef png);
|
||||
void hw_iic_clr_all_pnd(hw_iic_dev iic);
|
||||
//iic主机中断接口
|
||||
struct hw_iic_master_isr_transmit {
|
||||
u8 *data_buf;//收发数据buf
|
||||
u8 *reg_buf;//寄存器buf
|
||||
OS_SEM sem;
|
||||
u16 tx_len;//要发送的长tx_len,rx_len不能同时赋值
|
||||
u16 rx_len;//要接收的长tx_len,rx_len不能同时赋值
|
||||
u16 xfer_postion;//=0,返回通信数据长
|
||||
enum iic_state_enum result;//通信结果。0:ok,<0:error
|
||||
u8 reg_len;
|
||||
u8 dev_addr;//从机设备地址
|
||||
u8 restart_flag;//是否有restart.1:发送restart,0不发
|
||||
};
|
||||
//支持协议：
|
||||
//tx: start,addr write,data0,data1,,,,,,stop
|
||||
//rx：start,addr read,data0,data1,,,,,nack,stop
|
||||
//tx: start,addr write,regx,data0,data1,,,,,,stop
|
||||
//rx：start,addr write,regx,start,addr read,data0,data1,,,,,nack,stop
|
||||
//tx/rx：start,addr,regx write/read,data0,data1,,,,,nack,stop
|
||||
//会修改结构体值,每次调用需初始化结构体
|
||||
//timeout:byte间隔等待时间。0:一直等, >0:*10ms(超时未通信完直接stop), <0:不等待(需确保结构体参数在通信结束前有效)
|
||||
//不可在低优先级中断等
|
||||
enum iic_state_enum hw_iic_master_isr_transmit_cfg(hw_iic_dev iic, struct hw_iic_master_isr_transmit *info, int timeout);
|
||||
//非阻塞获取iic主机中断传输状态
|
||||
enum iic_state_enum hw_iic_master_isr_get_status(hw_iic_dev iic);
|
||||
|
||||
|
||||
|
||||
//从机接口:
|
||||
enum iic_slave_rx_state {
|
||||
IIC_SLAVE_RX_PREPARE_TIMEOUT = -1,
|
||||
IIC_SLAVE_RX_PREPARE_OK = 0,
|
||||
IIC_SLAVE_RX_PREPARE_END_OK = 1,
|
||||
IIC_SLAVE_RX_ADDR_NO_MATCH = -2,
|
||||
IIC_SLAVE_RX_ADDR_TX = 2,
|
||||
IIC_SLAVE_RX_ADDR_RX = 3,
|
||||
IIC_SLAVE_RX_DATA = 4,
|
||||
};
|
||||
|
||||
enum iic_state_enum hw_iic_slave_init(hw_iic_dev iic, struct hw_iic_slave_config *i2c_config);
|
||||
void hw_iic_slave_set_addr(hw_iic_dev iic, u8 addr, u8 addr_ack);
|
||||
void hw_iic_slave_set_isr_func(hw_iic_dev iic, void (*iic_slave_irq_func)(void));
|
||||
u8 hw_iic_slave_get_addr(hw_iic_dev iic);
|
||||
|
||||
enum iic_slave_rx_state hw_iic_slave_rx_prepare(hw_iic_dev iic, u8 ack, u32 wait_time);//轮询, 准备收
|
||||
//判断地址，返回数据类型, 不检查结束位
|
||||
enum iic_slave_rx_state hw_iic_slave_rx_byte(hw_iic_dev iic, u8 *rx_byte);
|
||||
int hw_iic_slave_rx_nbyte(hw_iic_dev iic, u8 *rx_buf);//轮询,含结束位
|
||||
u8 hw_iic_slave_tx_check_ack(hw_iic_dev iic);//return:1:ack; 0:no ack
|
||||
void hw_iic_slave_tx_byte(hw_iic_dev iic, u8 byte);//准备发
|
||||
int hw_iic_slave_tx_nbyte(hw_iic_dev iic, u8 *tx_buf);//轮询,含结束位
|
||||
#endif
|
||||
@@ -0,0 +1,32 @@
|
||||
#ifndef _IIC_SOFT_H_
|
||||
#define _IIC_SOFT_H_
|
||||
|
||||
#include "generic/typedef.h"
|
||||
#include "gpio.h"
|
||||
|
||||
typedef const u8 soft_iic_dev;
|
||||
#include "iic_api.h"
|
||||
|
||||
|
||||
#define MAX_SOFT_IIC_NUM 3
|
||||
|
||||
|
||||
struct iic_master_config *get_soft_iic_config(soft_iic_dev iic);
|
||||
enum iic_state_enum soft_iic_init(soft_iic_dev iic, struct iic_master_config *i2c_config);
|
||||
enum iic_state_enum soft_iic_deinit(soft_iic_dev iic);
|
||||
enum iic_state_enum soft_iic_suspend(soft_iic_dev iic);
|
||||
enum iic_state_enum soft_iic_resume(soft_iic_dev iic);
|
||||
enum iic_state_enum soft_iic_check_busy(soft_iic_dev iic);
|
||||
enum iic_state_enum soft_iic_start(soft_iic_dev iic);
|
||||
void soft_iic_stop(soft_iic_dev iic);
|
||||
void soft_iic_reset(soft_iic_dev iic);//同iic_v2
|
||||
u8 soft_iic_tx_byte(soft_iic_dev iic, u8 byte);
|
||||
u8 soft_iic_rx_byte(soft_iic_dev iic, u8 ack, s8 *err);//err:返回错误状态
|
||||
//return: =len:ok
|
||||
int soft_iic_read_buf(soft_iic_dev iic, void *buf, int len);
|
||||
//return: =len:ok
|
||||
int soft_iic_write_buf(soft_iic_dev iic, const void *buf, int len);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
#ifndef __LOW_POWER_H__
|
||||
#define __LOW_POWER_H__
|
||||
|
||||
void low_power_sys_request(void *priv);
|
||||
|
||||
s32 low_power_trace_drift(u32 usec);
|
||||
|
||||
void low_power_reset_osc_type(u8 type);
|
||||
|
||||
u8 low_power_get_default_osc_type(void);
|
||||
|
||||
u8 low_power_get_osc_type(void);
|
||||
|
||||
void power_set_soft_poweroff(void);
|
||||
|
||||
void lowpower_init();
|
||||
|
||||
void lowpower_uninit();
|
||||
|
||||
void lowpower_dump();
|
||||
|
||||
void power_set_soft_poweroff(void);
|
||||
|
||||
#include "power_manage.h"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,150 @@
|
||||
#ifndef __LP_MSG_H__
|
||||
#define __LP_MSG_H__
|
||||
|
||||
//=================================消息格式========================================
|
||||
|
||||
//消息buf大小
|
||||
#define MAX_POOL 512
|
||||
|
||||
//消息类型
|
||||
enum {
|
||||
MSG_ACK = 0,
|
||||
MSG_TEST = 1,
|
||||
MSG_COMMOM = 2,
|
||||
MSG_CTMU = 3,
|
||||
MSG_SENSOR = 4,
|
||||
MSG_VAD = 5,
|
||||
MSG_RTC = 6,
|
||||
MSG_APP = 7,
|
||||
MSG_CLOCK = 8,
|
||||
};
|
||||
|
||||
//消息函数返回值
|
||||
enum {
|
||||
MSG_NO_ERROR = 0, //读取/发送消息成功
|
||||
MSG_NO_MSG = -1, //未读取到消息
|
||||
MSG_BUF_ERROR = -2, //读/写消息格式不对
|
||||
MSG_BUF_READ_OVER = -3, //读消息溢出，传的参数长度不对
|
||||
MSG_BUF_WRITE_OVER = -4, //写消息会溢出
|
||||
};
|
||||
|
||||
//消息头格式
|
||||
#define MSG_HEADER_BYTE_LEN 4
|
||||
#define MSG_HEADER_BIT_LEN (MSG_HEADER_BYTE_LEN*8)
|
||||
#define MSG_HEADER_ALL_BIT ((1L<<MSG_HEADER_BIT_LEN) - 1)
|
||||
|
||||
#define MSG_INDEX_BIT 15
|
||||
#define MSG_ACK_BIT 1
|
||||
|
||||
#define MSG_TYPE_BIT_LEN 8
|
||||
#define MSG_PARAM_BIT_LEN (MSG_HEADER_BYTE_LEN*8-MSG_TYPE_BIT_LEN-MSG_INDEX_BIT-MSG_ACK_BIT)
|
||||
|
||||
struct lp_msg_head {
|
||||
u32 type :
|
||||
MSG_TYPE_BIT_LEN;
|
||||
u32 ack :
|
||||
MSG_ACK_BIT;
|
||||
u32 index :
|
||||
MSG_INDEX_BIT;
|
||||
u32 len :
|
||||
MSG_PARAM_BIT_LEN;
|
||||
} __attribute__((packed));
|
||||
|
||||
//消息队列
|
||||
typedef struct LP_Q {
|
||||
u16 in; //写位置
|
||||
u16 out; //读位置
|
||||
u16 count; //有效数据
|
||||
u16 size; //buf大小
|
||||
u32 start; //buf起址
|
||||
u32 ack_flag; //应答标记
|
||||
} LP_Q;
|
||||
|
||||
enum {
|
||||
LP_BUF_NO_ERR = 0,
|
||||
LP_BUF_READ_NOT_ENOUGH_DATA = -1, //buf里数据不够读
|
||||
LP_BUF_READ_NO_DATA = -2, //buf里面没有数据
|
||||
LP_BUF_WRITE_OVER = -3, //写数据超过了buf大小
|
||||
};
|
||||
|
||||
//用户消息对应处理
|
||||
struct lp_msg_handler {
|
||||
void (*handler)(void *, u8 *, u32);
|
||||
void *priv;
|
||||
u8 type;
|
||||
} __attribute__((packed));
|
||||
|
||||
void msys_to_p11_sync_cmd(u8 cmd);
|
||||
|
||||
void lp_ipc_init();
|
||||
|
||||
void lp_lock();
|
||||
|
||||
void lp_unlock();
|
||||
|
||||
void config_post_ack_flag(u32 enable);
|
||||
|
||||
void lp_ipc_p11_to_suspend();//p11 to sleep
|
||||
|
||||
//================================M2P========================================================
|
||||
|
||||
#define REGISTER_M2P_MSG_HANDLER(pri, _type, fn) \
|
||||
const struct lp_msg_handler _##fn SEC_USED(.m2p_msg_handler)= { \
|
||||
.handler = fn, \
|
||||
.priv = pri, \
|
||||
.type = _type, \
|
||||
}
|
||||
|
||||
extern struct lp_msg_handler m2p_msg_handler_begin[];
|
||||
extern struct lp_msg_handler m2p_msg_handler_end[];
|
||||
|
||||
#define list_for_each_m2p_msg_handler(p) \
|
||||
for (p = m2p_msg_handler_begin; p < m2p_msg_handler_end; p++)
|
||||
|
||||
int m2p_get_msg(struct lp_msg_head *head, void *msg, u32 len);
|
||||
int m2p_post_msg(u32 type, u32 ack, const void *msg, u32 len);
|
||||
|
||||
void msys_to_p11_sys_cmd(u8 cmd);
|
||||
|
||||
int m2p_msg_hdl();
|
||||
|
||||
u32 msys_ack_p11(u32 index);
|
||||
|
||||
|
||||
/*
|
||||
* function:主系统向P11发送消息，往消息池丢数据
|
||||
*
|
||||
* param name: null
|
||||
* param argc：参数个数
|
||||
*/
|
||||
|
||||
int task_post_msg2p11(char *name, int argc, ...);
|
||||
|
||||
enum {
|
||||
MSG_CLOCK_LRC24M_OK = 1,
|
||||
};
|
||||
|
||||
//================================P2M========================================================
|
||||
|
||||
#define REGISTER_P2M_MSG_HANDLER(pri, _type, fn) \
|
||||
const struct lp_msg_handler _##fn SEC_USED(.p2m_msg_handler)= { \
|
||||
.handler = fn, \
|
||||
.priv = pri,\
|
||||
.type = _type, \
|
||||
}
|
||||
|
||||
extern struct lp_msg_handler p2m_msg_handler_begin[];
|
||||
extern struct lp_msg_handler p2m_msg_handler_end[];
|
||||
|
||||
#define list_for_each_p2m_msg_handler(p) \
|
||||
for (p = p2m_msg_handler_begin; p < p2m_msg_handler_end; p++)
|
||||
|
||||
int p2m_get_msg(struct lp_msg_head *head, void *msg, u32 len);
|
||||
int p2m_post_msg(u32 type, u32 ack, const void *msg, u32 len);
|
||||
|
||||
int p2m_msg_hdl();
|
||||
|
||||
u32 set_p2m_ack_flag(u32 index);
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,9 @@
|
||||
#ifndef __POWER_APP_H__
|
||||
#define __POWER_APP_H__
|
||||
|
||||
void power_early_flowing();
|
||||
int power_later_flowing();
|
||||
|
||||
void board_power_init();
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,133 @@
|
||||
#ifndef __POWER_MANAGE_H__
|
||||
#define __POWER_MANAGE_H__
|
||||
|
||||
//******************************************************************************************
|
||||
/*
|
||||
* 模块注册进入sleep等级
|
||||
*/
|
||||
typedef u8(*idle_handler_t)(void);
|
||||
typedef enum LOW_POWER_LEVEL(*level_handler_t)(void);
|
||||
struct lp_target {
|
||||
char *name;
|
||||
level_handler_t level;
|
||||
idle_handler_t is_idle;
|
||||
};
|
||||
|
||||
#define REGISTER_LP_TARGET(target) \
|
||||
const struct lp_target target SEC_USED(.lp_target)
|
||||
|
||||
extern const struct lp_target lp_target_begin[];
|
||||
extern const struct lp_target lp_target_end[];
|
||||
|
||||
#define list_for_each_lp_target(p) \
|
||||
for (p = lp_target_begin; p < lp_target_end; p++)
|
||||
|
||||
u32 lower_power_bt_group_query();
|
||||
u32 low_power_sys_not_idle_cnt(void);
|
||||
u8 low_power_sys_is_idle(void);
|
||||
|
||||
enum LOW_POWER_LEVEL {
|
||||
LOW_POWER_MODE_LIGHT_SLEEP = 1,
|
||||
LOW_POWER_MODE_SLEEP,
|
||||
LOW_POWER_MODE_DEEP_SLEEP,
|
||||
LOW_POWER_MODE_SOFF,
|
||||
};
|
||||
u8 is_low_power_mode(enum LOW_POWER_LEVEL level);
|
||||
|
||||
//******************************************************************************************
|
||||
/*
|
||||
* get_timeout->suspend->resume
|
||||
*/
|
||||
struct low_power_operation {
|
||||
const char *name;
|
||||
u32(*get_timeout)(void *priv);
|
||||
void (*suspend_probe)(void *priv);
|
||||
void (*suspend_post)(void *priv, u32 usec);
|
||||
void (*resume)(void *priv, u32 usec);
|
||||
void (*resume_post)(void *priv, u32 usec);
|
||||
};
|
||||
void *low_power_get(void *priv, const struct low_power_operation *ops);
|
||||
void low_power_put(void *priv);
|
||||
void *low_power_sys_get(void *priv, const struct low_power_operation *ops);
|
||||
void low_power_sys_put(void *priv);
|
||||
void low_power_on();
|
||||
void low_power_request();
|
||||
|
||||
//******************************************************************************************
|
||||
/*低功耗线程请求进入低功耗, 主动发出
|
||||
*/
|
||||
struct lp_request {
|
||||
char *name;
|
||||
u8(*request_enter)(u32 timeout);
|
||||
u8(*request_exit)(u32 timeout);
|
||||
};
|
||||
|
||||
#define REGISTER_LP_REQUEST(target) \
|
||||
const struct lp_request target sec(.lp_request)
|
||||
|
||||
extern const struct lp_request lp_request_begin[];
|
||||
extern const struct lp_request lp_request_end[];
|
||||
|
||||
#define list_for_each_lp_request(p) \
|
||||
for (p = lp_request_begin; p < lp_request_end; p++)
|
||||
|
||||
//******************************************************************************************
|
||||
/*
|
||||
* deepsleep register
|
||||
*/
|
||||
struct deepsleep_target {
|
||||
char *name;
|
||||
u8(*enter)(void);
|
||||
u8(*exit)(void);
|
||||
u8(*post)(void);
|
||||
};
|
||||
|
||||
#define DEEPSLEEP_TARGET_REGISTER(target) \
|
||||
const struct deepsleep_target target SEC_USED(.deepsleep_target)
|
||||
|
||||
extern const struct deepsleep_target deepsleep_target_begin[];
|
||||
extern const struct deepsleep_target deepsleep_target_end[];
|
||||
|
||||
#define list_for_each_deepsleep_target(p) \
|
||||
for (p = deepsleep_target_begin; p < deepsleep_target_end; p++)
|
||||
|
||||
void deepsleep_target_dump();
|
||||
|
||||
//******************************************************************************************
|
||||
struct _phw_dev {
|
||||
void *hw;
|
||||
void *pdata;
|
||||
struct phw_dev_ops *ops;
|
||||
};
|
||||
|
||||
struct phw_dev_ops {
|
||||
void *(*early_init)(u32 arg);
|
||||
u32(*init)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*ioctl)(struct _phw_dev *dev, u32 cmd, u32 arg);
|
||||
|
||||
u32(*sleep_already)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*sleep_prepare)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*sleep_enter)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*sleep_exit)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*sleep_post)(struct _phw_dev *dev, u32 arg);
|
||||
|
||||
u32(*soff_prepare)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*soff_enter)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*soff_exit)(struct _phw_dev *dev, u32 arg);
|
||||
|
||||
u32(*deepsleep_enter)(struct _phw_dev *dev, u32 arg);
|
||||
u32(*deepsleep_exit)(struct _phw_dev *dev, u32 arg);
|
||||
};
|
||||
|
||||
#define REGISTER_PHW_DEV_PMU_OPS(ops) \
|
||||
const struct phw_dev_ops *phw_pmu_ops = &ops
|
||||
extern const struct phw_dev_ops *phw_pmu_ops;
|
||||
|
||||
|
||||
//******************************************************************************************
|
||||
|
||||
extern const u32 pdrv_text_cache_l2_begin;
|
||||
extern const u32 pdrv_text_cache_l2_end;
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,96 @@
|
||||
#ifndef __POWER_RESET_H__
|
||||
#define __POWER_RESET_H__
|
||||
|
||||
/*
|
||||
*复位原因包括两种
|
||||
1.系统复位源: p33 p11 主系统
|
||||
2.自定义复位源：唤醒、断言、异常等
|
||||
*/
|
||||
enum RST_REASON {
|
||||
/*主系统*/
|
||||
MSYS_P11_RST, //P11复位
|
||||
MSYS_P33_RST, //P33复位
|
||||
MSYS_DVDD2_POR_RST, //DVDD2上电
|
||||
MSYS_DVDD_POR_RST, //DVDD上电
|
||||
MSYS_SOFT_RST, //主系统软件复位
|
||||
MSYS_P2M_RST, //低功耗唤醒复位(p11数字复位msys，soff/poff)
|
||||
MSYS_LPMR_RST, //低功耗唤醒复位(p33数字复位msys, soff)
|
||||
MSYS_POWER_RETURN, //主系统未被复位
|
||||
|
||||
/*P11*/
|
||||
P11_PVDD_POR_RST, //pvdd上电
|
||||
P11_LPMR_RST, //低功耗唤醒复位(softoff legacy)
|
||||
P11_P33_RST, //p33复位
|
||||
P11_P33_POR_RST, //p33电源复位
|
||||
P11_WDT_RST, //看门狗复位
|
||||
P11_SOFT_RST, //软件复位
|
||||
P11_MSYS_RST, //主系统复位P11
|
||||
P11_WVDD_POR, //P33电源复位了
|
||||
P11_POWER_RETURN, //P11系统未被复位
|
||||
|
||||
/*P33*/
|
||||
P33_VDDIO_POR_RST, //vddio上电复位(电池/vpwr供电)
|
||||
P33_VDDIO_LVD_RST, //vddio低压复位、上电复位(电池/vpwr供电)
|
||||
P33_WDT_RST, //看门狗复位
|
||||
P33_VCM_RST, //vcm高电平短接复位
|
||||
P33_MCLR_RST, //mclr低电平短接复位
|
||||
P33_PPINR_RST, //数字io输入长按复位
|
||||
P33_P11_RST, //p11系统复位p33，rset_mask=0
|
||||
P33_MSYS_RST, //msys系统复位p33，rset_mask=0
|
||||
P33_SOFT_RST, //p33软件复位，一般软件复位指此系统复位源，所有系统会直接复位。
|
||||
P33_PPINR1_RST, //模拟io输入长按复位，包括charge_full、vatch、ldoint、vabt_det
|
||||
P33_PPINR1_SOFT_RST, //PINR1保护机制使能时，当软件清PINR PND1的操作发生在窗口外时产生的复位
|
||||
P33_POWER_RETURN, //p33系统未被复位。
|
||||
P33_LV0_RST,
|
||||
|
||||
/*RTC*/
|
||||
R3_VDDIO_RST, //rtc vddio
|
||||
R3_SOFT_RST, //rtc 软件复位
|
||||
R3_POWER_RETURN, //rtc未被复位
|
||||
|
||||
RST_REASON_RESERVE = 63,
|
||||
};
|
||||
|
||||
enum RESET_FLAG {
|
||||
RESET_FLAG_RESERVE,
|
||||
EXCEPTION_FLAG,
|
||||
ASSERT_FLAG,
|
||||
UPDATE_FLAG,
|
||||
BT_FLAG,
|
||||
LP_OSC_UP_TO,
|
||||
SPI0_WAIT_PND_ERR,
|
||||
SOFF_ENTER_TO,
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* @brief 判断是否为指定复位源
|
||||
* @param index: 复位源
|
||||
* @retval 1: 是 0：否
|
||||
*/
|
||||
bool is_reset_source(enum RST_REASON index);
|
||||
|
||||
/**
|
||||
* @brief 判断是否为指定系统软件复位源
|
||||
指定软件复位源为flag
|
||||
is_system_reset(flag)
|
||||
is_reset_source(flag+P33_EXCEPTION_SOFT_RST)
|
||||
|
||||
* @param index: 软件复位源
|
||||
* @retval 1: 是 0：否
|
||||
*/
|
||||
bool is_system_reset(enum RESET_FLAG flag);
|
||||
|
||||
/**
|
||||
* @brief 系统软复位，并指定复位信息
|
||||
* @param flag：系统软复位源
|
||||
* @retval 1: 是 0：否
|
||||
*/
|
||||
void system_reset(enum RESET_FLAG flag);
|
||||
|
||||
/**
|
||||
* @brief 复位的时候锁存模拟模块状态，例如GPIO
|
||||
*/
|
||||
void latch_reset();
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,135 @@
|
||||
#ifndef __POWER_WAKEUP_H__
|
||||
#define __POWER_WAKEUP_H__
|
||||
|
||||
//=========================唤醒原因==================================
|
||||
enum WAKEUP_REASON {
|
||||
PWR_WK_REASON_PLUSE_CNT_OVERFLOW, //pcnt唤醒复位
|
||||
PWR_WK_REASON_P11, //P11唤醒复位
|
||||
PWR_WK_REASON_LPCTMU, //触摸唤醒复位
|
||||
PWR_WK_REASON_LPNFC, //NFC唤醒复位
|
||||
PWR_WK_REASON_PORT_EDGE, //数字io输入边沿唤醒复位
|
||||
PWR_WK_REASON_ANA_EDGE, //模拟io输入边沿唤醒复位
|
||||
PWR_WK_REASON_VDDIO_LVD, //vddio lvd唤醒复位
|
||||
PWR_WK_REASON_WDT, //vddio lvd看门狗唤醒复位
|
||||
|
||||
PWR_WK_REASON_FALLING_EDGE_0, //p33 index0 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_1, //p33 index1 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_2, //p33 index2 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_3, //p33 index3 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_4, //p33 index4 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_5, //p33 index5 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_6, //p33 index6 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_7, //p33 index7 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_8, //p33 index8 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_9, //p33 index9 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_10, //p33 index10 io下降沿唤醒复位
|
||||
PWR_WK_REASON_FALLING_EDGE_11, //p33 index11 io下降沿唤醒复位
|
||||
|
||||
PWR_WK_REASON_RISING_EDGE_0, //p33 index0 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_1, //p33 index1 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_2, //p33 index2 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_3, //p33 index3 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_4, //p33 index4 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_5, //p33 index5 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_6, //p33 index6 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_7, //p33 index7 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_8, //p33 index8 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_9, //p33 index9 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_10, //p33 index10 io上升沿唤醒复位
|
||||
PWR_WK_REASON_RISING_EDGE_11, //p33 index11 io上升沿唤醒复位
|
||||
|
||||
PWR_ANA_WK_REASON_FALLING_EDGE_LDOIN, //LDO5V下降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_FALLING_EDGE_VBATCH, //VBATCH下降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_FALLINIG_EDGE_VBATDT, //vbatdt下降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_FALLINIG_EDGE_CHARGEFULL, //charge full下降沿唤醒复位
|
||||
|
||||
PWR_ANA_WK_REASON_RISING_EDGE_LDOIN, //LDO5V上降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_RISING_EDGE_VBATCH, //VBATCH上降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_RISING_EDGE_VBATDT, //vbatdet上升沿唤醒复位
|
||||
PWR_ANA_WK_REASON_RISING_EDGE_CHARGEFULL, //chargefull上升沿唤醒复位
|
||||
|
||||
PINR_PND1_WKUP,
|
||||
|
||||
PWR_RTC_WK_REASON_ALM, //RTC闹钟唤醒复位
|
||||
PWR_RTC_WK_REASON_256HZ, //RTC 256Hz时基唤醒复位
|
||||
PWR_RTC_WK_REASON_64HZ, //RTC 64Hz时基唤醒复位
|
||||
PWR_RTC_WK_REASON_2HZ, //RTC 2Hz时基唤醒复位
|
||||
PWR_RTC_WK_REASON_1HZ, //RTC 1Hz时基唤醒复位
|
||||
|
||||
PWR_WKUP_REASON_RESERVE = 63,
|
||||
|
||||
};
|
||||
|
||||
//
|
||||
//
|
||||
// platform_data
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
typedef enum {
|
||||
RISING_EDGE = 1,
|
||||
FALLING_EDGE,
|
||||
BOTH_EDGE,
|
||||
} P33_IO_WKUP_EDGE;
|
||||
|
||||
typedef enum {
|
||||
PORT_FLT_DISABLE,
|
||||
PORT_FLT_16us,
|
||||
PORT_FLT_128us,
|
||||
PORT_FLT_1ms,
|
||||
PORT_FLT_4ms,
|
||||
PORT_FLT_16ms,
|
||||
} P33_IO_WKUP_FLT;
|
||||
|
||||
struct _p33_io_wakeup_config {
|
||||
u32 gpio; //唤醒io
|
||||
enum gpio_mode pullup_down_mode; //输入上拉模式，数字输入、上拉输入、下拉输入
|
||||
P33_IO_WKUP_FLT filter; //滤波参数
|
||||
P33_IO_WKUP_EDGE edge; //唤醒边沿条件
|
||||
void (*callback)(P33_IO_WKUP_EDGE edge);
|
||||
};
|
||||
|
||||
struct _p33_io_wakeup_param {
|
||||
};
|
||||
|
||||
struct _wakeup_param {
|
||||
struct _p33_io_wakeup_param *p33_io_wakeup_param_p;
|
||||
|
||||
};
|
||||
|
||||
//
|
||||
//
|
||||
// power_wakeup api
|
||||
//
|
||||
//
|
||||
//
|
||||
//******************************************************************
|
||||
|
||||
bool is_wakeup_source(enum WAKEUP_REASON index);
|
||||
|
||||
bool is_ldo5v_wakeup();
|
||||
|
||||
/*
|
||||
*@brief 判断是否为指定gpio唤醒
|
||||
*@param gpio序号
|
||||
*@retval 0: 不是该唤醒
|
||||
*@retval RISING_EDGE: 上升沿唤醒
|
||||
*@retval RISING_EDGE: 下降沿沿唤醒
|
||||
*@retval BOTH_EDGE: 双边沿沿唤醒
|
||||
*/
|
||||
u32 is_gpio_wakeup(u32 gpio);
|
||||
|
||||
/*
|
||||
*@brief 初始化一个唤醒口
|
||||
1.优先和长按复位复用
|
||||
2.所有通道都用完之后，若长按复位没有开启，则占用长按复位通道
|
||||
*/
|
||||
void p33_io_wakeup_port_init(const struct _p33_io_wakeup_config *const config);
|
||||
void p33_io_wakeup_port_uninit(u32 gpio);
|
||||
|
||||
void p33_io_wakeup_filter(u32 gpio, P33_IO_WKUP_FLT filter);
|
||||
void p33_io_wakeup_enable(u32 gpio, u32 enable);
|
||||
void p33_io_wakeup_set_callback(u32 gpio, void (*callback)(P33_IO_WKUP_EDGE edge));
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,42 @@
|
||||
#ifndef __WDT_H__
|
||||
#define __WDT_H__
|
||||
|
||||
enum {
|
||||
WDT_1MS = 0,
|
||||
WDT_2MS,
|
||||
WDT_4MS,
|
||||
WDT_8MS,
|
||||
WDT_16MS,
|
||||
WDT_32MS,
|
||||
WDT_64MS,
|
||||
WDT_128MS,
|
||||
WDT_256MS,
|
||||
WDT_512MS,
|
||||
WDT_1S,
|
||||
WDT_2S,
|
||||
WDT_4S,
|
||||
WDT_8S,
|
||||
WDT_16S,
|
||||
WDT_32S,
|
||||
WDT_LRC_1MS,
|
||||
WDT_LRC_2MS,
|
||||
WDT_LRC_4MS,
|
||||
WDT_LRC_8MS,
|
||||
WDT_LRC_16MS,
|
||||
WDT_LRC_32MS,
|
||||
WDT_LRC_64MS,
|
||||
WDT_LRC_128MS,
|
||||
WDT_LRC_256MS,
|
||||
WDT_LRC_512MS,
|
||||
WDT_LRC_1S,
|
||||
WDT_LRC_2S,
|
||||
WDT_LRC_4S,
|
||||
};
|
||||
|
||||
void wdt_init(u32 time);
|
||||
void wdt_enable();
|
||||
void wdt_disable();
|
||||
void wdt_clear();
|
||||
u32 wdt_get_time();//ms
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,116 @@
|
||||
#ifndef _SPI_H_
|
||||
#define _SPI_H_
|
||||
|
||||
#include "asm/spi_hw.h"
|
||||
|
||||
enum spi_mode {
|
||||
SPI_MODE_BIDIR_1BIT, //支持SPIx(x=0,1,2)，全双工，di接收，do发送
|
||||
SPI_MODE_UNIDIR_1BIT, //支持SPIx(x=0,1,2)，半双工，do分时发送/接收
|
||||
SPI_MODE_UNIDIR_2BIT, //支持SPIx(x=0,1,2)，半双工，di & do共2bit分时发送/接收
|
||||
SPI_MODE_UNIDIR_4BIT, //支持SPIx(x=1)，半双工，di & do & wp & hold 共4bit分时发送/接收
|
||||
};
|
||||
enum spi_role {
|
||||
SPI_ROLE_MASTER,
|
||||
SPI_ROLE_SLAVE,
|
||||
};
|
||||
|
||||
enum hw_spi_isr_status {
|
||||
SPI_WAITING_PND,
|
||||
SPI_TX_FINISH,
|
||||
SPI_RX_FINISH,
|
||||
SPI_PND_ERROR,
|
||||
};
|
||||
|
||||
typedef struct spi_platform_data {
|
||||
u8 port[6]; //CLK, DO, DI, D2(wp), D3(hold), cs(只用于slave),未使用的io配0xff
|
||||
enum spi_role role; //master or slave
|
||||
enum spi_mode mode; //模式，选项为enum spi_mode中的枚举常量
|
||||
enum spi_bit_mode bit_mode;
|
||||
u8 cpol: 1; //clk level in idle state:0:low, 1:high
|
||||
u8 cpha: 2; //0:s_rise,u_fall 1:s_fall,u_rise 2:s_fall,u_fall 3:s_rise,u_rise
|
||||
u8 ie_en: 1; //ie enbale:0:disable, 1:enable
|
||||
u8 irq_priority: 4; //中断优先级
|
||||
void (*spi_isr_callback)(hw_spi_dev spi, enum hw_spi_isr_status sta); //spi isr callback
|
||||
u32 clk; //波特率
|
||||
} spi_hardware_info;
|
||||
|
||||
|
||||
#define HW_SPI_MASTER_CS_EN 0//0:close,1:open
|
||||
|
||||
struct spi_platform_data *get_hw_spi_config(hw_spi_dev spi);
|
||||
int spi_open(hw_spi_dev spi, spi_hardware_info *spi_info);
|
||||
void spi_deinit(hw_spi_dev spi);
|
||||
void spi_suspend(hw_spi_dev spi);
|
||||
void spi_resume(hw_spi_dev spi);
|
||||
|
||||
void spi_set_bit_mode(hw_spi_dev spi, enum spi_mode mode);
|
||||
int spi_set_baud(hw_spi_dev spi, u32 baud);
|
||||
u32 spi_get_baud(hw_spi_dev spi);
|
||||
|
||||
/*******************主机 阻塞接口*********************/
|
||||
u8 spi_recv_byte(hw_spi_dev spi, int *err);
|
||||
int spi_send_byte(hw_spi_dev spi, u8 byte);
|
||||
u8 spi_send_recv_byte(hw_spi_dev spi, u8 byte, int *err);//全双工
|
||||
|
||||
int spi_dma_recv(hw_spi_dev spi, void *buf, u32 len);
|
||||
int spi_dma_send(hw_spi_dev spi, const void *buf, u32 len);
|
||||
|
||||
void spi_set_ie(hw_spi_dev spi, u8 en);
|
||||
u8 spi_get_pending(hw_spi_dev spi);
|
||||
void spi_clear_pending(hw_spi_dev spi);
|
||||
|
||||
/*******************主机，从机中断接口*********************/
|
||||
//切换中断回调函数
|
||||
void hw_spix_irq_change_callback(hw_spi_dev spi, void (*spi_isr_callback_f)(hw_spi_dev spi, enum hw_spi_isr_status sta));
|
||||
/*
|
||||
* @brief 发送1个字节，不等待pnd，用于中断,无cs, 适用主从
|
||||
* @parm spi spi句柄
|
||||
* @parm tx_byte 发送的数据，rw=1时无效
|
||||
* @parm rx_byte 接收的数据的地址，没有时给NULL
|
||||
* @parm rw :1-rx; 0-tx
|
||||
* @return null
|
||||
*/
|
||||
void spi_byte_transmit_for_isr(hw_spi_dev spi, u8 tx_byte, u8 *rx_byte, u8 rw);//rw:1-rx; 0-tx
|
||||
/*
|
||||
* @brief 发送n个字节，不等待pnd，用于中断,无cs, 适用主从
|
||||
* @parm spi spi句柄
|
||||
* @parm tx_buf 发送的buf的地址，没有时给NULL
|
||||
* @parm rx_buf 接收的buf的地址，没有时给NULL
|
||||
* @parm len:接收或发送的长
|
||||
* @parm rw :1-rx; 0-tx
|
||||
* @return null
|
||||
*/
|
||||
void spi_buf_transmit_for_isr(hw_spi_dev spi, u8 *tx_buf, u8 *rx_buf, int len, u8 rw);//rw:1-rx; 0-tx
|
||||
|
||||
void hw_spix_clear_buf_isr_addr_inc(hw_spi_dev spi);
|
||||
/*
|
||||
* @brief spi 配置dma，不等待pnd，用于中断,无cs, 适用主从
|
||||
* @parm spi spi句柄
|
||||
* @parm buf 缓冲区基地址
|
||||
* @parm len 期望长度
|
||||
* @parm rw 1 接收 / 0 发送
|
||||
* @return null
|
||||
*/
|
||||
void spi_dma_transmit_for_isr(hw_spi_dev spi, void *buf, int len, u8 rw);//rw:1-rx; 0-tx
|
||||
|
||||
|
||||
//返回spi中断状态isr_status:见枚举
|
||||
enum hw_spi_isr_status hw_spix_get_isr_status(hw_spi_dev spi);
|
||||
//每包数据前清空,在通信过程中调用,会导致数据长不准
|
||||
void hw_spix_clear_isr_len(hw_spi_dev spi);
|
||||
/*返回中断通信数据长度 带符号
|
||||
* 符号表示dma(-)还是byte(+)
|
||||
* 数据表示长度
|
||||
* 结合isr_status可知是接收还是发送 */
|
||||
int hw_spix_get_isr_len(hw_spi_dev spi);
|
||||
|
||||
/* spi从机接口
|
||||
* spi从机不开中断dma模式
|
||||
*返回dma通信数据长度(当前已传输个数)
|
||||
* 符号表示dma(-)
|
||||
* 数据表示长度
|
||||
* 不能区分收发*/
|
||||
int hw_spix_slave_get_dma_len(hw_spi_dev spi);
|
||||
|
||||
#endif
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user