This commit is contained in:
huxi
2025-12-03 11:12:34 +08:00
parent c23ae4f24c
commit bc195654bf
8163 changed files with 3799544 additions and 92 deletions
+31
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@@ -0,0 +1,31 @@
{
"configurations": [
{
"cStandard": "c99",
"compilerPath": "C:/JL/pi32/bin/clang.exe",
"cppStandard": "c++11",
"defines": [
"__GCC_Q32S__",
"PMU_SYSTEM",
"CONFIG_FPGA_ENABLE",
"__Q32S__"
],
"includePath": [
"${workspaceFolder}/apps",
"${workspaceFolder}/apps/bsp/cpu/br35/config",
"${workspaceFolder}/include/driver",
"${workspaceFolder}/include/driver/cpu/br35",
"${workspaceFolder}/include/system",
"${workspaceFolder}/include/system/typedef",
"${workspaceFolder}/include/system/cpu/br35",
"${workspaceFolder}/include/utils",
"${workspaceFolder}/apps/sensor",
"${workspaceFolder}/apps/sensor/driver_vc_hr_11",
"C:/JL/pi32/q32s-include"
],
"intelliSenseMode": "clang-x86",
"name": "AC707N_SensorHub"
}
],
"version": 4
}
+28
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{
"version": "2.0.0",
"tasks": [
{
"label": "all",
"type": "shell",
"windows": {
"command": ".vscode/winmk.bat all"
},
"command": "make all -j`nproc`",
"problemMatcher": [],
"group": {
"kind": "build",
"isDefault": true
}
}
,{
"label": "clean",
"type": "shell",
"windows": {
"command": ".vscode/winmk.bat clean"
},
"command": "make clean -j`nproc`",
"problemMatcher": [],
"group": "build"
}
]
}
+3
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SET SCRIPT_PATH=%~dp0%
SET PATH=%SCRIPT_PATH%\..\tools\utils;%PATH%
make "%1" -j %NUMBER_OF_PROCESSORS%
+144
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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<CodeBlocks_project_file>
<FileVersion major="1" minor="6" />
<Project>
<Option title="AC707N_SensorHub" />
<Option compiler="q32s_lto_compiler" />
<Build>
<Target title="Release">
<Option output="apps/bsp/cpu/br35/post_build/p11.elf" prefix_auto="0" extension_auto="0" />
<Option object_output="obj/Release/" />
<Option type="1" />
<Option compiler="q32s_lto_compiler" />
<Compiler>
<Add option="-integrated-as" />
<Add option="-g" />
<Add option="-O0" />
<Add option="-flto" />
<Add option="-Os" />
<Add option="-Wcast-align" />
<Add option="-Wall" />
<Add option="-fallow-pointer-null" />
<Add option="-Wincompatible-pointer-types" />
<Add option="-fprefer-gnu-section" />
<Add option="-Werror=undef" />
<Add option="-Wframe-larger-than=32" />
<Add option="-Werror=incompatible-pointer-types" />
<Add option="-Werror=return-type" />
<Add option="-Werror=implicit-function-declaration" />
<Add option="-Wno-unused-variable" />
<Add option="-Wno-unused-function" />
<Add option="-Wno-cast-align" />
<Add option="-Werror" />
<Add option="-D__GCC_Q32S__" />
<Add option="-DPMU_SYSTEM" />
<Add option="-DCONFIG_FPGA_ENABLE" />
<Add directory="apps" />
<Add directory="apps/bsp/cpu/br35/config" />
<Add directory="include/driver" />
<Add directory="include/driver/cpu/br35" />
<Add directory="include/system" />
<Add directory="include/system/typedef" />
<Add directory="include/system/cpu/br35" />
<Add directory="include/utils" />
<Add directory="apps/sensor" />
<Add directory="apps/sensor/driver_vc_hr_11" />
</Compiler>
<Linker>
<Add option="--plugin-opt=-inline-threshold=5" />
<Add option="--plugin-opt=save-temps" />
<Add option="--plugin-opt=-inline-normal-into-special-section=true" />
<Add option="--plugin-opt=-dont-used-symbol-list=malloc,free,sprintf,printf,puts,putchar" />
<Add option="--sort-common" />
<Add option="--plugin-opt=-warn-stack-size=32" />
<Add option="--start-group" />
<Add option="apps/bsp/cpu/br35/liba/system.a" />
<Add option="apps/bsp/cpu/br35/liba/cpu.a" />
<Add option="apps/bsp/cpu/br35/liba/utils.a" />
<Add option="apps/bsp/cpu/br35/liba/sensor_algorithm_jl_gesture.a" />
<Add option="--end-group" />
<Add option="-Tapps/bsp/cpu/br35/p11.ld" />
<Add option="-M=apps/bsp/cpu/br35/post_build/p11.map" />
<Add library="C:\JL\pi32\q32s-lib\libm.a" />
</Linker>
<ExtraCommands>
<Add before="$compiler $options $includes -D__LD__ -E -P apps\bsp\cpu\br35\p11_ld.c -o apps\bsp\cpu\br35\p11.ld" />
<Mode before="always" />
<Add after="apps\bsp\cpu\br35\post_build\download.bat p11" />
<Mode after="always" />
</ExtraCommands>
</Target>
</Build>
<Unit filename="apps/bsp/cpu/br35/bsp.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/clock.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/config/lib_config.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/config/lib_config.h" />
<Unit filename="apps/bsp/cpu/br35/config/log_config.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/config/sdk_config.h" />
<Unit filename="apps/bsp/cpu/br35/iic_api.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/iic_soft.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/ipc_spin_lock.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/power/power_app.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/power/power_config.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/setup.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/bsp/cpu/br35/uart.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/debug/debug.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/main.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/main.h" />
<Unit filename="apps/msg/msg.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/driver_mmc5603/driver_mmc5603.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/driver_sc7a20/driver_sc7a20.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/driver_vc_hr_11/driver_vc_hr_11.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/driver_vc_hr_11/vcHr11Hci.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/driver_vc_hr_11/vcHr11Hci.h" />
<Unit filename="apps/sensor/sensor_driver.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/sensor_driver.h" />
<Unit filename="apps/sensor/sensor_service_wrist_tilt.c"><Option compilerVer="CC"/></Unit>
<Unit filename="apps/sensor/sensor_service_wrist_tilt.h" />
<Unit filename="include/driver/cpu/br35/bsp.h" />
<Unit filename="include/driver/cpu/br35/clock/boot_xosc.h" />
<Unit filename="include/driver/cpu/br35/clock/clock.h" />
<Unit filename="include/driver/cpu/br35/clock/config.h" />
<Unit filename="include/driver/cpu/br35/clock/p11_clk_cfg.h" />
<Unit filename="include/driver/cpu/br35/clock_interface.h" />
<Unit filename="include/driver/cpu/br35/gpio.h" />
<Unit filename="include/driver/cpu/br35/iic_api.h" />
<Unit filename="include/driver/cpu/br35/iic_hw_v2.h" />
<Unit filename="include/driver/cpu/br35/iic_soft.h" />
<Unit filename="include/driver/cpu/br35/io_imap.h" />
<Unit filename="include/driver/cpu/br35/ipc_spin_lock.h" />
<Unit filename="include/driver/cpu/br35/p11_gptimer.h" />
<Unit filename="include/driver/cpu/br35/power/p11/lp_ipc.h" />
<Unit filename="include/driver/cpu/br35/power/p11/lp_msg.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_api.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_clock_hw.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_csfr.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_io_imap.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_io_omap.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_mmap.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_rom_api.h" />
<Unit filename="include/driver/cpu/br35/power/p11/p11_sfr.h" />
<Unit filename="include/driver/cpu/br35/power/p33/p33_access.h" />
<Unit filename="include/driver/cpu/br35/power/p33/p33_api.h" />
<Unit filename="include/driver/cpu/br35/power/p33/p33_sfr.h" />
<Unit filename="include/driver/cpu/br35/power/power_api.h" />
<Unit filename="include/driver/cpu/br35/power/power_app.h" />
<Unit filename="include/driver/cpu/br35/power/power_manage.h" />
<Unit filename="include/driver/cpu/br35/power/power_port.h" />
<Unit filename="include/driver/cpu/br35/power/power_wakeup.h" />
<Unit filename="include/driver/cpu/br35/power_interface.h" />
<Unit filename="include/driver/cpu/br35/timer.h" />
<Unit filename="include/driver/cpu/br35/uart.h" />
<Unit filename="include/system/cpu/br35/debug.h" />
<Unit filename="include/system/cpu/br35/hwi.h" />
<Unit filename="include/system/cpu/br35/includes.h" />
<Unit filename="include/system/cpu/br35/interrupt_hw.h" />
<Unit filename="include/system/delay.h" />
<Unit filename="include/system/typedef/assert.h" />
<Unit filename="include/system/typedef/typedef.h" />
<Unit filename="include/system/usr_timer.h" />
<Unit filename="include/utils/bank_switch.h" />
<Unit filename="include/utils/circular_buf.h" />
<Unit filename="include/utils/printf.h" />
</Project>
</CodeBlocks_project_file>
+291
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# make 编译并下载
# make VERBOSE=1 显示编译详细过程
# make clean 清除编译临时文件
#
# 注意: Linux 下编译方式:
# 1. 从 http://pkgman.jieliapp.com/doc/all 处找到下载链接
# 2. 下载后,解压到 /opt/jieli 目录下,保证
# /opt/jieli/common/bin/clang 存在(注意目录层次)
# 3. 确认 ulimit -n 的结果足够大(建议大于8096),否则链接可能会因为打开文件太多而失败
# 可以通过 ulimit -n 8096 来设置一个较大的值
#
# 工具路径设置
ifeq ($(OS), Windows_NT)
# Windows 下工具链位置
TOOL_DIR := C:/JL/pi32/bin
CC := clang.exe
CXX := clang.exe
LD := q32s-lto-wrapper.exe
AR := llvm-ar.exe
MKDIR := mkdir_win -p
RM := rm -rf
SYS_LIB_DIR := C:/JL/pi32/q32s-lib
SYS_INC_DIR := C:/JL/pi32/q32s-include
EXT_CFLAGS := # Windows 下不需要 -D__SHELL__
export PATH:=$(TOOL_DIR);$(PATH)
## 后处理脚本
POST_SCRIPT := apps/bsp/cpu/br35/post_build/download.bat
RUN_POST_SCRIPT := apps\bsp\cpu\br35\post_build\download.bat
else
# Linux 下工具链位置
TOOL_DIR := /opt/jieli/q32s/bin
CC := clang
CXX := clang
LD := lto-wrapper
AR := lto-ar
MKDIR := mkdir -p
RM := rm -rf
export OBJDUMP := $(TOOL_DIR)/objdump
export OBJCOPY := $(TOOL_DIR)/objcopy
export OBJSIZEDUMP := $(TOOL_DIR)/objsizedump
SYS_LIB_DIR := $(TOOL_DIR)/../lib
SYS_INC_DIR := $(TOOL_DIR)/../include
EXT_CFLAGS := -D__SHELL__ # Linux 下需要这个保证正确处理 download.c
export PATH:=$(TOOL_DIR):$(PATH)
## 后处理脚本
POST_SCRIPT := apps/bsp/cpu/br35/post_build/download.sh
RUN_POST_SCRIPT := bash $(POST_SCRIPT)
endif
CC := $(TOOL_DIR)/$(CC)
CXX := $(TOOL_DIR)/$(CXX)
LD := $(TOOL_DIR)/$(LD)
AR := $(TOOL_DIR)/$(AR)
# 输出文件设置
OUT_ELF := apps/bsp/cpu/br35/post_build/p11.elf
OBJ_FILE := $(OUT_ELF).objs.txt
# 编译路径设置
BUILD_DIR := objs
# 编译参数设置
CFLAGS := \
-flto \
-target q32s \
-integrated-as \
-fno-builtin \
-mllvm -inline-threshold=5 \
-Oz \
-integrated-as \
-g \
-O0 \
-flto \
-Os \
-Wcast-align \
-Wall \
-fallow-pointer-null \
-Wincompatible-pointer-types \
-fprefer-gnu-section \
-Werror=undef \
-Wframe-larger-than=32 \
-Werror=incompatible-pointer-types \
-Werror=return-type \
-Werror=implicit-function-declaration \
-Wno-unused-variable \
-Wno-unused-function \
-Wno-cast-align \
-Werror \
# C++额外的编译参数
CXXFLAGS :=
# 宏定义
DEFINES := \
-D__GCC_Q32S__ \
-DPMU_SYSTEM \
-DCONFIG_FPGA_ENABLE \
DEFINES += $(EXT_CFLAGS) # 额外的一些定义
# 头文件搜索路径
INCLUDES := \
-Iapps \
-Iapps/bsp/cpu/br35/config \
-Iinclude/driver \
-Iinclude/driver/cpu/br35 \
-Iinclude/system \
-Iinclude/system/typedef \
-Iinclude/system/cpu/br35 \
-Iinclude/utils \
-Iapps/sensor \
-Iapps/sensor/driver_vc_hr_11 \
-I$(SYS_INC_DIR) \
# 需要编译的 .c 文件
c_SRC_FILES := \
apps/bsp/cpu/br35/bsp.c \
apps/bsp/cpu/br35/clock.c \
apps/bsp/cpu/br35/config/lib_config.c \
apps/bsp/cpu/br35/config/log_config.c \
apps/bsp/cpu/br35/iic_api.c \
apps/bsp/cpu/br35/iic_soft.c \
apps/bsp/cpu/br35/ipc_spin_lock.c \
apps/bsp/cpu/br35/power/power_app.c \
apps/bsp/cpu/br35/power/power_config.c \
apps/bsp/cpu/br35/setup.c \
apps/bsp/cpu/br35/uart.c \
apps/debug/debug.c \
apps/main.c \
apps/msg/msg.c \
apps/sensor/driver_mmc5603/driver_mmc5603.c \
apps/sensor/driver_sc7a20/driver_sc7a20.c \
apps/sensor/driver_vc_hr_11/driver_vc_hr_11.c \
apps/sensor/driver_vc_hr_11/vcHr11Hci.c \
apps/sensor/sensor_driver.c \
apps/sensor/sensor_service_wrist_tilt.c \
# 需要编译的 .S 文件
S_SRC_FILES :=
# 需要编译的 .s 文件
s_SRC_FILES :=
# 需要编译的 .cpp 文件
cpp_SRC_FILES :=
# 需要编译的 .cc 文件
cc_SRC_FILES :=
# 需要编译的 .cxx 文件
cxx_SRC_FILES :=
# 链接参数
LFLAGS := \
--plugin-opt=-inline-threshold=5 \
--plugin-opt=save-temps \
--plugin-opt=-inline-normal-into-special-section=true \
--plugin-opt=-dont-used-symbol-list=malloc,free,sprintf,printf,puts,putchar \
--sort-common \
--plugin-opt=-warn-stack-size=32 \
--start-group \
apps/bsp/cpu/br35/liba/system.a \
apps/bsp/cpu/br35/liba/cpu.a \
apps/bsp/cpu/br35/liba/utils.a \
apps/bsp/cpu/br35/liba/sensor_algorithm_jl_gesture.a \
--end-group \
-Tapps/bsp/cpu/br35/p11.ld \
-M=apps/bsp/cpu/br35/post_build/p11.map \
-flto \
--plugin-opt=-inline-threshold=5 \
LIBPATHS := \
-L$(SYS_LIB_DIR) \
LIBS := \
$(SYS_LIB_DIR)/libm.a \
$(SYS_LIB_DIR)/libc.a \
$(SYS_LIB_DIR)/libm.a \
$(SYS_LIB_DIR)/libcompiler-rt.a \
c_OBJS := $(c_SRC_FILES:%.c=%.c.o)
S_OBJS := $(S_SRC_FILES:%.S=%.S.o)
s_OBJS := $(s_SRC_FILES:%.s=%.s.o)
cpp_OBJS := $(cpp_SRC_FILES:%.cpp=%.cpp.o)
cxx_OBJS := $(cxx_SRC_FILES:%.cxx=%.cxx.o)
cc_OBJS := $(cc_SRC_FILES:%.cc=%.cc.o)
OBJS := $(c_OBJS) $(S_OBJS) $(s_OBJS) $(cpp_OBJS) $(cxx_OBJS) $(cc_OBJS)
DEP_FILES := $(OBJS:%.o=%.d)
OBJS := $(addprefix $(BUILD_DIR)/, $(OBJS))
DEP_FILES := $(addprefix $(BUILD_DIR)/, $(DEP_FILES))
VERBOSE ?= 0
ifeq ($(VERBOSE), 1)
QUITE :=
else
QUITE := @
endif
# 一些旧的 make 不支持 file 函数,需要 make 的时候指定 LINK_AT=0 make
LINK_AT ?= 1
# 表示下面的不是一个文件的名字,无论是否存在 all, clean, pre_build 这样的文件
# 还是要执行命令
# see: https://www.gnu.org/software/make/manual/html_node/Phony-Targets.html
.PHONY: all clean pre_build
# 不要使用 make 预设置的规则
# see: https://www.gnu.org/software/make/manual/html_node/Suffix-Rules.html
.SUFFIXES:
all: pre_build $(OUT_ELF)
$(info +POST-BUILD)
$(QUITE) $(RUN_POST_SCRIPT) p11
pre_build:
$(info +PRE-BUILD)
$(QUITE) $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -D__LD__ -E -P apps/bsp/cpu/br35/p11_ld.c -o apps/bsp/cpu/br35/p11.ld
clean:
$(QUITE) $(RM) $(OUT_ELF)
$(QUITE) $(RM) $(BUILD_DIR)
ifeq ($(LINK_AT), 1)
$(OUT_ELF): $(OBJS)
$(info +LINK $@)
$(shell $(MKDIR) $(@D))
$(file >$(OBJ_FILE), $(OBJS))
$(QUITE) $(LD) -o $(OUT_ELF) @$(OBJ_FILE) $(LFLAGS) $(LIBPATHS) $(LIBS)
else
$(OUT_ELF): $(OBJS)
$(info +LINK $@)
$(shell $(MKDIR) $(@D))
$(QUITE) $(LD) -o $(OUT_ELF) $(OBJS) $(LFLAGS) $(LIBPATHS) $(LIBS)
endif
$(BUILD_DIR)/%.c.o : %.c
$(info +CC $<)
$(QUITE) $(MKDIR) $(@D)
$(QUITE) $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -MMD -MF $(@:.o=.d) -c $< -o $@
$(BUILD_DIR)/%.S.o : %.S
$(info +AS $<)
$(QUITE) $(MKDIR) $(@D)
$(QUITE) $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -MMD -MF $(@:.o=.d) -c $< -o $@
$(BUILD_DIR)/%.s.o : %.s
$(info +AS $<)
$(QUITE) $(MKDIR) $(@D)
$(QUITE) $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -MMD -MF $(@:.o=.d) -c $< -o $@
$(BUILD_DIR)/%.cpp.o : %.cpp
$(info +CXX $<)
$(QUITE) $(MKDIR) $(@D)
$(QUITE) $(CXX) $(CXXFLAGS) $(CFLAGS) $(DEFINES) $(INCLUDES) -MMD -MF $(@:.o=.d) -c $< -o $@
$(BUILD_DIR)/%.cxx.o : %.cxx
$(info +CXX $<)
$(QUITE) $(MKDIR) $(@D)
$(QUITE) $(CXX) $(CXXFLAGS) $(CFLAGS) $(DEFINES) $(INCLUDES) -MMD -MF $(@:.o=.d) -c $< -o $@
$(BUILD_DIR)/%.cc.o : %.cc
$(info +CXX $<)
$(QUITE) $(MKDIR) $(@D)
$(QUITE) $(CXX) $(CXXFLAGS) $(CFLAGS) $(DEFINES) $(INCLUDES) -MMD -MF $(@:.o=.d) -c $< -o $@
-include $(DEP_FILES)
+11
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@@ -0,0 +1,11 @@
#include "includes.h"
#include "bsp.h"
#include "iic_api.h"
void bsp_init()
{
#if P11_HW_IIC_EN
hw_iic_master_module_init();
#endif//P11_HW_IIC_EN
}
+50
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@@ -0,0 +1,50 @@
#include "includes.h"
#include "timer.h"
void clock_early_init()
{
if (M2P_LRC24M_MODE) {
//P11_SYS_CLK_SEL(P11_SYS_CLK_BTOSC_24M);
//P11_SYS_CLK_SEL(P11_SYS_CLK_LRC24M);
P11_SYS_CLK_SEL(P11_SYS_CLK_RC16M);
#if 0
//PB0 OUT
P11_PORT->PB_DIR &= ~BIT(0);
P11_PORT->PB_SEL |= BIT(0);
//och0 sysclk
SFR(P11_PORT->OCH_CON0, 0, 4, 7);
//crossbar och0
P11_OMAP->P11_PB0_OUT = P11_FO_GP_OCH0;
while (1);
#endif
}
//std12M 输出
SFR(P11_CLOCK->CLK_CON1, 15, 2, 1); //MSYS_BT24M --> P11_BT24M
SFR(P11_CLOCK->CLK_CON1, 17, 3, 1); //STD12M sel P11_BT24M input
SFR(P11_CLOCK->CLK_CON1, 20, 2, 0); // div0
SFR(P11_CLOCK->CLK_CON1, 22, 2, 1); // div1
}
static void clock_switch_lrc24m()
{
printf("fun: %s\n", __FUNCTION__);
P11_SYS_CLK_SEL(P11_SYS_CLK_LRC24M);
uart_clk_sel(UART_CLK_SYS_CLK);
}
static void clock_msg_handler(void *priv, u8 *msg, u32 len)
{
switch (msg[0]) {
case MSG_CLOCK_LRC24M_OK:
clock_switch_lrc24m();
timer_set_clock_source(GPTIMER_CLK_SRC_LRC_24M);
break;
}
}
REGISTER_M2P_MSG_HANDLER(0, MSG_CLOCK, clock_msg_handler);
@@ -0,0 +1,4 @@
#include "includes.h"
const int LIB_CONFIG_LPCTMU_ENABLE = CONFIG_LPCTMU_ENABLE;
const int LIB_CONFIG_EXCEPTION_RESET_ENABLE = !CONFIG_UART_DEBUG_ENABLE;
@@ -0,0 +1,7 @@
#ifndef __LIB_CONFIG_H__
#define __LIB_CONFIG_H__
extern const int LIB_CONFIG_LPCTMU_ENABLE;
extern const int LIB_CONFIG_EXCEPTION_RESET_ENABLE;
#endif
@@ -0,0 +1,35 @@
#include "sdk_config.h"
#include "includes.h"
#ifdef CONFIG_UART_DEBUG_ENABLE
const char libs_debug AT(.LOG_TAG_CONST) = TRUE; //打印总开关
#else
const char libs_debug AT(.LOG_TAG_CONST) = FALSE; //打印总开关
#endif
#define CONFIG_DEBUG_LIBS(X) (X & libs_debug)
const char log_tag_const_i_MAIN AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_d_MAIN AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_e_MAIN AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_i_UBOOT AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_d_UBOOT AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_e_UBOOT AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_i_UPGRADE AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_d_UPGRADE AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_e_UPGRADE AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_i_FLASH AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_d_FLASH AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_e_FLASH AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_i_FS AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_d_FS AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_e_FS AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_i_SFC AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_d_SFC AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
const char log_tag_const_e_SFC AT(.LOG_TAG_CONST) = CONFIG_DEBUG_LIBS(0);
@@ -0,0 +1,55 @@
#ifndef __APP_CONFIG_H__
#define __APP_CONFIG_H__
//==========================================================//
// 串口打印使能开关 //
//==========================================================//
#define CONFIG_UART_DEBUG_ENABLE 0
#define CONFIG_DEBUG_UART_TX_PIN IO_PORTB_00
#define CONFIG_DEBUG_UART_BAUD 115200L
//==========================================================//
// 低功耗触摸 //
//==========================================================//
#define CONFIG_LPCTMU_ENABLE 0
//==========================================================//
// SENSOR驱动 //
//==========================================================//
#define CONFIG_SENSOR_DRIVER_ENABLE 0
#define CONFIG_SENSOR_SLEEP_ENABLE 0 //自动让SENSOR睡眠,需要SENSOR支持唤醒检测并IO中断唤醒MCU
#define TCFG_SC7A20_ENABLE 0
#define TCFG_MMC5603_ENABLE 0
#define TCFG_VCHR11S_ENABLE 0
#define TCFG_HRS3602_ENABLE 0
#define TCFG_HR_SENSOR_READ_BY_INT 0
//==========================================================//
// soft iic //
//==========================================================//
#define TCFG_SW_I2C0_CLK_PORT IO_PORTB_02 //spft IIC CLK
#define TCFG_SW_I2C0_DAT_PORT IO_PORTB_01 //spft IIC DAT
#define TCFG_SW_I2C0_DELAY_CNT 1 //软件IIC延时参数,影响通讯时钟频率
//========================================================== //
// hw iic //
//==========================================================//
#define P11_HW_IIC_EN 0
#define P11_HW_IIC_SCL IO_PORTB_02
#define P11_HW_IIC_SDA IO_PORTB_01
#define P11_HW_IIC_FREQ (400*1000)
#define P11_HW_IIC_PU_EN 1
#endif
+407
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@@ -0,0 +1,407 @@
#ifdef SUPPORT_MS_EXTENSIONS
#pragma bss_seg(".iic.bss")
#pragma data_seg(".iic.data")
#pragma const_seg(".iic.const")
#pragma code_seg(".iic.text")
#pragma str_literal_override(".iic.text")
#endif /* #ifdef SUPPORT_MS_EXTENSIONS */
#include "includes.h"
#include "sdk_config.h"
#include "gpio.h"
#include "iic_api.h"
/******************************soft iic*****************************/
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: <0:error, =read_len:ok
int soft_i2c_master_read_nbytes_from_device_reg(soft_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *read_buf, int read_len)//缓存buf,读取长度
{
u8 ack;
int ret = 0;
if (soft_iic_check_busy(iic) != IIC_OK) { //busy
ret = IIC_ERROR_BUSY; //busy
goto _read_exit2;
}
soft_iic_start(iic);
if ((reg_addr != NULL) && (reg_len != 0)) {
ack = soft_iic_tx_byte(iic, dev_addr & 0xfe);
if (ack == 0) {
printf("<err>:dev_addr no ack!\n");
ret = IIC_ERROR_DEV_ADDR_ACK_ERROR; //无应答
goto _read_exit1;
}
for (u8 i = 0; i < reg_len; i++) {
ack = soft_iic_tx_byte(iic, reg_addr[i]);
if (ack == 0) {
printf("<err>:reg_addr no ack!\n");
ret = IIC_ERROR_REG_ADDR_ACK_ERROR; //无应答
goto _read_exit1;
}
}
soft_iic_start(iic);
}
ack = soft_iic_tx_byte(iic, dev_addr | BIT(0));
if (ack == 0) {
printf("<err>:dev_addr no ack!\n");
ret = IIC_ERROR_DEV_ADDR_ACK_ERROR; //无应答
goto _read_exit1;
}
ret = soft_iic_read_buf(iic, read_buf, read_len);
_read_exit1:
soft_iic_stop(iic);
_read_exit2:
return ret;
}
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: =write_len:ok, other:error
int soft_i2c_master_write_nbytes_to_device_reg(soft_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *write_buf, int write_len)//数据buf, 写入长度
{
int res;
u8 ack;
if (soft_iic_check_busy(iic) != IIC_OK) { //busy
res = IIC_ERROR_BUSY; //busy
goto _write_exit2;
}
soft_iic_start(iic);
ack = soft_iic_tx_byte(iic, dev_addr);
if (ack == 0) {
printf("<err>:dev_addr no ack!\n");
res = IIC_ERROR_DEV_ADDR_ACK_ERROR; //无应答
goto _write_exit1;
}
if ((reg_addr != NULL) && (reg_len != 0)) {
for (u8 i = 0; i < reg_len; i++) {
ack = soft_iic_tx_byte(iic, reg_addr[i]);
if (ack == 0) {
printf("<err>:reg_addr no ack!\n");
res = IIC_ERROR_REG_ADDR_ACK_ERROR; //无应答
goto _write_exit1;
}
}
}
for (res = 0; res < write_len; res++) {
if (0 == soft_iic_tx_byte(iic, write_buf[res])) {
printf("<err>:write data no ack!\n");
goto _write_exit1;
}
}
_write_exit1:
soft_iic_stop(iic);
_write_exit2:
return res;
}
/******************************hw iic master*****************************/
#define HW_IIC_MASTER_ISR_MODE_SEL 0 //1:中断模式,0:轮询
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: other:error, =read_len:ok
int hw_i2c_master_read_nbytes_from_device_reg(hw_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *read_buf, int read_len)//缓存buf,读取长度
{
#if HW_IIC_MASTER_ISR_MODE_SEL && HW_IIC_MASTER_ISR_EN
#if defined(P11_HW_IIC_NUM)&&P11_HW_IIC_NUM
if (iic != HW_P11_IIC_0)
#endif
{
struct hw_iic_master_isr_transmit iic_isr_info = {
.dev_addr = dev_addr & 0xfe,
.restart_flag = 1,
.reg_buf = reg_addr,
.reg_len = reg_len,
.data_buf = read_buf,
.rx_len = read_len,
.tx_len = 0,
};
if ((reg_addr == NULL) || (reg_len == 0)) {
iic_isr_info .dev_addr = dev_addr | BIT(0);
iic_isr_info .restart_flag = 0;
}
enum iic_state_enum iic_sta = hw_iic_master_isr_transmit_cfg(iic, &iic_isr_info, 20);//byte间隔超时20:20*30ms
if (iic_sta != IIC_OK) {
log_error("iic%d isr sta:%d\n", iic, iic_sta);
if (iic_sta == IIC_ERROR_MASTER_ERROR) {
hw_iic_reset(iic);
}
return iic_sta;
}
return iic_isr_info.xfer_postion;
}
#endif
u8 ack;
int ret = 0;
if (hw_iic_check_busy(iic) != IIC_OK) { //busy
ret = IIC_ERROR_BUSY; //busy
goto _read_exit2;
}
ret = hw_iic_start(iic);
if (ret < 0) {
printf("<err>:iic lock busy!%d\n", ret);
goto _read_exit2;
}
if ((reg_addr != NULL) && (reg_len != 0)) {
ack = hw_iic_tx_byte(iic, dev_addr & 0xfe);
if (ack == 0) {
printf("<err>:dev_addr no ack!\n");
ret = IIC_ERROR_DEV_ADDR_ACK_ERROR; //无应答
goto _read_exit1;
}
for (u8 i = 0; i < reg_len; i++) {
ack = hw_iic_tx_byte(iic, reg_addr[i]);
if (ack == 0) {
printf("<err>:reg_addr no ack!\n");
ret = IIC_ERROR_REG_ADDR_ACK_ERROR; //无应答
goto _read_exit1;
}
}
hw_iic_start(iic);
}
ack = hw_iic_tx_byte(iic, dev_addr | BIT(0));
if (ack == 0) {
printf("<err>:dev_addr no ack!\n");
ret = IIC_ERROR_DEV_ADDR_ACK_ERROR; //无应答
goto _read_exit1;
}
ret = hw_iic_read_buf(iic, read_buf, read_len);
_read_exit1:
hw_iic_stop(iic);
if (ret != read_len) {
hw_iic_err_reset(iic);
hw_iic_reset(iic);
}
_read_exit2:
return ret;
}
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: =write_len:ok, other:error
int hw_i2c_master_write_nbytes_to_device_reg(hw_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *write_buf, int write_len)//数据buf, 写入长度
{
#if HW_IIC_MASTER_ISR_EN
#if defined(P11_HW_IIC_NUM)&&P11_HW_IIC_NUM
if (iic != HW_P11_IIC_0)
#endif
{
struct hw_iic_master_isr_transmit iic_isr_info = {
.dev_addr = dev_addr,
.restart_flag = 0,
.reg_buf = reg_addr,
.reg_len = reg_len,
.data_buf = write_buf,
.rx_len = 0,
.tx_len = write_len,
};
enum iic_state_enum iic_sta = hw_iic_master_isr_transmit_cfg(iic, &iic_isr_info, 20);//byte间隔超时20:20*30ms
if (iic_sta != IIC_OK) {
log_error("iic%d isr sta:%d\n", iic, iic_sta);
if (iic_sta == IIC_ERROR_MASTER_ERROR) {
hw_iic_reset(iic);
}
return iic_sta;
}
return iic_isr_info.xfer_postion;
}
#endif
int res;
u8 ack;
if (hw_iic_check_busy(iic) != IIC_OK) { //busy
res = IIC_ERROR_BUSY; //busy
goto _write_exit2;
}
res = hw_iic_start(iic);
if (res < 0) {
printf("<err>:iic lock busy!%d\n", res);
goto _write_exit2;
}
ack = hw_iic_tx_byte(iic, dev_addr);
if (ack == 0) {
printf("<err>:dev_addr no ack!\n");
res = IIC_ERROR_DEV_ADDR_ACK_ERROR; //无应答
goto _write_exit1;
}
if ((reg_addr != NULL) && (reg_len != 0)) {
for (u8 i = 0; i < reg_len; i++) {
ack = hw_iic_tx_byte(iic, reg_addr[i]);
if (ack == 0) {
printf("<err>:reg_addr no ack!\n");
res = IIC_ERROR_REG_ADDR_ACK_ERROR; //无应答
goto _write_exit1;
}
}
}
#if 0
for (res = 0; res < write_len; res++) {
if (0 == hw_iic_tx_byte(iic, write_buf[res])) {
printf("<err>:write data no ack!\n");
goto _write_exit1;
}
}
#else
res = hw_iic_write_buf(iic, write_buf, write_len);
#endif
_write_exit1:
hw_iic_stop(iic);
if (res != write_len) {
hw_iic_err_reset(iic);
hw_iic_reset(iic);
}
_write_exit2:
return res;
}
/******************************hw iic slave*****************************/
//rx协议:start,addr write,data0,data1,,,,,,stop
int hw_iic_slave_polling_rx(hw_iic_dev iic, u8 *rx_buf)
{
int rx_cnt = 0;
int rx_state = 0;
printf("--iic slave polling rx --\n");
local_irq_disable();//关闭所有中断
rx_state = hw_iic_slave_rx_prepare(iic, 0, 600000);//1s
if (rx_state == IIC_SLAVE_RX_PREPARE_OK) { //rx
} else if (rx_state == IIC_SLAVE_RX_PREPARE_TIMEOUT) { //error
printf("<err>:iic slave wait addr timeout!\n");
local_irq_enable();
return 0;
} else if (rx_state == IIC_SLAVE_RX_PREPARE_END_OK) { //end
printf("<err>:iic slave wait end!\n");
local_irq_enable();
return 0;
}
rx_state = hw_iic_slave_rx_byte(iic, &rx_buf[0]);//addr
if (rx_state >= IIC_SLAVE_RX_ADDR_RX) { //rx
} else if (rx_state == IIC_SLAVE_RX_ADDR_NO_MATCH) { //error
printf("<err>:iic slave rx addr error!\n");
local_irq_enable();
return 0;
} else if (rx_state == IIC_SLAVE_RX_ADDR_TX) { //tx
}
rx_state = hw_iic_slave_rx_prepare(iic, 1, 100000);//1s, 1:收到数据应答
if (rx_state == IIC_SLAVE_RX_PREPARE_OK) { //rx
} else if (rx_state == IIC_SLAVE_RX_PREPARE_TIMEOUT) { //error
printf("<err>:iic slave wait reg timeout!\n");
local_irq_enable();
return 0;
} else if (rx_state == IIC_SLAVE_RX_PREPARE_END_OK) { //end
printf("iic slave wait end!\n");
local_irq_enable();
return 0;
}
rx_cnt = hw_iic_slave_rx_nbyte(iic, &rx_buf[1]);
local_irq_enable();
/* printf("rx addr:%x, slave addr:%x\n", rx_buf[0], hw_iic_slave_get_addr(iic)); */
rx_cnt++;
/* log_info_hexdump(rx_buf, rx_cnt); */
printf("~~~~~iic rx polling end~~~~~\n");
memset(rx_buf, 0, rx_cnt);
return rx_cnt;
}
//tx协议:start,addr read,data0,data1,,,,,nack,stop
int hw_iic_slave_polling_tx(hw_iic_dev iic, u8 *tx_buf)
{
u8 slave_rx_data[3] = {0, 0, 0};
int rx_cnt = 0, tx_cnt = 0;
int rx_state = 0;
printf("--iic slave polling tx --\n");
local_irq_disable();//关闭所有中断
rx_state = hw_iic_slave_rx_prepare(iic, 0, 600000);//1s
if (rx_state == IIC_SLAVE_RX_PREPARE_OK) { //rx
} else if (rx_state == IIC_SLAVE_RX_PREPARE_TIMEOUT) { //error
printf("<err>:iic slave wait addr timeout!\n");
local_irq_enable();
return 0;
} else if (rx_state == IIC_SLAVE_RX_PREPARE_END_OK) { //end
printf("<err>:iic slave wait end!\n");
local_irq_enable();
return 0;
}
rx_state = hw_iic_slave_rx_byte(iic, &slave_rx_data[rx_cnt++]);//addr
if (rx_state >= IIC_SLAVE_RX_ADDR_RX) { //rx
} else if (rx_state == IIC_SLAVE_RX_ADDR_TX) { //tx
hw_iic_slave_tx_byte(iic, tx_buf[tx_cnt++]);
goto _tx_strat;
} else { //error
printf("<err>:iic slave rx addr error!\n");
local_irq_enable();
return 0;
}
_tx_strat:
tx_cnt = hw_iic_slave_tx_nbyte(iic, &tx_buf[tx_cnt]);
local_irq_enable();
/* printf("rx0 addr:%x, slave addr:%x\n", slave_rx_data[0], hw_iic_slave_get_addr(iic)); */
/* log_info_hexdump(slave_rx_data, rx_cnt); */
printf("~~~~~iic tx polling end~~~~~\n");
return tx_cnt + 1; //ok
}
void hw_iic_master_module_init()
{
struct iic_master_config hw_iic_config = {
.role = IIC_MASTER,
.scl_io = P11_HW_IIC_SCL,
.sda_io = P11_HW_IIC_SDA,
.io_mode = P11_HW_IIC_PU_EN ,//1:上拉或0:浮空
.hdrive = PORT_DRIVE_STRENGT_2p4mA, //enum GPIO_HDRIVE 0:2.4MA, 1:8MA, 2:26.4MA, 3:40MA
.master_frequency = P11_HW_IIC_FREQ , //软件iic频率不准(hz)
.io_filter = 1, //软件无效
.ie_en = 0,//1:注册中断
.irq_priority = 3,//优先级
};
hw_iic_dev iic_dev = HW_IIC_0;
hw_iic_init(HW_IIC_0, &hw_iic_config);
}
+390
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@@ -0,0 +1,390 @@
#ifdef SUPPORT_MS_EXTENSIONS
#pragma bss_seg(".iic.bss")
#pragma data_seg(".iic.data")
#pragma const_seg(".iic.const")
#pragma code_seg(".iic.text")
#pragma str_literal_override(".iic.text")
#endif /* #ifdef SUPPORT_MS_EXTENSIONS */
#include "includes.h"
#include "gpio.h"
#include "iic_soft.h"
static u8 soft_iic_state[MAX_SOFT_IIC_NUM];
static struct iic_master_config soft_iic_cfg_cache[MAX_SOFT_IIC_NUM];
//input pull up
#define IIC_SCL_H(scl) \
gpio_set_direction(scl, 1)
#define IIC_SCL_L(scl) \
gpio_set_direction(scl, 0); \
gpio_set_output_value(scl, 0)
#define IIC_SDA_DIR(sda, val) \
gpio_set_direction(sda, val)
//input pull up
#define IIC_SDA_H(sda) \
gpio_set_direction(sda, 1)
#define IIC_SDA_L(sda) \
gpio_set_direction(sda, 0); \
gpio_set_output_value(sda, 0)
#define IIC_SDA_READ(sda) \
gpio_read(sda)
#define soft_iic_delay(num) \
delay_cnt= num; \
while (delay_cnt--) { \
asm("nop"); \
}
static inline u32 iic_get_delay(soft_iic_dev iic)
{
u32 hsb_clk = 16000000;//clk_get("sys");
u32 delay_num = 0;
return delay_num;
}
extern const struct iic_master_config soft_iic_cfg_const[MAX_SOFT_IIC_NUM];
struct iic_master_config *get_soft_iic_config(soft_iic_dev iic)
{
return (struct iic_master_config *)&soft_iic_cfg_const[iic];
}
enum iic_state_enum soft_iic_init(soft_iic_dev iic, struct iic_master_config *i2c_config)
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
if (i2c_config == NULL) {
printf("error: soft iic%d param error!\n", iic);
return IIC_ERROR_PARAM_ERROR;
}
if (iic >= MAX_SOFT_IIC_NUM) {
printf("error: soft iic index:%d error!\n", iic);
return IIC_ERROR_INDEX_ERROR;
}
if ((soft_iic_state[iic]&BIT(7)) != 0) {
printf("error: soft iic%d has been occupied!\n", iic);
return IIC_ERROR_INIT_FAIL;
}
soft_iic_state[iic] = BIT(7);//init ok
memcpy(&soft_iic_cfg_cache[iic], i2c_config, sizeof(struct iic_master_config));
//freq:
if (i2c_config->io_mode) {//pull up
gpio_set_pull_up(i2c_config->scl_io, 1);
gpio_set_pull_up(i2c_config->sda_io, 1);
} else {
gpio_set_pull_up(i2c_config->scl_io, 0);
gpio_set_pull_up(i2c_config->sda_io, 0);
}
gpio_set_hd(i2c_config->scl_io, i2c_config->hdrive);
gpio_set_hd(i2c_config->sda_io, i2c_config->hdrive);
IIC_SDA_H(i2c_config->sda_io);
IIC_SCL_H(i2c_config->scl_io);
gpio_set_pull_down(i2c_config->scl_io, 0);
gpio_set_pull_down(i2c_config->sda_io, 0);
gpio_set_die(i2c_config->scl_io, 1);//en 1.1v
gpio_set_die(i2c_config->sda_io, 1);//en 1.1v
/* gpio_set_dieh(i2c_config->scl_io, 1);//en 3.3v */
/* gpio_set_dieh(i2c_config->sda_io, 1);//en 3.3v */
return IIC_OK;//ok
}
enum iic_state_enum soft_iic_deinit(soft_iic_dev iic)
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
if (soft_iic_state[iic] == 0) {
printf("error: soft iic%d has been no init!\n", iic);
return IIC_ERROR_NO_INIT;
}
soft_iic_state[iic] = 0;//no init
gpio_set_direction(soft_iic_cfg_cache[iic].scl_io, 1);
gpio_set_direction(soft_iic_cfg_cache[iic].sda_io, 1);
gpio_set_pull_up(soft_iic_cfg_cache[iic].scl_io, 0);
gpio_set_pull_up(soft_iic_cfg_cache[iic].sda_io, 0);
gpio_set_die(soft_iic_cfg_cache[iic].scl_io, 0);
gpio_set_die(soft_iic_cfg_cache[iic].sda_io, 0);
/* gpio_set_dieh(i2c_config->scl_io, 0);//en 3.3v */
/* gpio_set_dieh(i2c_config->sda_io, 0);//en 3.3v */
gpio_set_hd(soft_iic_cfg_cache[iic].scl_io, PORT_DRIVE_STRENGT_2p4mA);
gpio_set_hd(soft_iic_cfg_cache[iic].sda_io, PORT_DRIVE_STRENGT_2p4mA);
return IIC_OK;//ok
}
enum iic_state_enum soft_iic_suspend(soft_iic_dev iic)
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
if ((soft_iic_state[iic] & 0xc0) != 0x80) {
printf("error: soft iic%d is no init or suspend!\n", iic);
return IIC_ERROR_SUSPEND_FAIL;
}
if ((soft_iic_state[iic] & 0x3f) != 0) {
printf("error: soft iic%d is busy!\n", iic);
return IIC_ERROR_BUSY;
}
soft_iic_state[iic] |= BIT(6);//suspend ok
gpio_set_direction(soft_iic_cfg_cache[iic].scl_io, 1);
gpio_set_direction(soft_iic_cfg_cache[iic].sda_io, 1);
gpio_set_pull_up(soft_iic_cfg_cache[iic].scl_io, 0);
gpio_set_pull_up(soft_iic_cfg_cache[iic].sda_io, 0);
gpio_set_die(soft_iic_cfg_cache[iic].scl_io, 0);
gpio_set_die(soft_iic_cfg_cache[iic].sda_io, 0);
/* gpio_set_dieh(i2c_config->scl_io, 0);//en 3.3v */
/* gpio_set_dieh(i2c_config->sda_io, 0);//en 3.3v */
gpio_set_hd(soft_iic_cfg_cache[iic].scl_io, PORT_DRIVE_STRENGT_2p4mA);
gpio_set_hd(soft_iic_cfg_cache[iic].sda_io, PORT_DRIVE_STRENGT_2p4mA);
return IIC_OK;//ok
}
enum iic_state_enum soft_iic_resume(soft_iic_dev iic)
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
if ((soft_iic_state[iic] & 0xc0) != 0xc0) {
printf("error: soft iic%d is no init or no suspend!\n", iic);
return IIC_ERROR_RESUME_FAIL;
}
soft_iic_state[iic] &= ~ BIT(6); //resume ok
if (soft_iic_cfg_cache[iic].io_mode) {//pull up
gpio_set_pull_up(soft_iic_cfg_cache[iic].scl_io, 1);
gpio_set_pull_up(soft_iic_cfg_cache[iic].sda_io, 1);
} else {
gpio_set_pull_up(soft_iic_cfg_cache[iic].scl_io, 0);
gpio_set_pull_up(soft_iic_cfg_cache[iic].sda_io, 0);
}
gpio_set_hd(soft_iic_cfg_cache[iic].scl_io, soft_iic_cfg_cache[iic].hdrive);
gpio_set_hd(soft_iic_cfg_cache[iic].sda_io, soft_iic_cfg_cache[iic].hdrive);
IIC_SDA_H(soft_iic_cfg_cache[iic].sda_io);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
gpio_set_pull_down(soft_iic_cfg_cache[iic].scl_io, 0);
gpio_set_pull_down(soft_iic_cfg_cache[iic].sda_io, 0);
gpio_set_die(soft_iic_cfg_cache[iic].scl_io, 1);
gpio_set_die(soft_iic_cfg_cache[iic].sda_io, 1);
/* gpio_set_dieh(i2c_config->scl_io, 1);//en 3.3v */
/* gpio_set_dieh(i2c_config->sda_io, 1);//en 3.3v */
return IIC_OK;//ok
}
//return:0:error, 1:ok
enum iic_state_enum soft_iic_check_busy(soft_iic_dev iic)
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
if (soft_iic_state[iic] & 0x0f) {
return IIC_ERROR_BUSY;//error
}
soft_iic_state[iic]++;//busy
return IIC_OK;//ok
}
void soft_iic_idle(soft_iic_dev iic)
{
soft_iic_state[iic] &= 0xf0;//idle
}
enum iic_state_enum soft_iic_start(soft_iic_dev iic)
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
/* printf("soft_iic_init hsb clock:%d, delay cnt:%d\n",clk_get("sys"),dly_t); */
IIC_SDA_H(soft_iic_cfg_cache[iic].sda_io);
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t * 2);
IIC_SDA_L(soft_iic_cfg_cache[iic].sda_io);
soft_iic_delay(dly_t);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
return IIC_OK;//ok
}
void soft_iic_stop(soft_iic_dev iic)
{
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
IIC_SDA_L(soft_iic_cfg_cache[iic].sda_io);
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t * 2);
IIC_SDA_H(soft_iic_cfg_cache[iic].sda_io);
soft_iic_delay(dly_t);
soft_iic_idle(iic);
}
void soft_iic_reset(soft_iic_dev iic)//同iic_v2
{
ASSERT(iic < MAX_SOFT_IIC_NUM, "iic > MAX_SOFT_IIC_NUM");
soft_iic_start(iic);
soft_iic_stop(iic);
soft_iic_idle(iic);
}
static u8 soft_iic_check_ack(soft_iic_dev iic)
{
u8 ack;
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
IIC_SDA_DIR(soft_iic_cfg_cache[iic].sda_io, 1);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
if (IIC_SDA_READ(soft_iic_cfg_cache[iic].sda_io) == 0) {
ack = 1;
} else {
ack = 0;
}
soft_iic_delay(dly_t);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
IIC_SDA_DIR(soft_iic_cfg_cache[iic].sda_io, 0);
IIC_SDA_L(soft_iic_cfg_cache[iic].sda_io);
return ack;//1:有应答, 0:无
}
static void soft_iic_rx_ack(soft_iic_dev iic)
{
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
IIC_SDA_L(soft_iic_cfg_cache[iic].sda_io);
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t * 2);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
}
static void soft_iic_rx_nack(soft_iic_dev iic)
{
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
IIC_SDA_H(soft_iic_cfg_cache[iic].sda_io);
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t * 2);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
}
u8 soft_iic_tx_byte(soft_iic_dev iic, u8 byte)
{
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
local_irq_disable();
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
for (u32 i = 0; i < 8; i++) { //MSB FIRST
if ((byte << i) & 0x80) {
IIC_SDA_H(soft_iic_cfg_cache[iic].sda_io);
} else {
IIC_SDA_L(soft_iic_cfg_cache[iic].sda_io);
}
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t * 2);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
}
u8 ack = soft_iic_check_ack(iic);//1:有应答, 0:无
local_irq_enable();
return ack;
}
u8 soft_iic_rx_byte(soft_iic_dev iic, u8 ack, s8 *err)
{
u32 delay_cnt;
u32 dly_t = iic_get_delay(iic);
u8 byte = 0;
local_irq_disable();
IIC_SDA_DIR(soft_iic_cfg_cache[iic].sda_io, 1);
for (u32 i = 0; i < 8; i++) {
soft_iic_delay(dly_t);
IIC_SCL_H(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
byte = byte << 1;
if (IIC_SDA_READ(soft_iic_cfg_cache[iic].sda_io)) {
byte |= 1;
}
soft_iic_delay(dly_t);
IIC_SCL_L(soft_iic_cfg_cache[iic].scl_io);
soft_iic_delay(dly_t);
}
IIC_SDA_DIR(soft_iic_cfg_cache[iic].sda_io, 0);
if (ack) {
soft_iic_rx_ack(iic);
} else {
soft_iic_rx_nack(iic);
}
local_irq_enable();
if (err) {
*err = IIC_OK;
}
return byte;
}
//return: =len:ok
int soft_iic_read_buf(soft_iic_dev iic, void *buf, int len)
{
int i = 0;
if (!buf || !len) {
return IIC_ERROR_PARAM_ERROR;
}
for (i = 0; i < len - 1; i++) {
((u8 *)buf)[i] = soft_iic_rx_byte(iic, 1, NULL);
}
((u8 *)buf)[len - 1] = soft_iic_rx_byte(iic, 0, NULL);
return len;
}
//return: =len:ok
int soft_iic_write_buf(soft_iic_dev iic, const void *buf, int len)
{
int i;
u8 ack;
if (!buf || !len) {
return IIC_ERROR_PARAM_ERROR;
}
for (i = 0; i < len; i++) {
ack = soft_iic_tx_byte(iic, ((u8 *)buf)[i]);
if (ack == 0) {
break;
}
}
return i;
}
@@ -0,0 +1,38 @@
#include "includes.h"
#include "ipc_spin_lock.h"
void ipc_spin_lock_init()
{
for (u8 i = 0; i < 16; i++) {
P11_RESLOCK->LOCK[i] = 0;
}
}
volatile u16 ipc_debug_bit;
AT(.ipc_spin_lock.text.cache.L1)
__attribute__((noinline))
void ipc_spin_lock(enum ipc_spin_lock_event event)//0~15
{
ASSERT(event <= 15);
if (cpu_in_irq()) {
ipc_debug_bit |= BIT(event);
} else {
if (ipc_debug_bit & BIT(event)) {
ASSERT(cpu_irq_disable(), "%x\n", event);
}
}
while (P11_RESLOCK->LOCK[event]);
}
AT(.ipc_spin_lock.text.cache.L1)
__attribute__((noinline))
void ipc_spin_unlock(enum ipc_spin_lock_event event)//0~15
{
ASSERT(event <= 15);
P11_RESLOCK->LOCK[event] = 0;
}
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@@ -0,0 +1,185 @@
// *INDENT-OFF*
#include "p11_rom_stubs.ld"
#include "power/p11/p11_mmap.h"
/*
p11 memory地址图
0xf28000, end
0xf27fe0, poff ram, 0x20
0xf27f00, m2p_message, 0xe0
0xf27ec0, p2m_message, 0x40
0xf2xxxx, stack, 0x600
0xf2xxxx, bss
0xf20080, code/data
0xf20000, isr_vertor, 0x80
*/
MEMORY
{
p11_message_ram(rw) : ORIGIN = P2M_MESSAGE_RAM_BEGIN, LENGTH = (P2M_MESSAGE_SIZE+M2P_MESSAGE_SIZE)
msys_poweroff_ram(rw) : ORIGIN = MSYS_POFF_RAM_BEGIN, LENGTH = MSYS_POFF_RAM_SIZE
p11_ram0(rw) : ORIGIN = P11_RAM0_BEGIN, LENGTH = P11_RAM0_SIZE
}
ENTRY(_start)
SECTIONS
{
. = ORIGIN(p11_ram0);
.text ALIGN(32):
{
*startup.o(.text)
*(.text*)
*(.*.text)
*(.*.const)
*(.*.text)
*(.ipc_spin_lock.text.cache.L1)
. = ALIGN(4);
sensor_dev_begin = .;
KEEP(*(.sensor_dev))
sensor_dev_end = .;
. = ALIGN(4);
*(.rodata*)
#include "power/ld/power_text.ld"
. = ALIGN(4);
*(.*.data)
. = ALIGN(4);
*(.data*)
. = ALIGN(4);
} > p11_ram0
.data ALIGN(32):
{
/* *(.data*) */
} > p11_ram0
.bss ALIGN(4):
{
*(.bss)
*(.*.bss)
*(COMMON)
} > p11_ram0
.stack_bss ALIGN(32):
{
*(.stack_magic0)
PROVIDE(_stack_begin = .);
PROVIDE(_sstack_begin = .);
*(.sstack)
PROVIDE(_sstack_end = .);
PROVIDE(_ustack_begin = .);
*(.ustack)
PROVIDE(_ustack_end = .);
PROVIDE(_stack_end = .);
*(.stack_magic1)
} > p11_ram0
#if 0
PROVIDE(overlay_demo_begin = .);
OVERLAY : AT(0x200000) SUBALIGN(4)
{
.overlay_bank_demo_init
{
LONG(0xffffffff);
*(.demo.code.bank.0)
. = ALIGN(4);
}
.overlay_bank_demo_normal0
{
LONG(0xffffffff);
*(.demo.code.bank.1)
}
.overlay_bank_demo_normal1
{
LONG(0xffffffff);
*(.demo.code.bank.2)
}
} > p11_ram0
PROVIDE(overlay_demo_end = .);
PROVIDE(overlay_sensor_begin = .);
OVERLAY : AT(0x210000) SUBALIGN(4)
{
/* TODO: */
.overlay_bank_sensor_init
{
LONG(0xffffffff);
*(.sensor.code.bank.0)
. = ALIGN(4);
}
.overlay_bank_sensor_normal0
{
LONG(0xffffffff);
*(.sensor.code.bank.1)
}
.overlay_bank_sensor_normal1
{
LONG(0xffffffff);
*(.sensor.code.bank.2)
}
} > p11_ram0
PROVIDE(overlay_sensor_end = .);
PROVIDE(overlay_sys_begin = .);
OVERLAY : AT(0x220000) SUBALIGN(4)
{
/* TODO: */
.overlay_bank_sys_init
{
LONG(0xffffffff);
*(.sys.code.bank.0)
. = ALIGN(4);
}
.overlay_bank_sys_normal0
{
LONG(0xffffffff);
*(.sys.code.bank.1)
}
} > p11_ram0
PROVIDE(overlay_sys_end = .);
#endif
PROVIDE(p11_heap_begin = .);
p11_heap_end = P2M_MESSAGE_RAM_BEGIN;
. = ORIGIN(p11_message_ram);
.p11_message ALIGN(32):
{
*(.p2m_data)
*(.m2p_data)
} > p11_message_ram
. = ORIGIN(msys_poweroff_ram);
.p11_poweroff ALIGN(32):
{
*(.msys_poff_data)
} > msys_poweroff_ram
}
text_begin = ADDR(.text);
text_size = SIZEOF(.text);
text_end = text_begin + text_size;
bss_begin = ADDR(.bss);
bss_size = SIZEOF(.bss);
p11_message_begin = ADDR(.p11_message);
p11_message_size = SIZEOF(.p11_message);
data_addr = ADDR(.data);
data_begin = text_begin + text_size;
data_size = SIZEOF(.data);
@@ -0,0 +1,6 @@
idle = ABSOLUTE(0x8000);
standby = ABSOLUTE(0x8008);
standby_ext = ABSOLUTE(0x8012);
sleep_ext = ABSOLUTE(0x8030);
sleep = ABSOLUTE(0x804e);
deep_sleep = ABSOLUTE(0x8058);
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@@ -0,0 +1,103 @@
rem @echo off
@echo *****************************************************************
@echo SDK BR35 P11
@echo *****************************************************************
@echo %date%
cd %~dp0
set OBJDUMP=C:\JL\pi32\bin\llvm-objdump.exe
set OBJSIZEDUMP=C:\JL\pi32\bin\llvm-objsizedump.exe
set OBJCOPY=C:\JL\pi32\bin\llvm-objcopy.exe
set BANKLINK=.\BankLink.exe
set ELFFILE=p11.elf
REM %OBJDUMP% -D -address-mask=0x1ffffff -print-imm-hex -print-dbg %ELFFILE% > p11.lst
%OBJCOPY% -O binary -j .text %ELFFILE% text.bin
%OBJCOPY% -O binary -j .overlay_bank_demo_init %ELFFILE% bank_demo_init.bin
%OBJCOPY% -O binary -j .overlay_bank_demo_normal0 %ELFFILE% bank_demo_normal0.bin
%OBJCOPY% -O binary -j .overlay_bank_demo_normal1 %ELFFILE% bank_demo_normal1.bin
%OBJCOPY% -O binary -j .overlay_bank_demo_normal2 %ELFFILE% bank_demo_normal2.bin
%OBJCOPY% -O binary -j .overlay_bank_sensor_init %ELFFILE% bank_sensor_init.bin
%OBJCOPY% -O binary -j .overlay_bank_sensor_normal0 %ELFFILE% bank_sensor_normal0.bin
%OBJCOPY% -O binary -j .overlay_bank_sensor_normal1 %ELFFILE% bank_sensor_normal1.bin
%OBJDUMP% -section-headers -address-mask=0x1ffffff %ELFFILE%
%OBJDUMP% -t %ELFFILE% > symbol_tbl.txt
%OBJSIZEDUMP% -dump-stack-size -enable-dbg-info %ELFFILE% > dump_stack_size.txt
%OBJSIZEDUMP% -dump-function-call -enable-dbg-info %ELFFILE% > dump_func_call.txt
set LZ4_PACKET=.\lz4_packet.exe
set bank_files=0x80 text.bin
%LZ4_PACKET% -input text.bin 0 -o text.lz4
set bank_lz4_files=0x80 text.lz4
for %%a in (bank_demo_init.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_demo_init.bin
%LZ4_PACKET% -input bank_demo_init.bin 0 -o bank_demo_init.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_demo_init.lz4
)
for %%a in (bank_demo_normal0.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_demo_normal0.bin
%LZ4_PACKET% -input bank_demo_normal0.bin 0 -o bank_demo_normal0.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_demo_normal0.lz4
)
for %%a in (bank_demo_normal1.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_demo_normal1.bin
%LZ4_PACKET% -input bank_demo_normal1.bin 0 -o bank_demo_normal1.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_demo_normal1.lz4
)
for %%a in (bank_sensor_init.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_sensor_init.bin
%LZ4_PACKET% -input bank_sensor_init.bin 0 -o bank_sensor_init.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_sensor_init.lz4
)
for %%a in (bank_sensor_normal0.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_sensor_normal0.bin
%LZ4_PACKET% -input bank_sensor_normal0.bin 0 -o bank_sensor_normal0.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_sensor_normal0.lz4
)
for %%a in (bank_sensor_normal1.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_sensor_normal1.bin
%LZ4_PACKET% -input bank_sensor_normal1.bin 0 -o bank_sensor_normal1.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_sensor_normal1.lz4
)
for %%a in (bank_sys_init.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_sys_init.bin
%LZ4_PACKET% -input bank_sys_init.bin 0 -o bank_sys_init.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_sys_init.lz4
)
for %%a in (bank_sys_normal0.bin) do if %%~za gtr 0 (
set bank_files=%bank_files% 0xAA55AA55 bank_sys_normal0.bin
%LZ4_PACKET% -input bank_sys_normal0.bin 0 -o bank_sys_normal0.lz4
set bank_lz4_files=%bank_lz4_files% 0xAA55AA55 bank_sys_normal0.lz4
)
echo %bank_files%
echo %bank_lz4_files%
%BANKLINK% %bank_files% p11_bank_code.bin
%BANKLINK% %bank_lz4_files% p11_bank_code.lz4
if exist "..\..\..\..\..\..\sdk\cpu\br35\tools\" (
copy .\p11_bank_code.bin ..\..\..\..\..\..\sdk\cpu\br35\tools\p11_code.bin
copy .\p11_bank_code.lz4 ..\..\..\..\..\..\sdk\cpu\br35\tools\p11_code.lz4
)
::pause
@@ -0,0 +1,108 @@
##!/bin/sh
${OBJDUMP} -D -address-mask=0x1ffffff -print-imm-hex -print-dbg $1.elf > $1.lst
${OBJCOPY} -O binary -j .text $1.elf text.bin
##${OBJCOPY} -O binary -j .p11_poweroff_code $1.elf p11_poweroff_code.bin
${OBJCOPY} -O binary -j .overlay_bank_demo_init $1.elf bank_demo_init.bin
${OBJCOPY} -O binary -j .overlay_bank_demo_normal0 $1.elf bank_demo_normal0.bin
${OBJCOPY} -O binary -j .overlay_bank_demo_normal1 $1.elf bank_demo_normal1.bin
${OBJCOPY} -O binary -j .overlay_bank_demo_normal2 $1.elf bank_demo_normal2.bin
${OBJCOPY} -O binary -j .overlay_bank_sensor_init $1.elf bank_sensor_init.bin
${OBJCOPY} -O binary -j .overlay_bank_sensor_normal0 $1.elf bank_sensor_normal0.bin
${OBJCOPY} -O binary -j .overlay_bank_sensor_normal1 $1.elf bank_sensor_normal1.bin
${OBJDUMP} -section-headers -address-mask=0x1ffffff $1.elf > segment_list.txt
${OBJSIZEDUMP} -lite -skip-zero -enable-dbg-info $1.elf | sort -k 1 > symbol_tbl.txt
${OBJSIZEDUMP} -dump-stack-size -enable-dbg-info $1.elf > dump_stack_size.txt
${OBJSIZEDUMP} -dump-function-call -enable-dbg-info $1.elf > dump_func_call.txt
/opt/utils/calc_min_stack_size.py --stack dump_stack_size.txt --call dump_func_call.txt > analyze.txt
compress_tool=lz4_packet
#bank_files="0x80 p11_poweroff_code.bin "
bank_files=${bank_files}"0x80 text.bin "
$compress_tool -input text.bin 0 -o text.lz4
bank_lz4_files=${bank_lz4_files}"0x80 text.lz4 "
if [ -s bank_demo_init.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_demo_init.bin "
$compress_tool -input bank_demo_init.bin 0 -o bank_demo_init.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_demo_init.lz4 "
fi
if [ -s bank_demo_normal0.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_demo_normal0.bin "
$compress_tool -input bank_demo_normal0.bin 0 -o bank_demo_normal0.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_demo_normal0.lz4 "
fi
if [ -s bank_demo_normal1.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_demo_normal1.bin "
$compress_tool -input bank_demo_normal1.bin 0 -o bank_demo_normal1.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_demo_normal1.lz4 "
fi
if [ -s bank_sensor_init.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_sensor_init.bin "
$compress_tool -input bank_sensor_init.bin 0 -o bank_sensor_init.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_sensor_init.lz4 "
fi
if [ -s bank_sensor_normal0.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_sensor_normal0.bin "
$compress_tool -input bank_sensor_normal0.bin 0 -o bank_sensor_normal0.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_sensor_normal0.lz4 "
fi
if [ -s bank_sensor_normal1.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_sensor_normal1.bin "
$compress_tool -input bank_sensor_normal1.bin 0 -o bank_sensor_normal1.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_sensor_normal1.lz4 "
fi
if [ -s bank_sys_init.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_sys_init.bin "
$compress_tool -input bank_sys_init.bin 0 -o bank_sys_init.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_sys_init.lz4 "
fi
if [ -s bank_sys_normal0.bin ]
then
bank_files=${bank_files}"0xAA55AA55 bank_sys_normal0.bin "
$compress_tool -input bank_sys_normal0.bin 0 -o bank_sys_normal0.lz4
bank_lz4_files=${bank_lz4_files}"0xAA55AA55 bank_sys_normal0.lz4 "
fi
echo ${bank_files}
echo ${bank_lz4_files}
BankLink ${bank_files} p11_bank_code.bin
BankLink ${bank_lz4_files} p11_bank_code.lz4
cat p11_bank_code.bin > ${NICKNAME}_code.bin
cat p11_bank_code.lz4 > ${NICKNAME}_code.lz4
# cp ${NICKNAME}_code.bin /home/chenrixin/work_space/code_refacter/wsdk/watch_sdk/cpu/br35/tools/p11_code.bin
cat segment_list.txt
/opt/utils/report_segment_usage --sdk_path ${ROOT} \
--tbl_file symbol_tbl.txt \
--seg_file segment_list.txt \
--map_file p11.map \
--module_depth "{\"app\":1,\"lib\":2,\"[lib]\":2}"
host-client -project ${NICKNAME}$2 -f ${NICKNAME}_code.bin ${NICKNAME}_code.lz4
Binary file not shown.
@@ -0,0 +1,68 @@
#include "power_interface.h"
#include "io_imap.h"
#include "main.h"
/* ------------------------------------------------------------------------------------*/
/**
* @brief io_map_to_gpio imap 转成标准io口
*
* @param imap
*
* @return -1 imap非法
* other io口
*/
/* ------------------------------------------------------------------------------------*/
static int io_map_to_gpio(u32 imap)
{
#define GROUP 16
if (imap >= PA0_IN && imap < PB0_IN) {
return imap + (0 * GROUP - PA0_IN);
} else if (imap >= PB0_IN && imap < PC0_IN) {//IO_PORTB_XX
return imap + (1 * GROUP - PB0_IN);
} else if (imap >= PC0_IN && imap < USBDP_IN) {
return imap + (2 * GROUP - PC0_IN);
} else if (imap == USBDP_IN) {
return 14 * GROUP;
} else if (imap == USBDM_IN) {
return 14 * GROUP + 1;
} else if (imap == PP0_IN) {
return 13 * GROUP;
}
return -1;
}
/* ------------------------------------------------------------------------------------*/
/**
* @brief io_wkup_callback io唤醒回调(中断)
*
* @param imap
* @param edge
*
* @return 0 唤醒主系统处理
* 1 P11处理,不唤醒主系统
*/
/* ------------------------------------------------------------------------------------*/
static u32 io_wkup_callback(u32 imap, P33_IO_WKUP_EDGE edge)
{
/* printf("imap: %d, %d\n", imap, edge); */
#if CONFIG_SENSOR_SLEEP_ENABLE
if (imap == PB3_IN) {
task_post_msg(NULL, 1, MSG_P11_SENSOR_IRQ);
return 1;
}
#endif
return 0;
}
void power_early_flowing()
{
power_early_init(0);
p33_io_wakeup_set_callback(io_wkup_callback);
}
int power_later_flowing()
{
power_later_init(0);
return 0;
}
@@ -0,0 +1,8 @@
#include "power_interface.h"
void board_power_init()
{
message_init();
power_init(NULL);
}
+40
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@@ -0,0 +1,40 @@
#include "includes.h"
#include "gpio.h"
#include "ipc_spin_lock.h"
void app_main();
int main(void)
{
local_irq_disable();
ipc_spin_lock_init();
clock_early_init();
power_early_flowing(0);
#if CONFIG_UART_DEBUG_ENABLE
debug_uart_init(CONFIG_DEBUG_UART_TX_PIN);
#endif /* #if CONFIG_UART_DEBUG_ENABLE */
printf("\n============ Hello BR35 P11 ============\n");
//p11_q32s(0)->PMU_CON0 |= BIT(2); //P11 WKUP EN
printf("p11_q32s(0)->PMU_CON0 = 0x%x\n", p11_q32s(0)->PMU_CON0);
debug_init(); //异常检测初始化
board_power_init();
local_irq_enable();
while (M2P_WAIT_RELEASE == 0) {
asm("csync");
}
M2P_WAIT_RELEASE = 0;
app_main();
}
+213
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#ifdef SUPPORT_MS_EXTENSIONS
#pragma bss_seg(".uart.bss")
#pragma data_seg(".uart.data")
#pragma const_seg(".uart.const")
#pragma code_seg(".uart.text")
#pragma str_literal_override(".uart.text")
#endif /* #ifdef SUPPORT_MS_EXTENSIONS */
#include "includes.h"
#include "uart.h"
#include "gpio.h"
#include "ipc_spin_lock.h"
//uart时钟选择:
//#define UART_CLK_SEL UART_CLK_SYS_CLK //由主系统gpcnt模块算出rc16m频率,rc16m频率跟pvdd有关,注意配置被覆盖。
#define UART_CLK_SEL UART_CLK_STD_12M //低功耗不能使用该时钟源
//uart波特率选择:
#define UART_TARGET_BAUD CONFIG_DEBUG_UART_BAUD
//#define UART_TARGET_BAUD 1000000L
//调试串口选择: P11_UART0/P11_UART1
#define DEBUG_UART_SELECT P11_UART0
//输入选择. 只有UART0有输入功能
#define DEBUG_UART_RX_ENABLE 0
#if DEBUG_UART_RX_ENABLE
#define DEBUG_UART_RX_IO IO_PORTB_05
#define DEBUG_UART_RX_OVERTIME 100 //ms
#endif /* #if DEBUG_UART_RX_ENABLE */
static u8 init = 0;
#define P11_UART_CLK_SEL(x) SFR(P11_CLOCK->CLK_CON2, 2, 2, x)
#define UART_ENTER_CRITICAL() irq_disable_core();//ipc_spin_lock(IPC_SPIN_LOCK_EVENT_UART)
#define UART_EXIT_CRITICAL() irq_enable_core(); //ipc_spin_unlock(IPC_SPIN_LOCK_EVENT_UART)
___interrupt
static void uart0_isr(void)
{
u8 rx = 0;
if (UART_RX_PENDING_IS(P11_UART0)) {
rx = UART_BUF_READ(P11_UART0);
UART_RX_PENDING_CLEAR(P11_UART0);
printf("RX pending, rx: 0x%x\n", rx);
}
if (UART_OT_PENDING_IS(P11_UART0)) {
rx = UART_BUF_READ(P11_UART0);
UART_OT_PENDING_CLEAR(P11_UART0);
printf("OT pending, rx: 0x%x\n", rx);
}
}
static u32 uart_src_clk_get(void)
{
u32 freq = 0;
if (UART_CLK_SEL == UART_CLK_STD_12M) {
SFR(P11_CLOCK->CLK_CON1, 15, 2, 1); //MSYS_BT24M --> P11_BT24M
SFR(P11_CLOCK->CLK_CON1, 17, 3, 1); //STD12M sel P11_BT24M input
SFR(P11_CLOCK->CLK_CON1, 20, 2, 0); // div0
SFR(P11_CLOCK->CLK_CON1, 22, 2, 1); // div1
freq = 12000000;
} else if (UART_CLK_SEL == UART_CLK_RC16M) {
freq = 16000000;//(u32)((u32)m2p_message[M2P_RCH_FEQ_H] << 8 | m2p_message[M2P_RCH_FEQ_L]) * 1000;
} else if (UART_CLK_SEL == UART_CLK_SYS_CLK) {
freq = 24000000;
}
return freq;
}
void uart_clk_sel(enum UART_CLK_TABLE clk)
{
u32 freq = 0;
if (clk == UART_CLK_STD_12M) {
freq = 12000000;
} else if (clk == UART_CLK_RC16M) {
freq = 16000000;
} else if (clk == UART_CLK_SYS_CLK) {
freq = 24000000;
}
P11_UART_CLK_SEL(clk);
u16 baud_reg = (freq / UART_TARGET_BAUD) / 4 - 1;
UART_BAUD_SET(DEBUG_UART_SELECT, baud_reg);
}
void debug_uart_init(u8 tx_port)
{
UART_CON0_CLEAR(DEBUG_UART_SELECT);
UART_CON1_CLEAR(DEBUG_UART_SELECT);
uart_clk_sel(UART_CLK_SEL);
//tx io inita
gpio_set_output_value(tx_port, 1);
gpio_set_direction(tx_port, 0);
if (DEBUG_UART_SELECT == P11_UART1) {
//gpio_set_fun_output_port(tx_port, P11_FO_UART1_TX, 1, 1);
} else if (DEBUG_UART_SELECT == P11_UART0) {
gpio_set_fun_output_port(tx_port, P11_FO_UART0_TX, 1, 1);
}
#if DEBUG_UART_RX_ENABLE
u32 ot_value = 0;
if (DEBUG_UART_SELECT == P11_UART0) {
//rx io init:
gpio_set_direction(DEBUG_UART_RX_IO, 1);
gpio_set_pull_up(DEBUG_UART_RX_IO, 1);
gpio_set_pull_down(DEBUG_UART_RX_IO, 0);
gpio_set_die(DEBUG_UART_RX_IO, 1);
//iomc:
gpio_set_fun_input_port(DEBUG_UART_RX_IO, PFI_UART0_RX);
//rx config:
UART_OT_PENDING_CLEAR(P11_UART0);
UART_RX_PENDING_CLEAR(P11_UART0);
ot_value = (uart_src_clk_get() * DEBUG_UART_RX_OVERTIME) / 1000;
UART_OTCNT_SET(P11_UART0, ot_value);
UART_OT_INT_ENABLE(P11_UART0);
UART_RX_INT_ENABLE(P11_UART0);
UART_RX_ENABLE(P11_UART0);
P11_CLOCK->WKUP_EN |= BIT(IRQ_UART0_IDX);
request_irq(IRQ_UART0_IDX, uart0_isr, 0);
}
#endif /* #if DEBUG_UART_RX_ENABLE */
UART_TX_ENABLE(DEBUG_UART_SELECT);
init = 1;
}
void uart_putbyte(char a)
{
u32 ot = 400;
while (!UART_TX_PENDING_IS(DEBUG_UART_SELECT)) {
if (ot-- == 0) {
break;
}
}
UART_TX_PENDING_CLEAR(DEBUG_UART_SELECT);
UART_BUF_WRITE(DEBUG_UART_SELECT, a);
}
__WEAK__
void putchar(char a)
{
if (init == 0) {
return;
}
if (a == '\r') {
return;
}
if (a == '\n') {
uart_putbyte('\r');
}
uart_putbyte(a);
}
__WEAK__
void putbyte(char a)
{
putchar(a);
}
#include "power_interface.h"
static P11_UART_TypeDef UART0_POWEROFF;
static u8 uart_enter_deepsleep(void)
{
UART0_POWEROFF.CON0 = DEBUG_UART_SELECT->CON0;
UART0_POWEROFF.CON1 = DEBUG_UART_SELECT->CON1;
UART0_POWEROFF.CON2 = DEBUG_UART_SELECT->CON2;
UART0_POWEROFF.BAUD = DEBUG_UART_SELECT->BAUD;
UART0_POWEROFF.OTCNT = DEBUG_UART_SELECT->OTCNT;
return 0;
}
static u8 uart_exit_deepsleep(void)
{
DEBUG_UART_SELECT->CON1 = UART0_POWEROFF.CON1;
DEBUG_UART_SELECT->BAUD = UART0_POWEROFF.BAUD;
DEBUG_UART_SELECT->OTCNT = UART0_POWEROFF.OTCNT;
DEBUG_UART_SELECT->CON2 = UART0_POWEROFF.CON2;
DEBUG_UART_SELECT->CON0 = UART0_POWEROFF.CON0;
DEBUG_UART_SELECT->CON0 |= (BIT(13) | BIT(12) | BIT(10));
return 0;
}
#if CONFIG_UART_DEBUG_ENABLE
DEEPSLEEP_TARGET_REGISTER(uart) = {
.name = "uart",
.enter = uart_enter_deepsleep,
.exit = uart_exit_deepsleep,
};
#endif
/*-----------------------------------------------------------*/
+30
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#include "includes.h"
#if (CONFIG_UART_DEBUG_ENABLE == 0)
void putchar(char a)
{
}
void putbyte(char a)
{
}
int puts(const char *out)
{
return 0;
}
void put_u32hex(unsigned int dat)
{
}
void put_buf(const u8 *buf, int len)
{
}
int printf(const char *format, ...)
{
return 0;
}
#endif /* #if (CONFIG_UART_DEBUG_ENABLE == 0) */
+221
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#include "includes.h"
#include "uart.h"
#include "debug.h"
#include "gpio.h"
#include "bank_switch.h"
#include "usr_timer.h"
#include "iic_api.h"
#include "main.h"
#include "bsp.h"
#include "sensor/sensor_driver.h"
/*
function: m2p消息处理,主循环不会收到ack消息
param index:等待返回ack的消息序号
return val1, 收到对应ack消息 0,未收到对应ack消息
*/
int m2p_msg_hdl(u32 index)
{
struct lp_msg_handler *p;
u8 msg[32];
struct lp_msg_head head;
int ret = m2p_get_msg(&head, (u8 *)msg, ARRAY_SIZE(msg));
//成功读取到消息
if (ret == MSG_NO_ERROR) {
list_for_each_m2p_msg_handler(p) {
if (p->type == head.type) {
if (head.ack) {
config_post_ack_flag(0);
}
p->handler(p->priv, (u8 *)msg, head.len);
if (head.ack) {
//若是应答消息则返回应答
p11_ack_msys(head.index);
config_post_ack_flag(1);
}
}
}
} else if (ret == MSG_NO_MSG) {
//未读取到消息
} else {
ASSERT(0, "ret: %d, type: %d, ack: %d, index: %d, len: %d\n", ret, head.type, head.ack, head.index, head.len);
}
return 0;
}
static void callback(u32 *priv)
{
printf("function: callback, %d\n", (u32)priv);
}
#include "circular_buf.h"
#include "ipc_spin_lock.h"
#define P11_CBUF_TEST 0
#if P11_CBUF_TEST
static cbuffer_t cbuffer;
static u8 cbuf_test[256];
static cbuffer_child_t entry[3];//支持3个成员读取
static void p11_cbuf_test_init()
{
int msg[2];
msg[0] = MSG_P11_SYS_RAM_INIT;
msg[1] = (int)&cbuffer;
p2m_post_msg(MSG_APP, 0, (u8 *)msg, sizeof(msg));
cbuf_mult_read_init(&cbuffer, cbuf_test, sizeof(cbuf_test), 3, entry);
cbuf_mult_entry_enable(&cbuffer, 0, 1); //开启节点
cbuf_mult_entry_enable(&cbuffer, 1, 1);
cbuf_mult_entry_enable(&cbuffer, 2, 1);
printf("%s %d %x\n", __func__, __LINE__, (int)&cbuffer);
}
static void p11_cbuf_write_test()
{
u8 test[50];
static int count_add = 0;
int count = count_add;
for (int i = 0; i < 50; i++) {
test[i] = (count++) & 0xff;
}
int len = cbuf_write(&cbuffer, test, 50);
/* int len = 0; */
if (len == 50) {
printf("\nwrite succ %x\n", count_add);
count_add += 50;
} else {
/* printf("falil \n"); */
}
}
#endif
void app_main()
{
bsp_init();
usr_timer_init();
lptmr1_init();
#if CONFIG_SENSOR_DRIVER_ENABLE
sensor_driver_check();
#endif
#if P11_CBUF_TEST
p11_cbuf_test_init();
p11_cbuf_write_test();
#endif
/* task_post_msg(NULL,1,MSG_P11_SYS_KICK); */
while (1) {
m2p_msg_hdl(0);
}
}
/*
function: 主循环回调处理
*/
void app_handler_add(void (*callback)(u32 *priv), u32 *priv)
{
u8 msg[9];
u32 msg_cb = (u32)callback;
u32 msg_priv = (u32)priv;
msg[0] = MSG_APP_CALLBACK;
memcpy(msg + 1, &msg_cb, 4);
if (priv != NULL) {
memcpy(msg + 5, &msg_priv, 4);
m2p_post_msg(MSG_APP, 0, msg, 9);
} else {
m2p_post_msg(MSG_APP, 0, msg, 5);
}
}
int task_post_msg(char *name, int argc, ...)
{
int msg[16];
va_list argptr;
va_start(argptr, argc);
int param;
ASSERT(argc < sizeof(msg) / sizeof(msg[0]))
for (int i = 0; i < argc; ++i) {
param = va_arg(argptr, int);
msg[i] = param;
}
m2p_post_msg(MSG_APP, 0, (u8 *)msg, argc * sizeof(int));
va_end(argptr);
return 0;
}
static void app_msg_handler(void *priv, u8 *msg, u32 len)
{
printf("app_msg_handler = %d\n", msg[0]);
if (msg[0] == MSG_APP_CALLBACK) {
u32 *msg_priv;
void (*msg_cb)(u32 * priv);
memcpy(&msg_cb, msg + 1, 4);
memcpy(&msg_priv, msg + 5, 4);
msg_cb(msg_priv);
}
switch (msg[0]) {
#if CONFIG_SENSOR_DRIVER_ENABLE
case MSG_P11_SYS_KICK:
printf("MSG_P11_SYS_KICK\n");
sensor_driver_run();
break;
case MSG_P11_SENSOR_SLEEP:
printf("MSG_P11_SENSOR_SLEEP\n");
sensor_driver_sleep(msg[1], msg[2]);
break;
case MSG_P11_SENSOR_IRQ:
printf("MSG_P11_SENSOR_IRQ\n");
sensor_driver_irq_handle();
break;
#endif
#if P11_CBUF_TEST
p11_cbuf_write_test();
#endif
//test
break;
case MSG_P11_SENSOR_INIT: {
printf("m2p_post_msg len=%d\n", len);
#if CONFIG_SENSOR_DRIVER_ENABLE
sensor_driver_init(msg[1], msg[2], msg[3] << 8 | msg[4], msg[5]);
#endif
break;
}
case MSG_P11_SOFF_EVENT: {
lptmr1_set_wkup_time(0, P11_LPTMR_WKUP_EVENT);
}
}
}
REGISTER_M2P_MSG_HANDLER(0, MSG_APP, app_msg_handler);
+27
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@@ -0,0 +1,27 @@
#ifndef __MAIN_H__
#define __MAIN_H__
enum {
MSG_APP_CALLBACK = 1,
MSG_P11_SYS_RAM_INIT = 2,
MSG_P11_SYS_KICK = 3,
MSG_P11_SYS_TO_SELF = 4,
MSG_P11_SENSOR_INFO = 5,
MSG_P11_SENSOR_INIT = 6,
MSG_P11_SENSOR_EVENT = 7,
MSG_P11_SENSOR_TIMER = 8,
MSG_P11_ALGORITHM_EVENT = 9,
MSG_P11_SOFF_EVENT = 10,
MSG_P11_SENSOR_SLEEP = 11,
MSG_P11_SENSOR_IRQ = 12,
MSG_P11_SYS_WAKE = 0xff,
};
void app_handler_add(void (*callback)(u32 *priv), u32 *priv);
extern int task_post_msg(char *name, int argc, ...);
#endif
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@@ -0,0 +1,349 @@
#include "includes.h"
/*
1.共享buf互斥操作,注意P11在等待主系统BUF锁时候需要响应主系统的操作,
防止主系统等待导致死锁,处理来自主系统的M2P中断(通过硬件lock不需要这一点)
2.接口互斥,不能同时操作
P11在等待主系统ack消息时,也要防止死锁(P11和主系统同时发送ACK消息时会死锁),
有以下处理:
主系统
1.主系统不能在关中断/中断中发送ACK类型的消息
2.发送ACK类型的消息需要互斥,即不允许同时发多个ACK类型消息
3.不允许在收到ACK类型消息处理函数中发送ACK类型消息的嵌套,收到ACK类型消息
调用post_ack_flag=0,发送函数判断post_ack_flag=0且当前任务为pmu_task则断言
P11系统:
1.P11系统不能在关中断/中断中发送ACK类型的消息
2.不允许在收到ACK类型消息后,又发送ACK类型消息,由于不会在中断中发送ACK类型消息,
在收到ACK类型的消息后调用post_ack_flag=0,发送函数内部检查post_ack_flag=0则断言
3.不允许重复发送ACK类型的消息,由于一点的保证
4.主系统和P11同时发ACK类型的消息,P11需要响应主系统
*/
#define MSG_ENTER_CRITICAL() lp_lock()
#define MSG_EXIT_CRITICAL() lp_unlock()
#define P11_WKUP_MSYS(msg) P11_SYSTEM->P2M_INT_SET = BIT(P2M_APP_INDEX)
#define MSYS_WKUP_P11(msg) //P11_SYSTEM->M2P_INT_SET = BIT(M2P_APP_INDEX)
static LP_Q m2p_msg_q;
static LP_Q p2m_msg_q;
static u8 m2p_pool[MAX_POOL] ALIGNED(4);
static u8 p2m_pool[MAX_POOL] ALIGNED(4);
static bool post_ack_flag = 1;
/*
function: 从缓存buf读取指定长度数据
param len 读取数据长度
*/
static int lp_buf_read(LP_Q *q, u8 *buf, u32 len)
{
if (q->count == 0) {
return LP_BUF_READ_NO_DATA;
}
if (q->count < len) {
return LP_BUF_READ_NOT_ENOUGH_DATA;
}
u32 end = (q->out + len) % q->size;
if (end > q->out) {
memcpy(buf, (void *)(P11_RAM_BASE + q->start + q->out), len);
} else {
memcpy(buf, (void *)(P11_RAM_BASE + q->start + q->out), q->size - q->out);
memcpy(buf + (q->size - q->out), (void *)(P11_RAM_BASE + q->start), end);
}
q->out = end;
q->count -= len;
return LP_BUF_NO_ERR;
}
static int lp_buf_write_enable(LP_Q *q, u32 len)
{
if ((q->count + len) > q->size) {
return LP_BUF_WRITE_OVER;
} else {
return LP_BUF_NO_ERR;
}
}
/*
function: 从缓存buf写入指定长度数据
return val: 0,写入成功
param len 写入的数据长度
*/
static int lp_buf_write(LP_Q *q, u8 *buf, u32 len)
{
u32 end = (q->in + len) % q->size;
if (end > q->in) {
memcpy((void *)(P11_RAM_BASE + q->start + q->in), buf, len);
} else {
memcpy((void *)(P11_RAM_BASE + q->start + q->in), buf, q->size - q->in);
memcpy((void *)(P11_RAM_BASE + q->start), buf + (q->size - q->in), end);
}
q->in = end;
q->count += len;
return LP_BUF_NO_ERR;
}
/*
* function:从消息池中获取主系统发送过来的消息
* param head:消息的头部,包含消息类型、长度等信息
* param len:读取消息内存的长度
* param msg:读取到消息
*
* return val: MSG_NO_MSG
* MSG_NO_ERROR
* MSG_BUF_ERROR
* MSG_BUF_READ_OVER
*
*/
int m2p_get_msg(struct lp_msg_head *head, u8 *msg, u32 len)
{
LP_Q *msg_q_p = (LP_Q *)(P11_RAM_BASE + (P2M_CBUF_ADDR0 | P2M_CBUF_ADDR1 << 8 | P2M_CBUF_ADDR2 << 16 | P2M_CBUF_ADDR3 << 24));
//长度至少是头+1byte数据
if (len < sizeof(struct lp_msg_head) + 1) {
return MSG_BUF_READ_OVER;
}
local_irq_disable();
MSG_ENTER_CRITICAL();
//先读取头部数据
int ret = lp_buf_read(msg_q_p, (u8 *)head, sizeof(struct lp_msg_head));
if (ret == LP_BUF_READ_NO_DATA) {
//若没有数据则进入低功耗
MSG_EXIT_CRITICAL();
//确保每次事件都能唤醒p11
//get no msg,cpu enter lowpower
p11_lowpower_schedule();
local_irq_enable();
return MSG_NO_MSG;
} else if (ret == LP_BUF_READ_NOT_ENOUGH_DATA) {
MSG_EXIT_CRITICAL();
local_irq_enable();
//读取头部的数据长度不够返回错误
return MSG_BUF_ERROR;
} else {
//判断长度够不够
if (len < head->len) {
MSG_EXIT_CRITICAL();
local_irq_enable();
//读了头,数据读不了返回错误
return MSG_BUF_READ_OVER;
}
ret = lp_buf_read(msg_q_p, msg, head->len);
if (ret != LP_BUF_NO_ERR) {
MSG_EXIT_CRITICAL();
local_irq_enable();
//数据长度为控不对返回格式错误
return MSG_BUF_ERROR;
}
}
MSG_EXIT_CRITICAL();
local_irq_enable();
return MSG_NO_ERROR;
}
/*
* function:主系统向P11发送消息,往消息池丢数据,该函数可实现向P11主循环推数据
*
* param type: 消息类型,P11收到消息后根据消息类型匹配回调函数
* param ack:该函数不需要ack参数,也即发送的头index为0,预留给该函数使用
* param len:发送消息的长度,单位为一个字节
* param msg:发送的消息
*
*/
int m2p_post_msg(u32 type, u32 ack, u8 *msg, u32 len)
{
struct lp_msg_head head;
LP_Q *msg_q_p = (LP_Q *)(P11_RAM_BASE + (P2M_CBUF_ADDR0 | P2M_CBUF_ADDR1 << 8 | P2M_CBUF_ADDR2 << 16 | P2M_CBUF_ADDR3 << 24));
MSG_ENTER_CRITICAL();
/*P11的m2p接口不需要ack与index*/
head.type = type;
head.ack = 0;
head.len = len;
head.index = 0;
if (lp_buf_write_enable(msg_q_p, len + sizeof(struct lp_msg_head)) == LP_BUF_WRITE_OVER) {
MSG_EXIT_CRITICAL();
return MSG_BUF_WRITE_OVER;
}
//写头
lp_buf_write(msg_q_p, (u8 *)&head, sizeof(struct lp_msg_head));
//写数据
lp_buf_write(msg_q_p, msg, len);
MSYS_WKUP_P11();
MSG_EXIT_CRITICAL();
return MSG_NO_ERROR;
}
/*
* 接收到ack消息处理过程中调用
*/
void config_post_ack_flag(u32 enable)
{
local_irq_disable();
if (enable) {
post_ack_flag = 1;
} else {
post_ack_flag = 0;
}
local_irq_enable();
}
static u32 p2m_get_ack_flag(u32 index)
{
LP_Q *msg_q_p = (LP_Q *)(P11_RAM_BASE + (P2M_CBUF1_ADDR0 | P2M_CBUF1_ADDR1 << 8 | P2M_CBUF1_ADDR2 << 16 | P2M_CBUF1_ADDR3 << 24));
MSG_ENTER_CRITICAL();
u32 ret = msg_q_p->ack_flag & BIT(index);
MSG_EXIT_CRITICAL();
return ret ? 0 : 1;
}
u32 p11_ack_msys(u32 index)
{
LP_Q *msg_q_p = (LP_Q *)(P11_RAM_BASE + (P2M_CBUF_ADDR0 | P2M_CBUF_ADDR1 << 8 | P2M_CBUF_ADDR2 << 16 | P2M_CBUF_ADDR3 << 24));
MSG_ENTER_CRITICAL();
msg_q_p->ack_flag &= ~BIT(index);
MSG_EXIT_CRITICAL();
return 0;
}
/*
* function:P11向主系统发送消息,往消息池丢数据
*
* param type: 消息类型,主系统收到消息后根据消息类型匹配回调函数
* param ack:P11收到消息执行完成后是否发送应答消息给主系统,P11死等消息
* 并处理主系统发送过来的所有消息
* param len:发送消息的长度,单位为一个字节
* param msg:发送的消息
*
*/
int p2m_post_msg(u32 type, u32 ack, u8 *msg, u32 len)
{
u32 param;
struct lp_msg_head head;
LP_Q *msg_q_p = (LP_Q *)(P11_RAM_BASE + (P2M_CBUF1_ADDR0 | P2M_CBUF1_ADDR1 << 8 | P2M_CBUF1_ADDR2 << 16 | P2M_CBUF1_ADDR3 << 24));
/*不允许在中断函数/关中断发阻塞操作,因为阻塞的同时要处理
主系统发的消息,不建议在中断函数处理/关闭中断处理*/
if (ack == 1) {
ASSERT(!(cpu_in_irq() || cpu_irq_disable()), "p2m_post_msg ack");
}
MSG_ENTER_CRITICAL();
u32 index = 0;
if (ack) {
msg_q_p->ack_flag |= BIT(0);
/*收到ACK消息处理函数,不允许发送ACK消息*/
if (post_ack_flag != 1) {
ASSERT(0, "post_ack_flag check fail!");
}
}
head.type = type;
head.ack = ack;
head.len = len;
head.index = index;
if (lp_buf_write_enable(msg_q_p, len + sizeof(struct lp_msg_head)) == LP_BUF_WRITE_OVER) {
MSG_EXIT_CRITICAL();
return MSG_BUF_WRITE_OVER;
}
//写头
lp_buf_write(msg_q_p, (u8 *)&head, sizeof(struct lp_msg_head));
//写数据
lp_buf_write(msg_q_p, msg, len);
__power_recover();
P11_WKUP_MSYS();
MSG_EXIT_CRITICAL();
if (ack) {
while (1) {
if (p2m_get_ack_flag(index)) {
break;
}
/*主系统可能在等待P11的消息,处理来自主系统的消息,防止死锁*/
if (m2p_msg_hdl(head.index)) {
break;
}
}
}
return MSG_NO_ERROR;
}
void message_init()
{
MSG_ENTER_CRITICAL();
memset((void *)m2p_pool, 0, MAX_POOL);
memset((void *)p2m_pool, 0, MAX_POOL);
//初始化m2p消息队列
m2p_msg_q.in = 0;
m2p_msg_q.out = 0;
m2p_msg_q.start = (u32)m2p_pool;
m2p_msg_q.count = 0;
m2p_msg_q.size = MAX_POOL;
m2p_msg_q.ack_flag = 0;
//初始化p2m消息队列
p2m_msg_q.in = 0;
p2m_msg_q.out = 0;
p2m_msg_q.start = (u32)p2m_pool;
p2m_msg_q.count = 0;
p2m_msg_q.size = MAX_POOL;
p2m_msg_q.ack_flag = 0;
//赋值m2p消息队列描述地址
u32 addr = (u32)&m2p_msg_q;
P2M_CBUF_ADDR0 = (addr) & 0xff;
P2M_CBUF_ADDR1 = (addr >> 8) & 0xff;
P2M_CBUF_ADDR2 = (addr >> 16) & 0xff;
P2M_CBUF_ADDR3 = (addr >> 24) & 0xff;
//赋值p2m消息队列描述地址
addr = (u32)&p2m_msg_q;
P2M_CBUF1_ADDR0 = (addr) & 0xff;
P2M_CBUF1_ADDR1 = (addr >> 8) & 0xff;
P2M_CBUF1_ADDR2 = (addr >> 16) & 0xff;
P2M_CBUF1_ADDR3 = (addr >> 24) & 0xff;
MSG_EXIT_CRITICAL();
}
@@ -0,0 +1,120 @@
#include "sdk_config.h"
#include "sensor_driver.h"
#if CONFIG_SENSOR_DRIVER_ENABLE && TCFG_MMC5603_ENABLE
#define LOG(fmt,...) printf("[5603] %s " fmt "\n", __func__, ##__VA_ARGS__)
#define IIC_ADDR_W (0x30 << 1 | 0x0)
#define IIC_ADDR_R (0x30 << 1 | 0x1)
static axis_data_t sensor_data[50];
static cbuffer_t sensor_cbuffer;
static cbuffer_child_t entry[1];//支持3个成员读取
static sensor_info_t sensor_info = {
.type = SENSOR_DRV_MAGNETIC,
.name = "mmc5603",
.range = {2, 4, 8, 16},
.odr = {10, 25, 50, 100},
.cbuffer = 0,
};
static s8 sensor_check(void)
{
u8 dev_id = 0;
sensor_read(IIC_ADDR_R, 0x39, &dev_id, 1, 0);
if (sensor_info.cbuffer == NULL) {
sensor_info.cbuffer = &sensor_cbuffer;
cbuf_mult_read_init(sensor_info.cbuffer, sensor_data, sizeof(sensor_data), 1, entry);
}
LOG("dev_id=%02x cbuf=%x", dev_id, sensor_info.cbuffer);
return ((dev_id == 0x10) && sensor_info.cbuffer) ? RET_OK : RET_ERR;
}
static s8 sensor_open(u16 range, u16 odr)
{
u8 register_value = 0;
s8 ret = RET_OK;
/* Write 0x10 to register 0x1B, set RESET bit high */
if (ret == RET_OK) {
register_value = 0x10;
ret = sensor_write(IIC_ADDR_W, 0x1B, &register_value, 1); //RESET
/* Delay to finish the RESET operation */
mdelay(1);
}
/* Write reg 0x1C, Set BW<1:0> = bandwith */
if (ret == RET_OK) {
register_value = odr / 75;
ret = sensor_write(IIC_ADDR_W, 0x1C, &register_value, 1);
}
/* Write reg 0x1A, set ODR<7:0> = sampling_rate */
if (ret == RET_OK) {
register_value = odr;
ret = sensor_write(IIC_ADDR_W, 0x1A, &register_value, 1);
}
/* Write reg 0x1B */
/* Set Auto_SR_en bit '1', Enable the function of automatic set/reset */
/* Set Cmm_freq_en bit '1', Start the calculation of the measurement period according to the ODR*/
if (ret == RET_OK) {
register_value = 0x80 | 0x20;
ret = sensor_write(IIC_ADDR_W, 0x1B, &register_value, 1);
}
/* Write reg 0x1D */
/* Set Cmm_en bit '1', Enter continuous mode */
if (ret == RET_OK) {
register_value = 0x10;
ret = sensor_write(IIC_ADDR_W, 0x1D, &register_value, 1);
}
return ret;
}
static s8 sensor_close(void)
{
u8 val = 0;
return sensor_write(IIC_ADDR_W, 0x1D, &val, 1);
}
static s8 sensor_read_single_data(void *arg, u16 *len)
{
u8 data_reg[6] = {0};
axis_data_t *mag = arg;
sensor_read(IIC_ADDR_R, 0x00, data_reg, 6, 0);
mag[0].x = (s16)(data_reg[0] << 8 | data_reg[1]);
mag[0].y = (s16)(data_reg[2] << 8 | data_reg[3]);
mag[0].z = (s16)(data_reg[4] << 8 | data_reg[5]);
mag[0].x -= 32768;
mag[0].y -= 32768;
mag[0].z -= 32768;
*len = 6;
if ((*len > 0) && (sensor_info.cbuffer)) {
u32 wlen = cbuf_write(sensor_info.cbuffer, arg, *len);
LOG("cbuf wlen=%d glen=%d", wlen, *len);
}
LOG("mag:%d,%d,%d", mag[0].x, mag[0].y, mag[0].z);
return 1;
}
REGISTER_SENSOR(sensor_magnetic) = {
.info = &sensor_info,
.online = sensor_check,
.open = sensor_open,
.close = sensor_close,
.run = sensor_read_single_data,
};
#endif
@@ -0,0 +1,180 @@
#include "sdk_config.h"
#include "sensor_driver.h"
#if CONFIG_SENSOR_DRIVER_ENABLE && TCFG_SC7A20_ENABLE
#define LOG(fmt,...) printf("[sc7a20] " fmt "\n",##__VA_ARGS__)
/***使用驱动前请根据实际接线情况配置(7bit)IIC地址******/
/**SC7A20的SDO 脚接地: 0x18****************/
/**SC7A20的SDO 脚接电源: 0x19****************/
#define IIC_ADDR_W (0x19U << 1 | 0x0)
#define IIC_ADDR_R (0x19U << 1 | 0x1)
/*******************************************************/
static axis_data_t accel_data[50]; //accel data buffer
static cbuffer_t accel_cbuffer;
static cbuffer_child_t entry[3];//支持3个成员读取
static sensor_info_t sensor_info = {
.type = SENSOR_DRV_ACCELER,
.name = "sc7a20",
.range = {2, 4, 8, 16},
.odr = {10, 25, 50, 100},
.cbuffer = 0,
};
static s8 sensor_open(u16 range, u16 odr);
static const sensor_regs_t sensor_regs_array[] = {
{0x57, 0x00},
{0x1f, 0x00},
{0x20, 0x3F},
{0x21, 0x70},
{0x23, 0x10},
{0x24, 0x40},
{0x2E, 0x8F},
{0x22, 0x00},
};
static s8 sensor_check(void)
{
u8 dev_id = 0;
sensor_read(IIC_ADDR_R, 0x70, &dev_id, 1, 0);
if (sensor_info.cbuffer == NULL) {
sensor_info.cbuffer = &accel_cbuffer;
cbuf_mult_read_init(sensor_info.cbuffer, accel_data, sizeof(accel_data), 3, entry);
}
LOG("dev_id=%02x cbuf=%x", dev_id, (u32)sensor_info.cbuffer);
return ((dev_id == 0x28 || dev_id == 0x11) && sensor_info.cbuffer) ? RET_OK : RET_ERR;
}
static s8 sensor_read_config(void)
{
u8 reg_val = 0;
for (u8 i = 0; i < sizeof(sensor_regs_array) / sizeof(sensor_regs_t); i++) {
if (sensor_read(IIC_ADDR_R, sensor_regs_array[i].addr, &reg_val, 1, 0) == RET_ERR) {
return RET_ERR;
}
LOG("reg %02x = %02x", sensor_regs_array[i].addr, reg_val);
}
return RET_OK;
}
static s8 sensor_open(u16 range, u16 odr)
{
const u8 config_range[4] = {0x00, 0x10, 0x20, 0x30};
const u8 config_odr[4] = {0x2F, 0x3F, 0x4F, 0x5F};
u8 acc_conf_odr = 0x3F; //默认 25hz
u8 acc_conf_range = 0x10; //默认 +-4g
for (u8 i = 0; i < sizeof(sensor_regs_array) / sizeof(sensor_regs_t); i++) {
if (sensor_write(IIC_ADDR_W, sensor_regs_array[i].addr, (u8 *)&sensor_regs_array[i].value, 1) == RET_ERR) {
return RET_ERR;
}
}
for (u8 i = 0; i < 4; i++) {
if (sensor_info.range[i] == range) {
acc_conf_range = config_range[i];
}
if (sensor_info.odr[i] == odr) {
acc_conf_odr = config_odr[i];
}
}
sensor_write(IIC_ADDR_W, 0x20, &acc_conf_odr, 1);
sensor_write(IIC_ADDR_W, 0x23, &acc_conf_range, 1);
return RET_OK;
}
static s8 sensor_close(void)
{
u8 val = 0;
return sensor_write(IIC_ADDR_W, 0x20, &val, 1);
}
static s8 sensor_read_fifo_data(void *arg, u16 *len)
{
u8 fifo_len = 0;
u8 temp_arry[6];
axis_data_t *accel = arg;
sensor_read(IIC_ADDR_R, 0x2f, &fifo_len, 1, 0);
fifo_len = fifo_len & 0x1f;
for (u8 i = 0; i < fifo_len; i++) {
sensor_read(IIC_ADDR_R, 0xa8, temp_arry, 6, 0);
accel[i].x = (((s16)((s16)temp_arry[1] * 256 + temp_arry[0])) >> 3);
accel[i].y = -(((s16)((s16)temp_arry[3] * 256 + temp_arry[2])) >> 3);
accel[i].z = (((s16)((s16)temp_arry[5] * 256 + temp_arry[4])) >> 3);
LOG(" xyz(%d,%d): %d %d %d", fifo_len, i, accel[i].x, accel[i].y, accel[i].z);
}
fifo_len *= sizeof(axis_data_t);
if ((fifo_len > 0) && (sensor_info.cbuffer)) {
if (!cbuf_is_write_able(sensor_info.cbuffer, fifo_len)) {
cbuf_mult_read_alloc_len_updata(sensor_info.cbuffer, 0, fifo_len);
cbuf_mult_read_alloc_len_updata(sensor_info.cbuffer, 1, fifo_len);
}
u32 wlen = cbuf_write(sensor_info.cbuffer, arg, fifo_len);
LOG("cbuf wlen=%d glen=%d", wlen, fifo_len);
}
*len = fifo_len;
return RET_OK;
}
#if CONFIG_SENSOR_SLEEP_ENABLE
static const sensor_regs_t sensor_wakeup_regs_array[] = {
{0x20, 0x47},
{0x23, 0x88}, //+-2g
{0x21, 0x31},
{0x22, 0x40}, //AOI中断on int1
{0x25, 0x00},
{0x24, 0x00},
{0x30, 0x2a}, //x,y,z高事件或检测
{0x32, 0x02}, //检测门限: 1-127, 值越小, 灵敏度越高
{0x33, 0x00},
};
static s8 sensor_wakeup_enable(void)
{
LOG("sensor_wakeup_enable");
for (u8 i = 0; i < sizeof(sensor_wakeup_regs_array) / sizeof(sensor_regs_t); i++) {
if (sensor_write(IIC_ADDR_W, sensor_wakeup_regs_array[i].addr, (u8 *)&sensor_wakeup_regs_array[i].value, 1) == RET_ERR) {
return RET_ERR;
}
}
return RET_OK;
}
__attribute__((weak)) s8 driver_sc7a20_is_wake(void)
{
u8 reg_val = 0;
if (sensor_read(IIC_ADDR_R, 0x31, &reg_val, 1, 0) == RET_OK) {
LOG("reg_val=%x wake=%x", reg_val, reg_val & 0x2a);
if (reg_val & 0x2a) {
sensor_open(4, 25);
} else {
return RET_ERR;
}
}
return RET_OK;
}
#endif
REGISTER_SENSOR(sensor_acc) = {
.info = &sensor_info,
.online = sensor_check,
.open = sensor_open,
.close = sensor_close,
.run = sensor_read_fifo_data,
#if CONFIG_SENSOR_SLEEP_ENABLE
.sleep = sensor_wakeup_enable,
#endif
};
#endif
@@ -0,0 +1,159 @@
/*********************************************************************************************************
* Copyright(c) 2018, Vcare Corporation. All rights reserved.
**********************************************************************************************************
* @file module_heart_vc.c
* @brief
* @details
* @author
* @date
* @version v1.6
*********************************************************************************************************
*/
#include "sdk_config.h"
#include "sensor_driver.h"
#include "vcHr11Hci.h"
#if CONFIG_SENSOR_DRIVER_ENABLE && TCFG_VCHR11S_ENABLE
#define LOG(fmt,...) printf("[vcHr11] " fmt "\n",##__VA_ARGS__)
#define IIC_ADDR_W (0x33<<1 | 0)
#define IIC_ADDR_R (0x33<<1 | 1)
const uint32_t mcuOscData = 30000; // Timer clock frequency Be used to adjust INT frequency
const uint16_t mcuI2cClock = 400; // MCU I2C clock frequency
static vcHr11_t vcHr11;
static s16 sensor_data[50 * 2];
static cbuffer_t sensor_cbuffer;
static cbuffer_child_t entry[1];//支持3个成员读取
static sensor_info_t sensor_info = {
.type = SENSOR_DRV_HR_SPO2,
.name = "lc11s",
.odr = {10, 25, 50, 100},
.cbuffer = 0,
};
extern u64 lptmr1_get_pass_us(void);
extern u64 __lp_timer_get_cnt(u8 lptmr_x);
extern u32 lrc_get_avg_freq(void);
u32 vcHr11GetRtcCountFromMCU(void)
{
static u64 cnt = 0;
u32 pass_32bitcnt;
if (lrc_get_avg_freq() == 0) {
LOG("lrc_get_avg_freq is 0");
return 0;
}
/* cnt += lptmr1_get_pass_us(); */
cnt = lptmr1_get_pass_us();
pass_32bitcnt = cnt / (1000000 / mcuOscData);
pass_32bitcnt = pass_32bitcnt & (0xffffffff);
LOG("cnt=%d %d ", pass_32bitcnt, (u32)lptmr1_get_pass_us());
return pass_32bitcnt;
}
vcHr11Ret_t vcHr11WriteRegisters(uint8_t startAddress, uint8_t *pRegisters, uint8_t len)
{
u8 ret = sensor_write(IIC_ADDR_W, startAddress, pRegisters, len);
return ret == RET_OK ? VCHR11RET_ISOK : VCHR11RET_ISERR;
}
vcHr11Ret_t vcHr11ReadRegisters(uint8_t startAddress, uint8_t *pRegisters, uint8_t len)
{
u8 ret = sensor_read(IIC_ADDR_R, startAddress, pRegisters, len, 0);
return ret == RET_OK ? VCHR11RET_ISOK : VCHR11RET_ISERR;
}
static s8 sensor_check(void)
{
u8 dev_id = 0;
u32 vcHr11_addr = (u32)(&vcHr11);
sensor_read(IIC_ADDR_R, VCREG0, &dev_id, 1, 0);
if (sensor_info.cbuffer == NULL) {
memcpy(sensor_info.range, &vcHr11_addr, sizeof(u32));
sensor_info.cbuffer = &sensor_cbuffer;
cbuf_mult_read_init(sensor_info.cbuffer, sensor_data, sizeof(sensor_data), 1, entry);
}
LOG("dev_id=%02x cbuf=%x vcHr11_addr=%x", dev_id, (u32)sensor_info.cbuffer, vcHr11_addr);
return ((0x21 == dev_id || 0x29 == dev_id) && sensor_info.cbuffer) ? RET_OK : RET_ERR;
}
static s8 sensor_open(u16 vcHr11WorkMode, u16 odr)
{
vcHr11Ret_t ret = VCHR11RET_ISOK;
vcHr11_t *pVcHr11 = &vcHr11;
LOG("mode=%d", vcHr11WorkMode);
cbuf_clear(sensor_info.cbuffer);
ret = vcHr11SoftReset(pVcHr11);
ret = vcHr11StopSample(pVcHr11);
if (VCWORK_MODE_POWER_OFF != vcHr11WorkMode) {
pVcHr11->vcSampleRate = odr;
pVcHr11->mcuOscValue = mcuOscData;
pVcHr11->mcuSclRate = mcuI2cClock;
pVcHr11->workMode = vcHr11WorkMode;
ret = vcHr11StartSample(pVcHr11);
}
return ret == VCHR11RET_ISOK ? RET_OK : RET_ERR;
}
static s8 sensor_close(void)
{
vcHr11Ret_t ret = VCHR11RET_ISOK;
vcHr11_t *pVcHr11 = &vcHr11;
ret = vcHr11SoftReset(pVcHr11);
ret = vcHr11StopSample(pVcHr11);
return ret == VCHR11RET_ISOK ? RET_OK : RET_ERR;
}
static s8 sensor_process(void *arg, u16 *len)
{
u16 buf_len = 0;
u8 ppgLength = 0;
vcHr11GetSampleValues(&vcHr11, &ppgLength);
LOG("oscFlg=%d ppgLength=%d readFlg=%d wearStatus=%d", vcHr11.oscCheckFinishFlag, ppgLength, vcHr11.vcFifoReadFlag, vcHr11.wearStatus);
if (vcHr11.vcFifoReadFlag && vcHr11.wearStatus) {
vcHr11.vcFifoReadFlag = 0;
if (ppgLength > 0) {
cbuf_write(sensor_info.cbuffer, vcHr11.sampleData.ppgValue, ppgLength * sizeof(u16));
}
}
return RET_OK;
}
REGISTER_SENSOR(sensor_hr) = {
.info = &sensor_info,
.online = sensor_check,
.open = sensor_open,
.close = sensor_close,
.run = sensor_process,
};
#endif
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,291 @@
#ifndef LIB_vcHr11_HCI_vcHr11HCI_H_
#define LIB_vcHr11_HCI_vcHr11HCI_H_
#include "stdint.h"
#include "sdk_config.h"
#include "includes.h"
#define Drive_Version V_1_9_4
#define HW_HALVE_POWER_CAP 1 //sample config param halve & oversample double
/* HW_LC09A_PROJ(1), single green led
* HW_LC09A_PROJ(0), 10A/11S project
*/
#define HW_LC09A_PROJ 1
/*****************************************************************************
*
* Register Address Declaration
*
******************************************************************************/
/* Read Only */
#define VCREG0 (0x00)
#define VCREG0_SIZE (1)
#define VCREG1 (0x01)
#define VCREG1_SIZE (1)
#define VCREG2 (0x02)
#define VCREG2_SIZE (1)
#define VCREG3 (0x03)
#define VCREG3_SIZE (1)
#define VCREG4 (0x04)
#define VCREG4_SIZE (1)
#define VCREG5 (0x05)
#define VCREG5_SIZE (1)
#define VCREG6 (0x06)
#define VCREG6_SIZE (1)
#define VCREG7 (0x07)
#define VCREG7_SIZE (2)
#define VCREG8 (0x09)
#define VCREG8_SIZE (2)
#define VCREG9 (0x80)
#define VCREG9_SIZE (128)
/* Write Only */
#define VCREG10 (0x3B)
#define VCREG10_SIZE (1)
/* Read or Write */
#define VCREG11 (0x10)
#define VCREG11_SIZE (1)
#define VCREG12 (0x11)
#define VCREG12_SIZE (1)
#define VCREG13 (0x12)
#define VCREG13_SIZE (1)
#define VCREG14 (0x13)
#define VCREG14_SIZE (1)
#define VCREG15 (0x14)
#define VCREG15_SIZE (2)
#define VCREG16 (0x16)
#define VCREG16_SIZE (1)
#define VCREG17 (0x17)
#define VCREG17_SIZE (1)
#define VCREG18 (0x18)
#define VCREG18_SIZE (1)
#define VCREG19 (0x19)
#define VCREG19_SIZE (1)
#define VCREG20 (0x1A)
#define VCREG20_SIZE (1)
#define VCREG21 (0x1B)
#define VCREG21_SIZE (1)
#define VCREG22 (0x1C)
#define VCREG22_SIZE (1)
#define VCREG23 (0x1D)
#define VCREG23_SIZE (1)
#define VCREG24 (0x1E)
#define VCREG24_SIZE (1)
#define VCREG25 (0x1F)
#define VCREG25_SIZE (1)
#define VCREG26 (0x20)
#define VCREG26_SIZE (1)
#define VCREG27 (0x21)
#define VCREG27_SIZE (1)
#define VCREG28 (0x22)
#define VCREG28_SIZE (1)
/* Bit fields for VCREG1s */
#define VCREG1_CONFLICT (0x01 << 4)
#define VCREG1_INSAMPLE (0x01 << 3)
#define VCREG1_INTPS (0x01 << 4)
#define VCREG1_INTOV (0x01 << 3)
#define VCREG1_INTFIFO (0x01 << 2)
#define VCREG1_INTENV (0x01 << 1)
#define VCREG1_INTPPG (0x01 << 0)
/* Threshold Settings */
#define VCENV_TH 8 //Causes of ENV interruption
#define VCPPG_TH 10 //Causes of PPG interruption PPG_TH = 300
#define VCPS_TH 4
#define VCADJUST_INCREASE 22 // 1.4 << 4 = 22.4//1.4f
#define VCADJUST_DECREASE 11 // 0.7 << 4 = 11.2//0.7f
#define VCADJUST_STEP_MAX 32
#define VCADJUST_STEP_MIN 1
#define VCUNWEAR_CNT 3
#define VCISWEAR_CNT 1
#define SLOTCHNU 3
#define VCWEAR_STATUS_DETECTION_OFF 0
#define VCWEAR_STATUS_DETECTION_ON 1
#define VCWEAR_STATUS_DETECTION_MODE VCWEAR_STATUS_DETECTION_ON
#define VCWEAR_READ_FIFO_BY_TIME (0)
#define VCWEAR_READ_FIFO_BY_INT (1)
#if TCFG_HR_SENSOR_READ_BY_INT
#define VCWEAR_READ_FIFO_MODE VCWEAR_READ_FIFO_BY_INT
#else
#define VCWEAR_READ_FIFO_MODE VCWEAR_READ_FIFO_BY_TIME
#endif
#define SportMotionEn 0
#define BiometricEn 0
/*****************************************************************************
*
* Data Type Declaration
*
******************************************************************************/
typedef enum {
VCWORK_MODE_HRWORK = 0,
VCWORK_MODE_CROSSTALKTEST = 1,
VCWORK_MODE_SPO2WORK = 2,
VCWORK_MODE_GSENSORWORK = 3,
VCWORK_MODE_TEMPWORK = 4,
VCWORK_MODE_NOISEWORK = 5,
VCWORK_MODE_LPDETECTION = 6,
VCWORK_MODE_POWER_OFF = 255,
} vcHr11Mode_t;
typedef enum {
VCHR11ADJUSTDIRECTION_NULL = 0,
VCHR11ADJUSTDIRECTION_UP = 1,
VCHR11ADJUSTDIRECTION_DOWN = 2,
} vcHr11AdjustDirection;
typedef enum {
VERSION_A = 0,
VERSION_B = 1,
} vcHr11Version_t;
typedef struct {
vcHr11AdjustDirection direction;
vcHr11AdjustDirection directionLast;
uint16_t step;
} vcHr11AdjustInfo_t;
typedef enum {
VCHR11WEARST_UNWEAR = 0,
VCHR11WEARST_ISWEAR = 1,
} vcHr11WearStatus_e;
typedef enum {
VCHR11RET_ISOK = 0,
VCHR11RET_ISWEARTOUNWEAR = 1,
VCHR11RET_UNWEARTOISWEAR = 2,
VCHR11RET_ISERR = 4,
VCHR11RET_ISCONFLICT = 8,
VCHR11RET_ISINSAMPLE = 16,
VCHR11RET_SOLTISOVERLOAD = 32,
VCHR11RET_PSISOVERLOAD = 64,
VCHR11RET_ENVCURRENTISLARGE = 128,
VCHR11RET_PSENVCURRENTISLARGE = 256,
VCHR11RET_PPGCANNOTADJUSTABLE = 512,
VCHR11RET_FIFOISOVERFLOW = 1024,
VCHR11RET_PDRESISMAX = 2048,
VCHR11RET_PDRESCANNOTRELEASE = 4096,
} vcHr11Ret_t;
typedef struct {
uint8_t maxLedCur;
uint8_t pdResValue[3];
uint8_t currentValue[3];
uint8_t psValue; //PS Sample value.
uint8_t preValue[2]; //Environment Sample value.
uint8_t envValue[3]; //Environment Sample value.
uint16_t ppgValue[128]; //PPG sample value.
} vcHr11SampleData_t;
typedef struct {
bool isRunning;
bool vcFifoReadFlag;
bool vcPsFlag;
bool oscCheckFinishFlag;
uint8_t regConfig[17];
uint8_t unWearCnt;
uint8_t isWearCnt;
uint8_t vcHr11Status;
uint8_t intReason;
uint8_t devId;
vcHr11Mode_t workMode;
vcHr11Version_t version;
vcHr11WearStatus_e wearStatus;
uint16_t vcSampleRate;
uint16_t mcuOscValue;
uint16_t mcuSclRate;
vcHr11AdjustInfo_t adjustInfo[2];
vcHr11SampleData_t sampleData;
} vcHr11_t;
/*****************************************************************************
* Function Declaration
******************************************************************************/
/*
* @brief
* Get sample datas from vcHr11.
*
**/
vcHr11Ret_t vcHr11GetSampleValues(vcHr11_t *pvcHr11, uint8_t *DataLen);
/*
* @brief
* Manual start sample of vcHr11.
*
**/
vcHr11Ret_t vcHr11StartSample(vcHr11_t *pvcHr11);
/*
* @brief
* Manual stop sample of vcHr11.
*
**/
vcHr11Ret_t vcHr11StopSample(vcHr11_t *pvcHr11);
/*
* @brief
* Manual SoftReset the vcHr11
*
**/
vcHr11Ret_t vcHr11SoftReset(vcHr11_t *pvcHr11);
/*
* @brief
* init the vcHr11
*
**/
extern void vcHr11Init(vcHr11_t *pVcHr11, vcHr11Mode_t vcHr11WorkMode);
/*
* @brief
*
**/
extern vcHr11Ret_t vcHr11ReadRegisters(uint8_t startAddress, uint8_t *pRegisters, uint8_t len);
/*
* @brief
*
*
**/
extern vcHr11Ret_t vcHr11WriteRegisters(uint8_t startAddress, uint8_t *pRegisters, uint8_t len);
/*
* @brief
* Write Registers to vcHr11. This function needs to be implemented
* according to the MCU.
**/
extern uint32_t vcHr11GetRtcCountFromMCU(void);
/*
* @brief
*
*
**/
extern void green_led_off_state_gsensor_abs_sum_diff_func(int32_t x_axis_value, int32_t y_axis_value, int32_t z_axis_value);
typedef vcHr11Ret_t (* vcHr11_read_cb)(uint8_t startAddress, uint8_t *pRegisters, uint8_t len);
typedef vcHr11Ret_t (* vcHr11_write_cb)(uint8_t startAddress, uint8_t *pRegisters, uint8_t len);
#define DEBUG_LOG(fmt,...) //printf("[vchr] %s " fmt "\n",__func__, ##__VA_ARGS__)
#endif
+179
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#include "sensor_driver.h"
#include "includes.h"
#include "uart.h"
#include "debug.h"
#include "gpio.h"
#include "bank_switch.h"
#include "usr_timer.h"
#include "iic_api.h"
#if CONFIG_SENSOR_DRIVER_ENABLE
#define LOG(fmt,...) printf("[driver] %s " fmt "\n",__func__, ##__VA_ARGS__)
static u8 sensor_timer_msec = 200;
u8 sensor_write(u8 iic_dev_addr, u8 register_address, u8 *buf, u8 data_len)
{
int ret = hw_i2c_master_write_nbytes_to_device_reg(HW_IIC_0, iic_dev_addr, &register_address, 1, buf, data_len);
return ret == data_len ? RET_OK : RET_ERR;
}
u8 sensor_read(u8 iic_dev_addr, u8 register_address, u8 *buf, u8 data_len, u8 ignore_len)
{
int ret = hw_i2c_master_read_nbytes_from_device_reg(HW_IIC_0, iic_dev_addr, &register_address, 1, buf, data_len);
return ret == data_len ? RET_OK : RET_ERR;
}
SENSOR_INTERFACE *sensor_driver_find(sensor_type_t type)
{
SENSOR_INTERFACE *sensor_driver = NULL;
list_for_each_sensor(sensor_driver) {
if (sensor_driver->info->type == type) {
return sensor_driver;
}
}
return NULL;
}
void sensor_info_printf(void)
{
#if CONFIG_UART_DEBUG_ENABLE
printf("\n\n******** sensor info ********\n");
SENSOR_INTERFACE *driver = NULL;
list_for_each_sensor(driver) {
printf("\nname : %s\n", driver->info->name);
printf("type : %d\n", driver->info->type);
printf("state : %d\n", driver->info->state);
printf("range : +-%d +-%d +-%d +-%d\n", driver->info->range[0], driver->info->range[1], driver->info->range[2], driver->info->range[3]);
printf("odr : %d %d %d %d\n", driver->info->odr[0], driver->info->odr[1], driver->info->odr[2], driver->info->odr[3]);
}
printf("\n****** sensor info end ******\n\n");
#endif
}
void sensor_driver_check(void)
{
SENSOR_INTERFACE *sensor_driver = NULL;
list_for_each_sensor(sensor_driver) {
if ((sensor_driver->online != NULL) && (sensor_driver->online() == RET_OK)) {
sensor_driver->info->state = SENSOR_STATE_ONLINE;
} else {
sensor_driver->info->state = SENSOR_STATE_OFFLINE;
}
}
//发送sensor_drvier_info给大核
int msg[3];
msg[0] = MSG_P11_SENSOR_INFO;
msg[1] = (int)&sensor_dev_begin;
msg[2] = (int)&sensor_dev_end;
int ret = p2m_post_msg(MSG_APP, 0, (u8 *)msg, sizeof(msg));
LOG("begin=%x end=%x ret=%d", (u32)sensor_dev_begin, (u32)sensor_dev_end, ret);
sensor_info_printf();
}
static void sensor_timer_irq_handle(void *priv)
{
task_post_msg(NULL, 1, MSG_P11_SYS_KICK);
}
void sensor_timer_enable(u8 enable)
{
static u16 timer_handle = 0;
if (enable && timer_handle == 0) {
timer_handle = usr_timer_add(NULL, sensor_timer_irq_handle, sensor_timer_msec, 1);
LOG("handle=%d msec=%d", timer_handle, sensor_timer_msec);
} else if ((!enable) && (timer_handle > 0)) {
usr_timer_del(timer_handle);
timer_handle = 0;
LOG("handle=%d", timer_handle);
}
}
void sensor_timer_modify(u32 msec)
{
sensor_timer_msec = msec;
sensor_timer_enable(0);
sensor_timer_enable(1);
}
void sensor_driver_sleep(u8 type, u8 enable)
{
SENSOR_INTERFACE *sensor_driver = sensor_driver_find(type);
if (sensor_driver->sleep) {
LOG("type=%d enable=%d", type, enable);
sensor_driver->sleep();
sensor_timer_enable(!enable);
}
}
void sensor_driver_irq_handle(void)
{
__attribute__((weak)) s8 driver_sc7a20_is_wake(void);
if (driver_sc7a20_is_wake) {
if (driver_sc7a20_is_wake() == RET_OK) {
sensor_timer_enable(1);
}
}
}
void sensor_driver_init(u8 type, u8 enable, u16 range, u8 odr)
{
SENSOR_INTERFACE *sensor_driver = sensor_driver_find(type);
LOG("type=%d enable=%d range=%d odr=%d driver=%x", type, enable, range, odr, (u32)sensor_driver);
if ((sensor_driver != NULL) && (sensor_driver->open != NULL)) {
if (enable) {
if (sensor_driver->open(range, odr) == RET_OK) {
sensor_driver->info->state = SENSOR_STATE_OPEN;
sensor_timer_enable(1);
LOG("type %d sucess!", type);
} else {
LOG("type %d failed!", type);
}
} else {
if (sensor_driver->close() == RET_OK) {
sensor_driver->info->state = SENSOR_STATE_CLOSE;
LOG("type %d sucess!", type);
} else {
LOG("type %d failed!", type);
}
}
} else {
LOG("no driver for sensor %d", type);
}
}
void sensor_driver_run(void)
{
u16 data[30 * 3];
u16 size = sizeof(data);
SENSOR_INTERFACE *sensor_driver = NULL;
SENSOR_INTERFACE *acceler_algorithm = NULL;
acceler_algorithm = sensor_driver_find(SENSOR_ALGO_WRIST_TILT);
list_for_each_sensor(sensor_driver) {
if ((sensor_driver->info->type < SENSOR_DRV_MAX_NUM) &&
(sensor_driver->info->state == SENSOR_STATE_OPEN) && (sensor_driver->run)) {
sensor_driver->run(data, &size);
if ((sensor_driver->info->type == SENSOR_DRV_ACCELER) &&
(acceler_algorithm != NULL) && (acceler_algorithm->run)) {
acceler_algorithm->run(data, &size);
}
}
}
}
#endif
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#pragma once
#include "includes.h"
#include "circular_buf.h"
#include "main.h"
#define RET_OK (1)
#define RET_ERR (0)
typedef enum {
SENSOR_DRV_ACCELER = 0x00,
SENSOR_DRV_GYRO,
SENSOR_DRV_MAGNETIC,
SENSOR_DRV_HR,
SENSOR_DRV_SPO2,
SENSOR_DRV_HR_SPO2,
SENSOR_DRV_WEAR_DETECTION,
SENSOR_DRV_TEMP,
SENSOR_DRV_MAX_NUM,
SENSOR_ALGO_WRIST_TILT = 0x20,
SENSOR_ALGO_HR,
SENSOR_ALGO_SPO2,
SENSOR_ALGO_STEP_COUNTER,
} sensor_type_t;
typedef enum {
SENSOR_STATE_OFFLINE = 0,
SENSOR_STATE_ONLINE = 1,
SENSOR_STATE_CLOSE = 1,
SENSOR_STATE_OPEN = 2,
} sensor_state_t;
typedef struct {
u8 addr;
u8 value;
} sensor_regs_t;
typedef struct {
u8 type;
u8 state;
u8 name[20];
u8 odr[4];
u16 range[4];
cbuffer_t *cbuffer;
} sensor_info_t;
typedef struct {
u8 type;
u8 enable;
u8 odr;
u16 range;
} p11_sensor_t;
typedef struct {
sensor_info_t *info;
s8(*open)(u16 range, u16 odr);
s8(*close)(void);
s8(*run)(void *arg, u16 *len);
s8(*online)(void);
s8(*sleep)(void);
} SENSOR_INTERFACE;
extern SENSOR_INTERFACE sensor_dev_begin[];
extern SENSOR_INTERFACE sensor_dev_end[];
#define REGISTER_SENSOR(Sensor) \
static const SENSOR_INTERFACE Sensor SEC_USED(.sensor_dev)
#define list_for_each_sensor(c) \
for (c=sensor_dev_begin; c<sensor_dev_end; c++)
typedef struct {
short x;
short y;
short z;
} axis_data_t;
u8 sensor_write(u8 w_chip_id, u8 register_address, u8 *buf, u8 data_len);
u8 sensor_read(u8 r_chip_id, u8 register_address, u8 *buf, u8 data_len, u8 ignore_len);
void sensor_timer_modify(u32 msec);
void sensor_driver_check(void);
void sensor_driver_init(u8 type, u8 enable, u16 range, u8 odr);
void sensor_driver_run(void);
void sensor_driver_sleep(u8 type, u8 enable);
void sensor_driver_irq_handle(void);
@@ -0,0 +1,88 @@
#include "sdk_config.h"
#include "sensor_driver.h"
#include "includes.h"
#include "sensor_service_wrist_tilt.h"
#if CONFIG_SENSOR_DRIVER_ENABLE
#define LOG(fmt,...) printf("[algo] %s() " fmt "\n",__func__, ##__VA_ARGS__)
enum {
MSYS_STATE_NORMAL = 0,
MSYS_STATE_PWR_DOWN,
MSYS_STATE_PWR_OFF,
MSYS_STATE_SOFT_PWR_OFF,
MSYS_STATE_SOFT_PWR_OFF_KEEP_NVRAM,
MSYS_STATE_LIGHT_PWR_DOWN,
};
#define MSYS_STATE_GET() (P11_SYSTEM->P11_SYS_CON0 & 0xf)
static sensor_info_t sensor_info = {
.type = SENSOR_ALGO_WRIST_TILT,
.name = "JL GESTURE V1.0",
};
static s8 wrist_tilt_online(void)
{
return RET_OK;
}
static void wrist_tilt_event_response(u8 event)
{
static u8 p11_algo_event;
p11_algo_event = event;
u8 low_power_mode = MSYS_STATE_GET() != MSYS_STATE_NORMAL;
if (p11_algo_event == ALGO_WRIST_DOWN && low_power_mode) {
return;
}
LOG(" %d", event);
//发送 算法事件 给大核
int msg[2];
msg[0] = MSG_P11_ALGORITHM_EVENT;
msg[1] = p11_algo_event;
p2m_post_msg(MSG_APP, 0, (u8 *)msg, sizeof(msg));
}
s8 wrist_tilt_run(void *arg, u16 *len)
{
axis_data_t *accel_data = arg;
u8 accel_point = *len / sizeof(axis_data_t);
jl_gesture_event_t gesture_event = ALGO_NOTHING;
for (u8 i = 0; i < accel_point; i++) {
gesture_event = sensor_jl_gesture_run(accel_data[i].x, accel_data[i].y, accel_data[i].z);
if (sensor_info.state == SENSOR_STATE_OPEN && gesture_event != ALGO_NOTHING) {
wrist_tilt_event_response(gesture_event);
}
// LOG("gesture=%d,xyz:%d,%d,%d",gesture_event,accel_data[i].x,accel_data[i].y,accel_data[i].z);
}
return RET_OK;
}
static s8 wrist_tilt_open(u16 range, u16 odr)
{
return RET_OK;
}
static s8 wrist_tilt_close(void)
{
return RET_OK;
}
REGISTER_SENSOR(wrist_tilt) = {
.info = &sensor_info,
.online = wrist_tilt_online,
.open = wrist_tilt_open,
.close = wrist_tilt_close,
.run = wrist_tilt_run,
};
#endif
@@ -0,0 +1,53 @@
#pragma once
typedef enum {
ALGO_NOTHING, //没有相关动作
ALGO_WRIST_UP, //抬腕动作
ALGO_WRIST_DOWN, //落腕动作
ALGO_DOUBLE_CLICK, //双击屏幕
ALGO_HITTING, //击球动作
ALGO_ON_DESK, //放置桌面
} jl_gesture_event_t;
/* --------------------------------------------------------------------------*/
/*
* @brief 杰理手势算法 获取版本号
*
* @param [out] 10~255
*
*--------------------------------------------------------------------------*/
unsigned char sensor_jl_gesture_ver(void);
/* --------------------------------------------------------------------------*/
/*
* @brief 杰理手势算法 开启debug模式
*
* @param [in] enable 0:关闭log打印 1:开启log打印
*
*--------------------------------------------------------------------------*/
void sensor_jl_gesture_debug(char enable);
/* --------------------------------------------------------------------------*/
/*
* @brief 杰理手势算法 设置抬腕算法的角度
*
* @param [in] angle [0]:翻腕角度,默认5 [1]:手腕与水平面的角度,默认<45
*
*--------------------------------------------------------------------------*/
void sensor_jl_gesture_set_wrist_angle(char angle[2]);
/* --------------------------------------------------------------------------*/
/*
* @brief 杰理手势算法 运行接口
*
* @param [in] x accelerate x轴数据
* @param [in] y accelerate y轴数据
* @param [in] z accelerate z轴数据
* @param [out] 算法输出,见 jl_gesture_event_t 定义
*
*--------------------------------------------------------------------------*/
jl_gesture_event_t sensor_jl_gesture_run(short x, short y, short z);
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@@ -0,0 +1,6 @@
#ifndef __BSP_H__
#define __BSP_H__
void bsp_init();
#endif
@@ -0,0 +1,216 @@
#ifndef __BOOT_XOSC_H__
#define __BOOT_XOSC_H__
#include "config.h"
#define RCH_CLK (16000000) //
#define XOSC_LDO 0x8
#define LRC24M_CAPS 0b011
#define LRC24M_IS 0b1
#define LRC24M_RS 0b0111
#define wla_con8_init_doublepin \
/*XOSC_EN_11v_1bit */ ((0&0x1)<<0) | \
/*XMDET_EN_1bit */ ((0&0x1)<<1) | \
/*XMDET_S_2bit */ ((0&0x3)<<2) | \
/*XOSC_AAC_EN_1bit */ ((0&0x1)<<4) | \
/*XOSC_AAC_S_2bit */ ((2&0x3)<<5) | \
/*XOSC_BIAS_EN_1bit */ ((1&0x1)<<7) | \
/*XOSC_BT_OE_1bit */ ((0&0x1)<<8) | \
/*XOSC_CK1X_OE_1bit */ ((0&0x1)<<9) | \
/*XOSC_CK2X_OE_1bit */ ((0&0x1)<<10) | \
/*XOSC_CK2X_S_3bit */ ((4&0x7)<<11) | \
/*XOSC_CKAIN_EN_1bit */ ((0&0x1)<<14) | \
/*XOSC_CKAIN_S_2bit */ ((2&0x3)<<15) | \
/*XOSC_CLS_S_5bit */ ((10&0x1f)<<17) | \
/*XOSC_CRS_S_5bit */ ((10&0x1f)<<22) | \
/*XOSC_EXT_EN_1bit */ ((0&0x1)<<27) | \
/*XOSC_GMBST_EN_1bit */ ((1&0x1)<<28) | \
/*XOSC_HCS_3bit */ ((6&0x7)<<29)
#define wla_con9_init_doublepin \
/*XOSC_LDO_BYPASS_1bit */ ((0&0x1)<<0) | \
/*XOSC_LDO_S_4bit */ ((XOSC_LDO&0xf)<<1) | \
/*XOSC_PMU_OE_1bit */ ((0&0x1)<<5) | \
/*XOSC_RESV_1bit */ ((0&0x1)<<6) | \
/*XOSC_SPIN_EN_1bit */ ((0&0x1)<<7) | \
/*XOSC_SPIN_S_2bit */ ((0&0x3)<<8) | \
/*XOSC_SYNEN_1bit */ ((0&0x1)<<10) | \
/*XOSC_SYS_OE_1bit */ ((0&0x1)<<11) | \
/*XOSC_TEST_OE_1bit */ ((0&0x1)<<12) | \
/*XOSC_TEST_S_2bit */ ((0&0x3)<<13)
#define wla_con8_init_singlepin \
/*XOSC_EN_11v_1bit */ ((0&0x1)<<0) | \
/*XMDET_EN_1bit */ ((0&0x1)<<1) | \
/*XMDET_S_2bit */ ((0&0x3)<<2) | \
/*XOSC_AAC_EN_1bit */ ((0&0x1)<<4) | \
/*XOSC_AAC_S_2bit */ ((2&0x3)<<5) | \
/*XOSC_BIAS_EN_1bit */ ((1&0x1)<<7) | \
/*XOSC_BT_OE_1bit */ ((0&0x1)<<8) | \
/*XOSC_CK1X_OE_1bit */ ((0&0x1)<<9) | \
/*XOSC_CK2X_OE_1bit */ ((0&0x1)<<10) | \
/*XOSC_CK2X_S_3bit */ ((4&0x7)<<11) | \
/*XOSC_CKAIN_EN_1bit */ ((0&0x1)<<14) | \
/*XOSC_CKAIN_S_2bit */ ((2&0x3)<<15) | \
/*XOSC_CLS_S_5bit */ ((0x1a&0x1f)<<17) | \
/*XOSC_CRS_S_5bit */ ((0xc&0x1f)<<22) | \
/*XOSC_EXT_EN_1bit */ ((0&0x1)<<27) | \
/*XOSC_GMBST_EN_1bit */ ((1&0x1)<<28) | \
/*XOSC_HCS_3bit */ ((6&0x7)<<29)
#define wla_con9_init_singlepin \
/*XOSC_LDO_BYPASS_1bit */ ((0&0x1)<<0) | \
/*XOSC_LDO_S_4bit */ ((XOSC_LDO&0xf)<<1) | \
/*XOSC_PMU_OE_1bit */ ((0&0x1)<<5) | \
/*XOSC_RESV_1bit */ ((0&0x1)<<6) | \
/*XOSC_SPIN_EN_1bit */ ((1&0x1)<<7) | \
/*XOSC_SPIN_S_2bit */ ((1&0x3)<<8) | \
/*XOSC_SYNEN_1bit */ ((0&0x1)<<10) | \
/*XOSC_SYS_OE_1bit */ ((0&0x1)<<11) | \
/*XOSC_TEST_OE_1bit */ ((0&0x1)<<12) | \
/*XOSC_TEST_S_2bit */ ((0&0x3)<<13)
#define wla_con8_init_detect \
/*XOSC_EN_11v_1bit */ ((0&0x1)<<0) | \
/*XMDET_EN_1bit */ ((0&0x1)<<1) | \
/*XMDET_S_2bit */ ((0&0x3)<<2) | \
/*XOSC_AAC_EN_1bit */ ((0&0x1)<<4) | \
/*XOSC_AAC_S_2bit */ ((0&0x3)<<5) | \
/*XOSC_BIAS_EN_1bit */ ((0&0x1)<<7) | \
/*XOSC_BT_OE_1bit */ ((0&0x1)<<8) | \
/*XOSC_CK1X_OE_1bit */ ((0&0x1)<<9) | \
/*XOSC_CK2X_OE_1bit */ ((0&0x1)<<10) | \
/*XOSC_CK2X_S_3bit */ ((0&0x7)<<11) | \
/*XOSC_CKAIN_EN_1bit */ ((1&0x1)<<14) | \
/*XOSC_CKAIN_S_2bit */ ((3&0x3)<<15) | \
/*XOSC_CLS_S_5bit */ ((0&0x1f)<<17) | \
/*XOSC_CRS_S_5bit */ ((0&0x1f)<<22) | \
/*XOSC_EXT_EN_1bit */ ((0&0x1)<<27) | \
/*XOSC_GMBST_EN_1bit */ ((0&0x1)<<28) | \
/*XOSC_HCS_3bit */ ((0&0x7)<<29)
#define wla_con9_init_detect \
/*XOSC_LDO_BYPASS_1bit */ ((1&0x1)<<0) | \
/*XOSC_LDO_S_4bit */ ((0&0xf)<<1) | \
/*XOSC_PMU_OE_1bit */ ((0&0x1)<<5) | \
/*XOSC_RESV_1bit */ ((0&0x1)<<6) | \
/*XOSC_SPIN_EN_1bit */ ((0&0x1)<<7) | \
/*XOSC_SPIN_S_2bit */ ((0&0x3)<<8) | \
/*XOSC_SYNEN_1bit */ ((0&0x1)<<10) | \
/*XOSC_SYS_OE_1bit */ ((0&0x1)<<11) | \
/*XOSC_TEST_OE_1bit */ ((0&0x1)<<12) | \
/*XOSC_TEST_S_2bit */ ((0&0x3)<<13)
#define p11_clock_lrc24mcfg0 \
/*LRC24M_EN_11v */ ((0&0x1)<<0 )| \
/*LRC24M_CKOE_L_11v */ ((0&0x1)<<1 )| \
/*LRC24M_CKOE_H_11v */ ((0&0x1)<<2 )| \
/*LRC24M_CAPS0_2_11v */ ((lrc24m_caps&0x7)<<4 )| \
/*LRC24M_IS0_1_11v */ ((lrc24m_is&0x3)<<8 )| \
/*LRC24M_RS0_3_11v */ ((lrc24m_rs&0xf)<<12)| \
/*LRC24M_LFSREN_11v */ ((0&0x1)<<16)| \
/*LRC24M_LFSR_CKSEL_11v */ ((0&0x1)<<17)| \
/*LRC24M_LFSR_RS_11v */ ((0&0x1)<<18)| \
/*LRC24M_TEST_EN_11v */ ((0&0x1)<<20)| \
/*LRC24M_TEST_S0_11v */ ((0&0x1)<<21)
#define LRC24M_CAPS0_2_11v(x) SFR(P11_CLOCK->LRC24M_CFG0,4,3,(x))
#define LRC24M_IS0_1_11v(x) SFR(P11_CLOCK->LRC24M_CFG0,8,2,(x))
#define LRC24M_RS0_3_11v(x) SFR(P11_CLOCK->LRC24M_CFG0,12,4,(x))
#define LRC24M_EN_11v(x) SFR(P11_CLOCK->LRC24M_CFG0,0,1,(x))
#define LRC24M_CKOE_L_11v(x) SFR(P11_CLOCK->LRC24M_CFG0,1,1,(x))
#define LRC24M_LFSREN(x) SFR(P11_CLOCK->LRC24M_CFG0,16,1,(x))
#if COMPILE_CPU
#define XOSC_SFR_CONA JL_WLA->WLA_CON8
#define XOSC_SFR_CONB JL_WLA->WLA_CON9
#define XOSC_SFR_CONC JL_WLA->WLA_CON23
#define W_btosc_24m_cken(x) SFR(XOSC_SFR_CONC,0,1,(x))
#define W_btosc_48m_cken(x) SFR(XOSC_SFR_CONC,1,1,(x))
#else
#define XOSC_SFR_CONA P11_CLOCK->XOSC_CFG0
#define XOSC_SFR_CONB P11_CLOCK->XOSC_CFG1
#define XOSC_SFR_CONC P11_CLOCK->CLKCFG_CFG0
#define W_btosc_24m_cken(x) SFR(XOSC_SFR_CONC,1,1,(x))
#define W_btosc_48m_cken(x) SFR(XOSC_SFR_CONC,2,1,(x))
#endif
#define W_XMDET_EN_1(x) SFR(XOSC_SFR_CONA,1,1,(x))
#define W_XMDET_S_2(x) SFR(XOSC_SFR_CONA,2,2,(x))
#define W_XOSC_AAC_EN_1(x) SFR(XOSC_SFR_CONA,4,1,(x))
#define W_XOSC_AAC_S_2(x) SFR(XOSC_SFR_CONA,5,2,(x))
#define W_XOSC_BIAS_EN_1(x) SFR(XOSC_SFR_CONA,7,1,(x))
#define W_XOSC_BT_OE_1(x) SFR(XOSC_SFR_CONA,8,1,(x))
#define W_XOSC_CK1X_OE_1(x) SFR(XOSC_SFR_CONA,9,1,(x))
#define W_XOSC_CK2X_OE_1(x) SFR(XOSC_SFR_CONA,10,1,(x))
#define W_XOSC_CK2X_S_3(x) SFR(XOSC_SFR_CONA,11,3,(x))
#define W_XOSC_CKAIN_EN_1(x) SFR(XOSC_SFR_CONA,14,1,(x))
#define W_XOSC_CKAIN_S_2(x) SFR(XOSC_SFR_CONA,15,2,(x))
#define W_XOSC_CLS_S_5(x) SFR(XOSC_SFR_CONA,17,5,(x))
#define W_XOSC_CRS_S_5(x) SFR(XOSC_SFR_CONA,22,5,(x))
#define W_XOSC_EN_1(x) SFR(XOSC_SFR_CONA,0,1,(x))
#define W_XOSC_EXT_EN_1(x) SFR(XOSC_SFR_CONA,27,1,(x))
#define W_XOSC_GMBST_EN_1(x) SFR(XOSC_SFR_CONA,28,1,(x))
#define W_XOSC_HCS_3(x) SFR(XOSC_SFR_CONA,29,3,(x))
#define W_XOSC_LDO_BYPASS_1(x) SFR(XOSC_SFR_CONB,0,1,(x))
#define W_XOSC_LDO_S_4(x) SFR(XOSC_SFR_CONB,1,4,(x))
#define W_XOSC_PMU_OE_1(x) SFR(XOSC_SFR_CONB,5,1,(x))
#define W_XOSC_RESV_1(x) SFR(XOSC_SFR_CONB,6,1,(x))
#define W_XOSC_SPIN_EN_1(x) SFR(XOSC_SFR_CONB,7,1,(x))
#define W_XOSC_SPIN_S_2(x) SFR(XOSC_SFR_CONB,8,2,(x))
#define W_XOSC_SYNEN_1(x) SFR(XOSC_SFR_CONB,10,1,(x))
#define W_XOSC_SYS_OE_1(x) SFR(XOSC_SFR_CONB,11,1,(x))
#define W_XOSC_TEST_OE_1(x) SFR(XOSC_SFR_CONB,12,1,(x))
#define W_XOSC_TEST_S_2(x) SFR(XOSC_SFR_CONB,13,2,(x))
#define XOSC_CLS40_CRS40(x,y) SFR(XOSC_SFR_CONA, 17, 10,(x|(y<<5)))
#define BTXOSC_INIT_FLAG_SUCCESS 1
#define BTXOSC_INIT_FLAG_NOTSURE 0
#define BTOSC_FREQ 24000000
#define PRECISION 1
#define GPC_MUL 7 //precision 0.5% 32*2^8=8192 1/8192=0.012%
#define GPCNT_NUM 1
#define GPCNT_INT 16
#define debug(x) JL_TIMER3->CNT=x
typedef enum {
GPCNT_RC16M = 3,
GPCNT_LRC24M = 7,
GPCNT_BTOSC = 8,
GPCNT_STD24M = 15,
} GPCNT_typedef;
typedef enum {
P11_GPCNT_RC16M = 1,
P11_GPCNT_BTOSC = 4,
P11_GPCNT_LRC24M = 5,
P11_GPCNT_STD24M = 8,
} GPCNT_typedef_P11;
void ic_btosc_init(void);
void lrc24m_init(void(*udly)(u32), u8 lrc24m_caps, u8 lrc24m_rs, u8 lrc24m_is);
void btosc_ctl_src(void);
void btosc_init_normal(void (*udly)(u32), u8 xosc_pin_mode, u8 xosc_ldo);
void btosc_init_ext_clk(void (*udly)(u32), void(*udly_margin)(u32), u8 xosc_pin_mode, u8 xosc_ldo);
unsigned int gpcnt_clk_cnt(u64 mul, GPCNT_typedef css_clk, GPCNT_typedef gss_clk);
unsigned char btxosc_init_check(void(*udly)(u32), u32 GSS_FREQ, u32 check_time_ms);
void open_xosc(void);
#endif /*BOOT_XOSC_H*/
@@ -0,0 +1,13 @@
#ifndef __CLOCK_H__
#define __CLOCK_H__
void clock_early_init();
u32 lrc_get_avg_freq(void);
enum {
MSG_CLOCK_LRC24M_OK = 1,
};
#endif
@@ -0,0 +1,8 @@
#ifndef _CONFIG_
#define _CONFIG_
#define P11_CORE 0
#define SYS_CORE 1
#define COMPILE_CPU P11_CORE
#endif
@@ -0,0 +1,22 @@
//***********************************************
// File Name: p11_clk_cfg.h
// Author: Luocong
// Mail: cong_luo@zh-jieli.com
// Create Time: 2024年05月09日 星期四 10时14分13秒
//***********************************************
#ifndef __P11_CLK_CFG__
#define __P11_CLK_CFG__
void p11_lp_lrc24m_cfg(u32 cap, u32 rs, u32 is);
u8 get_lrc24m_caps(void);
u8 get_lrc24m_rs(void);
u8 get_lrc24m_is(void);
void p11_lp_btosc_cfg(u32 pin_mode, u32 ldo, u32 enable);
u8 get_btxosc_pin_mode(void);
u8 get_xosc_ldo(void);
u8 get_lp_btosc_enable(void);
#endif
@@ -0,0 +1,11 @@
#ifndef __CLOCK_INTERFACE_H__
#define __CLOCK_INTERFACE_H__
#include "includes.h"
#include "clock/boot_xosc.h"
#include "clock/p11_clk_cfg.h"
#include "clock/clock.h"
#endif
+85
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@@ -0,0 +1,85 @@
/*********************************************************************************************
* Filename : gpio.h
* Description : 本文件存放p11 gpio的接口函数和宏定义
* Author : MoZhiYe
* Email : mozhiye@zh-jieli.com
* Last modifiled : 2021-05-17 09:00
* Copyright:(c)JIELI 2021-2029 @ , All Rights Reserved.
*********************************************************************************************/
#ifndef __GPIO_H__
#define __GPIO_H__
#define IO_GROUP_NUM 16
//PB0 ~ PB13
#define IO_PORTB_00 (IO_GROUP_NUM * 1 + 0)
#define IO_PORTB_01 (IO_GROUP_NUM * 1 + 1)
#define IO_PORTB_02 (IO_GROUP_NUM * 1 + 2)
#define IO_PORTB_03 (IO_GROUP_NUM * 1 + 3)
#define IO_PORTB_04 (IO_GROUP_NUM * 1 + 4)
#define IO_PORTB_05 (IO_GROUP_NUM * 1 + 5)
#define IO_PORTB_06 (IO_GROUP_NUM * 1 + 6)
#define IO_PORTB_07 (IO_GROUP_NUM * 1 + 7)
#define IO_PORTB_08 (IO_GROUP_NUM * 1 + 8)
#define IO_MAX_NUM (IO_PORTB_08 + 1)
#ifndef EINVAL
#define EINVAL 22 /* Invalid argument */
#endif /* #ifndef EINVAL */
#ifndef EFAULT
#define EFAULT 14 /* Bad address */
#endif /* #ifndef EFAULT */
enum gpio_drive_strength {
PORT_DRIVE_STRENGT_2p4mA, ///< 最大驱动电流 2.4mA
PORT_DRIVE_STRENGT_8p0mA, ///< 最大驱动电流 8.0mA
PORT_DRIVE_STRENGT_24p0mA, ///< 最大驱动电流 24.0mA
PORT_DRIVE_STRENGT_64p0mA, ///< 最大驱动电流 64.0mA
};
//===================================================//
// BR27 P11 Crossbar API
//===================================================//
enum PFI_TABLE {
PFI_GP_ICH0 = ((u32)(&(P11_IMAP->P11_FI_GP_ICH0))),
PFI_GP_ICH1 = ((u32)(&(P11_IMAP->P11_FI_GP_ICH1))),
PFI_GP_ICH2 = ((u32)(&(P11_IMAP->P11_FI_GP_ICH2))),
PFI_UART0_RX = ((u32)(&(P11_IMAP->P11_FI_UART0_RX))),
PFI_IIC_SCL = ((u32)(&(P11_IMAP->P11_FI_IIC_SCL))),
PFI_IIC_SDA = ((u32)(&(P11_IMAP->P11_FI_IIC_SDA))),
};
int gpio_set_direction(u32 gpio, u32 dir);
int gpio_set_output_value(u32 gpio, u32 value);
int gpio_set_pull_up(u32 gpio, u32 value);
int gpio_set_pull_down(u32 gpio, int value);
int gpio_set_hd(u32 gpio, int value);
int gpio_set_die(u32 gpio, int value);
int gpio_set_dieh(u32 gpio, int value);
int gpio_set_spl(u32 gpio, int value);
int gpio_read(u32 gpio);
int gpio_set_fun_output_port(u32 gpio, u32 fun_index, u8 dir_ctl, u8 data_ctl);
int gpio_disable_fun_output_port(u32 gpio);
int gpio_set_fun_input_port(u32 gpio, enum PFI_TABLE pfun);
int gpio_disable_fun_input_port(enum PFI_TABLE pfun);
#endif /* #ifndef __GPIO_H__ */
+123
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@@ -0,0 +1,123 @@
#ifndef _IIC_API_H_
#define _IIC_API_H_
#include "typedef.h"
#include "gpio.h"
enum iic_state_enum {
IIC_OK = 0,
IIC_ERROR_INIT_FAIL = -1,
IIC_ERROR_NO_INIT = -2,
IIC_ERROR_SUSPEND_FAIL = -3,
IIC_ERROR_RESUME_FAIL = -4,
IIC_ERROR_BUSY = -5,
IIC_ERROR_PARAM_ERROR = -6,
IIC_ERROR_DEV_ADDR_ACK_ERROR = -7,
IIC_ERROR_REG_ADDR_ACK_ERROR = -8,
IIC_ERROR_INDEX_ERROR = -9,
IIC_ERROR_FREQUENCY_ERROR = -10,
IIC_ERROR_RESLOCK_BUSY = -11,
IIC_ERROR_MASTER_ERROR = -12,//iic主机卡死
};
enum iic_role {IIC_MASTER, IIC_SLAVE};
struct iic_master_config {
enum iic_role role; //软件只有IIC_MASTER
int scl_io;
int sda_io;
u8 io_mode;//1:上拉或0:浮空
enum gpio_drive_strength hdrive; //enum GPIO_HDRIVE 0:2.4MA, 1:8MA, 2:26.4MA, 3:40MA
u32 master_frequency; //软件iic频率(hz 不准)
u8 ie_en; //中断使能
u8 irq_priority; //中断
//br27,28,36:0:close filter; 1:enable filter
//br50:0:close filter; 1:<1*Tiic_baud_clk, 2:<2*Tiic_baud_clk, 3:<3*Tiic_baud_clk
u8 io_filter;
};
#include "iic_soft.h"
#include "iic_hw_v2.h"
// #include "iic_hw_v1.h"
/******************************soft iic*****************************/
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: <0:error, =read_len:ok
int soft_i2c_master_read_nbytes_from_device_reg(soft_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *read_buf, int read_len);//缓存buf,读取长度
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: =write_len:ok, other:error
int soft_i2c_master_write_nbytes_to_device_reg(soft_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *write_buf, int write_len);//数据buf, 写入长度
/******************************hw iic master*****************************/
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: <0:error, =read_len:ok
int hw_i2c_master_read_nbytes_from_device_reg(hw_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *read_buf, int read_len);//缓存buf,读取长度
//如果无reg_addr:reg_addr=NULL,reg_len=0
//return: =write_len:ok, other:error
int hw_i2c_master_write_nbytes_to_device_reg(hw_iic_dev iic,
unsigned char dev_addr, //设备地址
unsigned char *reg_addr, unsigned char reg_len,//设备寄存器地址,长度
unsigned char *write_buf, int write_len);//数据buf, 写入长度
void hw_iic_master_module_init();
#ifdef _IIC_USE_HW
#define get_iic_config(iic) get_hw_iic_config(iic)
#define iic_init(iic, config) hw_iic_init(iic, config)
#define iic_deinit(iic) //hw_iic_deinit(iic)
#define iic_start(iic) hw_iic_start(iic)
#define iic_stop(iic) hw_iic_stop(iic)
#define iic_reset(iic) hw_iic_reset(iic)
#define iic_err_reset(iic) hw_iic_err_reset(iic)
#define iic_tx_byte(iic, byte) hw_iic_tx_byte(iic, byte)
#define iic_rx_byte(iic, ack, err) hw_iic_rx_byte(iic, ack, err)//err:指针返回错误状态
#define iic_read_buf(iic, buf, len) hw_iic_read_buf(iic, buf, len)
#define iic_write_buf(iic, buf, len) hw_iic_write_buf(iic, buf, len)
#define iic_suspend(iic) /*hw_iic_suspend(iic)*/
#define iic_resume(iic) /*hw_iic_resume(iic)*/
#define i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len) \
hw_i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len)
#define i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len) \
hw_i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len)
#else
#define get_iic_config(iic) get_soft_iic_config(iic)
#define iic_init(iic, config) soft_iic_init(iic, config)
#define iic_deinit(iic) soft_iic_deinit(iic)
#define iic_start(iic) soft_iic_start(iic)
#define iic_stop(iic) soft_iic_stop(iic)
#define iic_reset(iic) soft_iic_reset(iic)
#define iic_err_reset(iic)
#define iic_tx_byte(iic, byte) soft_iic_tx_byte(iic, byte)
#define iic_rx_byte(iic, ack, err) soft_iic_rx_byte(iic, ack, err)
#define iic_read_buf(iic, buf, len) soft_iic_read_buf(iic, buf, len)
#define iic_write_buf(iic, buf, len) soft_iic_write_buf(iic, buf, len)
#define iic_suspend(iic) soft_iic_suspend(iic)
#define iic_resume(iic) soft_iic_resume(iic)
#define i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len) \
soft_i2c_master_read_nbytes_from_device_reg(iic, dev_addr, reg_addr, reg_len, read_buf, read_len)
#define i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len) \
soft_i2c_master_write_nbytes_to_device_reg(iic, dev_addr, reg_addr, reg_len, write_buf, write_len)
#endif
/******************************hw iic slave*****************************/
int hw_iic_slave_polling_rx(hw_iic_dev iic, u8 *rx_buf);
int hw_iic_slave_polling_tx(hw_iic_dev iic, u8 *tx_buf);
#endif
@@ -0,0 +1,227 @@
#ifndef _IIC_HW_V2_H_
#define _IIC_HW_V2_H_
#include "typedef.h"
#include "gpio.h"
#define MAX_HW_IIC_NUM 1
enum {
HW_IIC_0,
// HW_IIC_1,
};
#define IIC_WHILE_TIMEOUT_CNT_ 736000 //lsb17M约:500ms
#define IPC_SPIN_LOCK_HW_IIC_EN 1//iic多核锁使能
// #define IIC_PORT_GROUP_NUM 4
#define iic_init_prepare(reg) (reg->CON = 1)
#define iic_enable(reg) (reg->CON |= BIT(0))
#define iic_disable(reg) (reg->CON &= ~BIT(0))
#define is_iic_enable(reg) ((reg->CON & 0x03)==0x03)
#define iic_rst_rst(reg) (reg->CON &= ~BIT(1))
#define iic_rst_release(reg) (reg->CON |= BIT(1))
#define iic_role_host(reg) (reg->CON &= ~BIT(2))
#define iic_role_slave(reg) (reg->CON |= BIT(2))
#define iic_flt_sel(reg,x) SFR(reg->CON, 3, 2, x)//0:close; 1:<1*Tiic_baud_clk, 2:<2*Tiic_baud_clk, 3:<3*Tiic_baud_clk
#define iic_stretch_en(reg) (reg->CON &= ~BIT(5))
#define iic_stretch_dis(reg) (reg->CON |= BIT(5))
#define iic_ignore_nack_dis(reg) (reg->CON &= ~BIT(6))
#define iic_ignore_nack_en(reg) (reg->CON |= BIT(6))
#define iic_addr_resp_manu(reg) (reg->CON &= ~BIT(7))
#define iic_addr_resp_auto(reg) (reg->CON |= BIT(7))
#define iic_slv_rx_manu(reg) (reg->CON &= ~BIT(8))
#define iic_slv_rx_auto(reg) (reg->CON |= BIT(8))
#define iic_slv_tx_manu(reg) (reg->CON &= ~BIT(9))
#define iic_slv_tx_auto(reg) (reg->CON |= BIT(9))
#define iic_baddr_resp_dis(reg) (reg->CON &= ~BIT(10))
#define iic_baddr_resp_en(reg) (reg->CON |= BIT(10))
typedef enum {
I2C_TASK_SEND_RESET = 0x0,
I2C_TASK_SEND_ADDR = 0x1,
I2C_TASK_SEND_DATA = 0x2,
I2C_TASK_SEND_ACK = 0x3,
I2C_TASK_SEND_NACK = 0x4,
I2C_TASK_SEND_STOP = 0x5,
I2C_TASK_SEND_NACK_STOP = 0x6,
I2C_TASK_RECV_DATA = 0x7,
I2C_TASK_RECV_DATA_ACK = 0x8,
I2C_TASK_RECV_DATA_NACK = 0x9,
} i2c_task_typedef;
#define iic_task_sel(reg,x) SFR(reg->TASK, 0, 4, x)//i2c_task_typedef
typedef enum {
I2C_PND_TASK_DONE = BIT(20),
I2C_PND_START = BIT(21),
I2C_PND_STOP = BIT(22),
I2C_PND_RXACK = BIT(23),
I2C_PND_RXNACK = BIT(24),
I2C_PND_ADR_MATCH = BIT(25),
I2C_PND_RXDATA_DONE = BIT(26),
I2C_PND_TXTASK_LOAD = BIT(27),
I2C_PND_RXTASK_LOAD = BIT(28),
} i2c_pnd_typedef;
#define iic_set_task_ie(reg) (reg->PND |= BIT(0))
#define iic_clr_task_ie(reg) (reg->PND &= ~BIT(0))
#define iic_task_pnd(reg) (reg->PND & BIT(20))
#define iic_task_pnd_clr(reg) (reg->PND |= BIT(10))
#define iic_set_start_ie(reg) (reg->PND |= BIT(1))
#define iic_clr_start_ie(reg) (reg->PND &= ~BIT(1))
#define iic_start_pnd(reg) (reg->PND & BIT(21))
#define iic_start_pnd_clr(reg) (reg->PND |= BIT(11))
#define iic_set_stop_ie(reg) (reg->PND |= BIT(2))
#define iic_clr_stop_ie(reg) (reg->PND &= ~BIT(2))
#define iic_stop_pnd(reg) (reg->PND & BIT(22))
#define iic_stop_pnd_clr(reg) (reg->PND |= BIT(12))
#define iic_set_rxack_ie(reg) (reg->PND |= BIT(3))
#define iic_clr_rxack_ie(reg) (reg->PND &= ~BIT(3))
#define iic_rxack_pnd(reg) (reg->PND & BIT(23))
#define iic_rxack_pnd_clr(reg) (reg->PND |= BIT(13))
#define iic_set_rxnack_ie(reg) (reg->PND |= BIT(4))
#define iic_clr_rxnack_ie(reg) (reg->PND &= ~BIT(4))
#define iic_rxnack_pnd(reg) (reg->PND & BIT(24))
#define iic_rxnack_pnd_clr(reg) (reg->PND |= BIT(14))
#define iic_set_adr_match_ie(reg) (reg->PND |= BIT(5))
#define iic_clr_adr_match_ie(reg) (reg->PND &= ~BIT(5))
#define iic_adr_match_pnd(reg) (reg->PND & BIT(25))
#define iic_adr_match_pnd_clr(reg) (reg->PND |= BIT(15))
#define iic_set_rxdata_done_ie(reg) (reg->PND |= BIT(6))
#define iic_clr_rxdata_done_ie(reg) (reg->PND &= ~BIT(6))
#define iic_rxdata_done_pnd(reg) (reg->PND & BIT(26))
#define iic_rxdata_done_pnd_clr(reg) (reg->PND |= BIT(16))
#define iic_set_txtask_load_ie(reg) (reg->PND |= BIT(7))
#define iic_clr_txtask_load_ie(reg) (reg->PND &= ~BIT(7))
#define iic_txtask_load_pnd(reg) (reg->PND & BIT(27))
#define iic_txtask_load_pnd_clr(reg) (reg->PND |= BIT(17))
#define iic_set_rxtask_load_ie(reg) (reg->PND |= BIT(8))
#define iic_clr_rxtask_load_ie(reg) (reg->PND &= ~BIT(8))
#define iic_rxtask_load_pnd(reg) (reg->PND & BIT(28))
#define iic_rxtask_load_pnd_clr(reg) (reg->PND |= BIT(18))
#define iic_reset_pnd(reg) (reg->PND = 0x1ff << 10)
#define iic_png_reg(reg) (reg->PND)
#define iic_tx_buf_reg(reg) (reg->TX_BUF)
#define iic_rx_buf_reg(reg) (reg->RX_BUF)//8bit only read
#define iic_addr_reg(reg) (reg->ADDR)//bit0:r/w
#define iic_baud_reg(reg) (reg->BAUD)//12bit BAUD_CNT > (SETUP_CNT+HOLD_CNT)>0
#define iic_tsu_reg(reg) (reg->TSU)//7bit(0~6) sda信号保持时间
#define iic_thd_reg(reg) (reg->THD)//7bit(0~6) sda信号建立时间
#define iic_dbg_reg(reg) (reg->DBG)//32bit only read
typedef const int hw_iic_dev;
#define HW_IIC_MASTER_ISR_EN 0
#include "iic_api.h"
struct hw_iic_slave_config {
struct iic_master_config config;
void (*iic_slave_irq_func)(void);
u8 slave_addr;//bit7~bit1
};
struct iic_master_config *get_hw_iic_config(hw_iic_dev iic);
enum iic_state_enum hw_iic_init(hw_iic_dev iic, struct iic_master_config *i2c_config);
enum iic_state_enum hw_iic_deinit(hw_iic_dev iic);
enum iic_state_enum hw_iic_resume(hw_iic_dev iic);
enum iic_state_enum hw_iic_suspend(hw_iic_dev iic);
enum iic_state_enum hw_iic_check_busy(hw_iic_dev iic);
enum iic_state_enum hw_iic_start(hw_iic_dev iic);
void hw_iic_stop(hw_iic_dev iic);
void hw_iic_reset(hw_iic_dev iic);
void hw_iic_err_reset(hw_iic_dev iic);
u8 hw_iic_tx_byte(hw_iic_dev iic, u8 byte);
u8 hw_iic_rx_byte(hw_iic_dev iic, u8 ack, s8 *err);//err:错误返回
int hw_iic_read_buf(hw_iic_dev iic, void *buf, int len);
int hw_iic_write_buf(hw_iic_dev iic, const void *buf, int len);
int hw_iic_set_baud(hw_iic_dev iic, u32 baud);
void hw_iic_set_ack(hw_iic_dev iic, u8 ack_en);
void hw_iic_set_ie(hw_iic_dev iic, i2c_pnd_typedef png, u8 en);
u8 hw_iic_get_pnd(hw_iic_dev iic, i2c_pnd_typedef png);
void hw_iic_clr_pnd(hw_iic_dev iic, i2c_pnd_typedef png);
void hw_iic_clr_all_pnd(hw_iic_dev iic);
#if HW_IIC_MASTER_ISR_EN
//iic主机中断接口
struct hw_iic_master_isr_transmit {
u8 *data_buf;//收发数据buf
u8 *reg_buf;//寄存器buf
OS_SEM sem;
u16 tx_len;//要发送的长tx_len,rx_len不能同时赋值
u16 rx_len;//要接收的长tx_len,rx_len不能同时赋值
u16 xfer_postion;//=0,返回通信数据长
enum iic_state_enum result;//通信结果。0:ok,<0:error
u8 reg_len;
u8 dev_addr;//从机设备地址
u8 restart_flag;//是否有restart.1:发送restart,0不发
};
//支持协议:
//tx: start,addr write,data0,data1,,,,,,stop
//rxstart,addr read,data0,data1,,,,,nack,stop
//tx: start,addr write,regx,data0,data1,,,,,,stop
//rxstart,addr write,regx,start,addr read,data0,data1,,,,,nack,stop
//tx/rxstart,addr,regx write/read,data0,data1,,,,,nack,stop
//会修改结构体值,每次调用需初始化结构体
//timeout:byte间隔等待时间。0:一直等, >0:*10ms(超时未通信完直接stop), <0:不等待(需确保结构体参数在通信结束前有效)
//不可在低优先级中断等
enum iic_state_enum hw_iic_master_isr_transmit_cfg(hw_iic_dev iic, struct hw_iic_master_isr_transmit *info, int timeout);
//非阻塞获取iic主机中断传输状态
enum iic_state_enum hw_iic_master_isr_get_status(hw_iic_dev iic);
#endif
#define MASTER_IIC_WRITE_MODE_FAST_RESP 0
#define MASTER_IIC_READ_MODE_FAST_RESP 0//接收移位,客户根据协议修改
#define SLAVE_NO_STRETCH_AUTO_TASK 0 // 1+PULL_IIC_BUS=0:图3(no stretch)
//从机接口:
enum iic_slave_rx_state {
IIC_SLAVE_RX_PREPARE_TIMEOUT = -1,
IIC_SLAVE_RX_PREPARE_OK = 0,
IIC_SLAVE_RX_PREPARE_END_OK = 1,
IIC_SLAVE_RX_ADDR_NO_MATCH = -2,
IIC_SLAVE_RX_ADDR_TX = 2,
IIC_SLAVE_RX_ADDR_RX = 3,
IIC_SLAVE_RX_DATA = 4,
};
enum iic_state_enum hw_iic_slave_init(hw_iic_dev iic, struct hw_iic_slave_config *i2c_config);
void hw_iic_slave_set_addr(hw_iic_dev iic, u8 addr, u8 addr_ack);
void hw_iic_slave_set_isr_func(hw_iic_dev iic, void (*iic_slave_irq_func)(void));
u8 hw_iic_slave_get_addr(hw_iic_dev iic);
enum iic_slave_rx_state hw_iic_slave_rx_prepare(hw_iic_dev iic, u8 ack, u32 wait_time);//轮询, 准备收
//判断地址,返回数据类型, 不检查结束位
enum iic_slave_rx_state hw_iic_slave_rx_byte(hw_iic_dev iic, u8 *rx_byte);
int hw_iic_slave_rx_nbyte(hw_iic_dev iic, u8 *rx_buf);//轮询,含结束位
u8 hw_iic_slave_tx_check_ack(hw_iic_dev iic);//return:1:ack; 0:no ack
void hw_iic_slave_tx_byte(hw_iic_dev iic, u8 byte);//准备发
int hw_iic_slave_tx_nbyte(hw_iic_dev iic, u8 *tx_buf);//轮询,含结束位
#endif
@@ -0,0 +1,29 @@
#ifndef __IIC_SOFT_H__
#define __IIC_SOFT_H__
#include "typedef.h"
typedef const u8 soft_iic_dev;
#include "iic_api.h"
#define MAX_SOFT_IIC_NUM 1
struct iic_master_config *get_soft_iic_config(soft_iic_dev iic);
enum iic_state_enum soft_iic_init(soft_iic_dev iic, struct iic_master_config *i2c_config);
enum iic_state_enum soft_iic_deinit(soft_iic_dev iic);
enum iic_state_enum soft_iic_suspend(soft_iic_dev iic);
enum iic_state_enum soft_iic_resume(soft_iic_dev iic);
enum iic_state_enum soft_iic_check_busy(soft_iic_dev iic);
enum iic_state_enum soft_iic_start(soft_iic_dev iic);
void soft_iic_stop(soft_iic_dev iic);
void soft_iic_reset(soft_iic_dev iic);//同iic_v2
u8 soft_iic_tx_byte(soft_iic_dev iic, u8 byte);
u8 soft_iic_rx_byte(soft_iic_dev iic, u8 ack, s8 *err);//err:返回错误状态
//return: =len:ok
int soft_iic_read_buf(soft_iic_dev iic, void *buf, int len);
//return: =len:ok
int soft_iic_write_buf(soft_iic_dev iic, const void *buf, int len);
#endif /* #ifndef __IIC_SOFT_H__ */
@@ -0,0 +1,43 @@
#ifndef __IO_IMAP_H__
#define __IO_IMAP_H__
#define PA0_IN 1
#define PA1_IN 2
#define PA2_IN 3
#define PA3_IN 4
#define PA4_IN 5
#define PA5_IN 6
#define PA6_IN 7
#define PA7_IN 8
#define PA8_IN 9
#define PA9_IN 10
#define PA10_IN 11
#define PA11_IN 12
#define PA12_IN 13
#define PA13_IN 14
#define PB0_IN 15
#define PB1_IN 16
#define PB2_IN 17
#define PB3_IN 18
#define PB4_IN 19
#define PB5_IN 20
#define PB6_IN 21
#define PB7_IN 22
#define PB8_IN 23
#define PC0_IN 24
#define PC1_IN 25
#define PC2_IN 26
#define PC3_IN 27
#define PC4_IN 28
#define PC5_IN 29
#define PC6_IN 30
#define PC7_IN 31
#define PC8_IN 32
#define PC9_IN 33
#define PC10_IN 34
#define PC11_IN 35
#define USBDP_IN 36
#define USBDM_IN 37
#define PP0_IN 38
#endif
@@ -0,0 +1,32 @@
#ifndef _IPC_SPIN_LOCK_H_
#define _IPC_SPIN_LOCK_H_
#include "typedef.h"
#include "gpio.h"
enum ipc_spin_lock_event {
IPC_SPIN_LOCK_EVENT_USER0 = 0,//自定义事件名
IPC_SPIN_LOCK_EVENT_USER1,
IPC_SPIN_LOCK_EVENT_USER2,
IPC_SPIN_LOCK_EVENT_USER3,
IPC_SPIN_LOCK_EVENT_USER4,
IPC_SPIN_LOCK_EVENT_USER5,
IPC_SPIN_LOCK_EVENT_USER6,
IPC_SPIN_LOCK_EVENT_USER7,
IPC_SPIN_LOCK_EVENT_USER8,
IPC_SPIN_LOCK_EVENT_P11_GPIO,
IPC_SPIN_LOCK_EVENT_RTC,
IPC_SPIN_LOCK_EVENT_UART, //11
IPC_SPIN_LOCK_EVENT_P11_IIC,//12
IPC_SPIN_LOCK_EVENT_CBUF, //13
IPC_SPIN_LOCK_EVENT_PMU, //14
IPC_SPIN_LOCK_EVENT_SFR, //15
IPC_SPIN_LOCK_EVENT_MAX,
};
void ipc_spin_lock_init();
void ipc_spin_lock(enum ipc_spin_lock_event event);//0~15
void ipc_spin_unlock(enum ipc_spin_lock_event event);//0~15
#endif
@@ -0,0 +1,71 @@
#ifndef __GPTIMER_H__
#define __GPTIMER_H__
#include "typedef.h"
#include "power/p11/p11_sfr.h"
enum gptimerx {
GPTIMER0 = 0,
GPTIMER1,
};
#define P11_TIMER_MAX_NUM 2
//以下宏定义给 p11_gptimer 驱动使用
#define GPTIMER_PND_CLR (0b1<<14)
#define GPTIMER_CLK_SRC_RC250K (0b0000<<10)
#define GPTIMER_CLK_SRC_RC16M (0b0001<<10)
#define GPTIMER_CLK_SRC_BTOSC_24M (0b0010<<10)
#define GPTIMER_CLK_SRC_LRC (0b0011<<10)
#define GPTIMER_CLK_SRC_RTC_OSC (0b0100<<10)
#define GPTIMER_CLK_SRC_STD12M (0b0101<<10)
#define GPTIMER_CLK_SRC_PATCLK (0b0110<<10)
#define GPTIMER_CLK_SRC_TEST_CLK (0b0111<<10)
#define GPTIMER_CLK_SRC_LRC_24M (0b1000<<10)
#define GPTIMER_CLK_SRC_IO_MUXIN (0b1111<<10)
#define GPTIMER_CLK_DIV_1 (0b0000<<4)
#define GPTIMER_CLK_DIV_4 (0b0001<<4)
#define GPTIMER_CLK_DIV_16 (0b0010<<4)
#define GPTIMER_CLK_DIV_64 (0b0011<<4)
#define GPTIMER_CLK_DIV_2 (0b0100<<4)
#define GPTIMER_CLK_DIV_8 (0b0101<<4)
#define GPTIMER_CLK_DIV_32 (0b0110<<4)
#define GPTIMER_CLK_DIV_128 (0b0111<<4)
#define GPTIMER_CLK_DIV_256 (0b1000<<4)
#define GPTIMER_CLK_DIV_1024 (0b1001<<4)
#define GPTIMER_CLK_DIV_4096 (0b1010<<4)
#define GPTIMER_CLK_DIV_16384 (0b1011<<4)
#define GPTIMER_CLK_DIV_512 (0b1100<<4)
#define GPTIMER_CLK_DIV_2048 (0b1101<<4)
#define GPTIMER_CLK_DIV_8192 (0b1110<<4)
#define GPTIMER_CLK_DIV_32768 (0b1111<<4)
#define GPTIMER_PWM_OUT_EN (0b1<<8)
#define GPTIMER_TIMER_MODE (0b1<<0)
#define GPTIMERx(TIMERx) (P11_GPTMR0 + TIMERx * (P11_GPTMR1 - P11_GPTMR0))
#define GPTIMER_IRQ_INDEX(TIMERx) (IRQ_GP_TMR0_IDX + TIMERx)
#define GPTIMER_START(TIMERx) (GPTIMERx(TIMERx)->CON |= GPTIMER_TIMER_MODE)
#define GPTIMER_PAUSE(TIMERx) (GPTIMERx(TIMERx)->CON &= ~GPTIMER_TIMER_MODE)
#define GPTIMER_EN_CHECK(TIMERx) (GPTIMERx(TIMERx)->CON & GPTIMER_TIMER_MODE)
#define GPTIMER_PWM_EN(TIMERx) (GPTIMERx(TIMERx)->CON |= GPTIMER_PWM_OUT_EN)
#define GPTIMER_CLR_PND(TIMERx) (GPTIMERx(TIMERx)->CON |= GPTIMER_PND_CLR)
#define GPTIMER_CLK_SRC(x) (x) //MHz单位
#define GPTIMER_CLK_DIV 2 // 右移两位 等效于 除以4
#define GPTIMER_INIT(TIMERx, CLK_SRC) do{ \
GPTIMERx(TIMERx)->CON = GPTIMER_PND_CLR|CLK_SRC|GPTIMER_CLK_DIV_4; \
GPTIMERx(TIMERx)->PRD = 0; \
GPTIMERx(TIMERx)->CNT = 0; \
}while(0)
#define GPTIMER_SET_PERIOD_US(TIMERx, period_us) (GPTIMERx(TIMERx)->PRD = ((period_us * GPTIMER_CLK_SRC(12)) >> GPTIMER_CLK_DIV) - 1)
#define GPTIMER_GET_CNT(TIMERx) (GPTIMERx(TIMERx)->CNT)
#define GPTIMER_SET_CNT(TIMERx, x) (GPTIMERx(TIMERx)->CNT = (x))
#define GPTIMER_GET_PRD(TIMERx) (GPTIMERx(TIMERx)->PRD)
#define GPTIMER_SET_PRD(TIMERx, x) (GPTIMERx(TIMERx)->PRD = (x) - 1)
#endif
@@ -0,0 +1,21 @@
. = ALIGN(4);
PROVIDE(low_power_target_begin = .);
*(.lp_target)
PROVIDE(low_power_target_end = .);
. = ALIGN(4);
PROVIDE(low_power_callback_begin = .);
*(.lp_callback)
PROVIDE(low_power_callback_end = .);
. = ALIGN(4);
deepsleep_target_begin = .;
PROVIDE(deepsleep_target_begin = .);
KEEP(*(.deepsleep_target))
deepsleep_target_end = .;
PROVIDE(deepsleep_target_end = .);
. = ALIGN(4);
PROVIDE(m2p_msg_handler_begin = .);
KEEP(*(.m2p_msg_handler))
PROVIDE(m2p_msg_handler_end = .);
@@ -0,0 +1,164 @@
#ifndef __LP_IPC__
#define __LP_IPC__
//===========================================================================//
// P2M MESSAGE TABLE //
//===========================================================================//
#define P11_RAM_ACCESS(x) (*(volatile u8 *)(x))
#define M2P_MESSAGE_ACCESS(x) P11_RAM_ACCESS(M2P_MESSAGE_RAM_BEGIN + x)
#define P2M_MESSAGE_ACCESS(x) P11_RAM_ACCESS(P2M_MESSAGE_RAM_BEGIN + x)
//==================power=============================
#define P2M_WKUP_SRC P2M_MESSAGE_ACCESS(0)
#define P2M_WKUP_P_PND P2M_MESSAGE_ACCESS(1)
#define P2M_WKUP_N_PND P2M_MESSAGE_ACCESS(2)
#define P2M_AWKUP_P_PND P2M_MESSAGE_ACCESS(3)
#define P2M_AWKUP_N_PND P2M_MESSAGE_ACCESS(4)
#define P2M_WKUP_RTC P2M_MESSAGE_ACCESS(5)
#define P2M_WKUP_CNT0 P2M_MESSAGE_ACCESS(6)
#define P2M_WKUP_CNT1 P2M_MESSAGE_ACCESS(7)
#define P2M_WKUP_CNT2 P2M_MESSAGE_ACCESS(8)
#define P2M_WKUP_CNT3 P2M_MESSAGE_ACCESS(9)
#define P2M_OSC_CNT0 P2M_MESSAGE_ACCESS(10)
#define P2M_OSC_CNT1 P2M_MESSAGE_ACCESS(11)
#define P2M_OSC_CNT2 P2M_MESSAGE_ACCESS(12)
#define P2M_OSC_CNT3 P2M_MESSAGE_ACCESS(13)
//==================system===========================
#define P2M_MESSAGE_BANK_ADR_L P2M_MESSAGE_ACCESS(15)
#define P2M_MESSAGE_BANK_ADR_H P2M_MESSAGE_ACCESS(16)
#define P2M_MESSAGE_BANK_INDEX P2M_MESSAGE_ACCESS(17)
#define P2M_MESSAGE_BANK_ACK P2M_MESSAGE_ACCESS(18)
#define P2M_P11_HEAP_BEGIN_ADDR_L P2M_MESSAGE_ACCESS(19)
#define P2M_P11_HEAP_BEGIN_ADDR_H P2M_MESSAGE_ACCESS(20)
#define P2M_P11_HEAP_SIZE_L P2M_MESSAGE_ACCESS(21)
#define P2M_P11_HEAP_SIZE_H P2M_MESSAGE_ACCESS(22)
#define P2M_REPLY_SYNC_CMD P2M_MESSAGE_ACCESS(23)
#define P2M_CBUF_ADDR0 P2M_MESSAGE_ACCESS(24)
#define P2M_CBUF_ADDR1 P2M_MESSAGE_ACCESS(25)
#define P2M_CBUF_ADDR2 P2M_MESSAGE_ACCESS(26)
#define P2M_CBUF_ADDR3 P2M_MESSAGE_ACCESS(27)
#define P2M_CBUF1_ADDR0 P2M_MESSAGE_ACCESS(28)
#define P2M_CBUF1_ADDR1 P2M_MESSAGE_ACCESS(29)
#define P2M_CBUF1_ADDR2 P2M_MESSAGE_ACCESS(30)
#define P2M_CBUF1_ADDR3 P2M_MESSAGE_ACCESS(31)
//==================clock===========================
#define P2M_BTOSC_OK P2M_MESSAGE_ACCESS(35)
//==================lpctmu===========================
#define P2M_CTMU_CMD_ACK P2M_MESSAGE_ACCESS(39)
#define P2M_MASSAGE_CTMU_CH0_L_RES 40
#define P2M_MASSAGE_CTMU_CH0_H_RES 41
#define P2M_CTMU_CH0_L_RES P2M_MESSAGE_ACCESS(40)
#define P2M_CTMU_CH0_H_RES P2M_MESSAGE_ACCESS(41)
#define P2M_CTMU_CH1_L_RES P2M_MESSAGE_ACCESS(42)
#define P2M_CTMU_CH1_H_RES P2M_MESSAGE_ACCESS(43)
#define P2M_CTMU_CH2_L_RES P2M_MESSAGE_ACCESS(44)
#define P2M_CTMU_CH2_H_RES P2M_MESSAGE_ACCESS(45)
#define P2M_CTMU_CH3_L_RES P2M_MESSAGE_ACCESS(46)
#define P2M_CTMU_CH3_H_RES P2M_MESSAGE_ACCESS(47)
#define P2M_CTMU_CH4_L_RES P2M_MESSAGE_ACCESS(48)
#define P2M_CTMU_CH4_H_RES P2M_MESSAGE_ACCESS(49)
//===========================================================================//
// M2P MESSAGE TABLE //
//===========================================================================//
//==================power=============================
#define M2P_LRC_PRD M2P_MESSAGE_ACCESS(0)
#define M2P_WDVDD M2P_MESSAGE_ACCESS(1)
#define M2P_LRC_FEQ0 M2P_MESSAGE_ACCESS(2)
#define M2P_LRC_FEQ1 M2P_MESSAGE_ACCESS(3)
#define M2P_LRC_FEQ2 M2P_MESSAGE_ACCESS(4)
#define M2P_LRC_FEQ3 M2P_MESSAGE_ACCESS(5)
#define M2P_VDDIO_KEEP M2P_MESSAGE_ACCESS(6)
#define M2P_LRC_KEEP M2P_MESSAGE_ACCESS(7)
#define M2P_RCH_FEQ_L M2P_MESSAGE_ACCESS(8)
#define M2P_RCH_FEQ_H M2P_MESSAGE_ACCESS(9)
#define M2P_MEM_CONTROL M2P_MESSAGE_ACCESS(10)
#define M2P_BTOSC_KEEP M2P_MESSAGE_ACCESS(11)
#define M2P_CTMU_KEEP M2P_MESSAGE_ACCESS(12)
#define M2P_RTC_KEEP M2P_MESSAGE_ACCESS(13)
#define M2P_SF_MODE M2P_MESSAGE_ACCESS(14)
#define M2P_DCV_MODE M2P_MESSAGE_ACCESS(15)
#define M2P_LIGHT_PDOWN_DVDD_VOL M2P_MESSAGE_ACCESS(16)
#define M2P_LRC24M_MODE M2P_MESSAGE_ACCESS(17)
//==================system===========================
#define M2P_SYNC_CMD M2P_MESSAGE_ACCESS(25)
#define M2P_WDT_SYNC M2P_MESSAGE_ACCESS(26)
#define M2P_WAIT_RELEASE M2P_MESSAGE_ACCESS(27)
//==================clock===========================
#define M2P_LRC24M_CFG0 M2P_MESSAGE_ACCESS(35)
#define M2P_LRC24M_CFG1 M2P_MESSAGE_ACCESS(36)
#define M2P_BTOSC_CFG0 M2P_MESSAGE_ACCESS(37)
#define M2P_BTOSC_CFG1 M2P_MESSAGE_ACCESS(38)
#define M2P_LRC24M_FEQ0 M2P_MESSAGE_ACCESS(39)
#define M2P_LRC24M_FEQ1 M2P_MESSAGE_ACCESS(40)
#define M2P_LRC24M_FEQ2 M2P_MESSAGE_ACCESS(41)
#define M2P_LRC24M_FEQ3 M2P_MESSAGE_ACCESS(42)
//==================lpctmu===========================
#define M2P_CTMU_CMD M2P_MESSAGE_ACCESS(50)
#define M2P_CTMU_CH_ENABLE M2P_MESSAGE_ACCESS(51)
#define M2P_CTMU_CH_WAKEUP_EN M2P_MESSAGE_ACCESS(52)
#define M2P_CTMU_SCAN_TIME M2P_MESSAGE_ACCESS(53)
#define M2P_CTMU_LOWPOER_SCAN_TIME M2P_MESSAGE_ACCESS(54)
/*
* Must Sync to P11 code
*/
enum {
M2P_LP_INDEX = 0,
M2P_PF_INDEX,
M2P_LLP_INDEX,
M2P_P33_INDEX,
M2P_SF_INDEX,
M2P_CTMU_INDEX,
M2P_CCMD_INDEX, //common cmd
M2P_VAD_INDEX,
M2P_USER_INDEX,
M2P_WDT_INDEX,
M2P_SYNC_INDEX,
M2P_APP_INDEX,
M2P_WKUP_INDEX,
};
enum {
P2M_LP_INDEX = 0,
P2M_PF_INDEX,
P2M_LLP_INDEX,
P2M_WK_INDEX,
P2M_WDT_INDEX,
P2M_LP_INDEX2,
P2M_CTMU_INDEX,
P2M_CTMU_POWUP,
P2M_REPLY_CCMD_INDEX, //reply common cmd
P2M_VAD_INDEX,
P2M_USER_INDEX,
P2M_BANK_INDEX,
P2M_REPLY_SYNC_INDEX,
P2M_APP_INDEX,
P2M_OSC_INDEX,
};
enum {
CLOSE_P33_INTERRUPT = 1,
OPEN_P33_INTERRUPT,
LOWPOWER_PREPARE,
M2P_SPIN_LOCK,
M2P_SPIN_UNLOCK,
P2M_SPIN_LOCK,
P2M_SPIN_UNLOCK,
};
#include "lp_msg.h"
#endif
@@ -0,0 +1,139 @@
#ifndef __LP_MSG_H__
#define __LP_MSG_H__
//=================================消息格式========================================
//消息buf大小
#define MAX_POOL 512
//消息类型
enum {
MSG_ACK = 0,
MSG_TEST = 1,
MSG_COMMOM = 2,
MSG_CTMU = 3,
MSG_SENSOR = 4,
MSG_VAD = 5,
MSG_RTC = 6,
MSG_APP = 7,
MSG_CLOCK = 8,
};
//消息函数返回值
enum {
MSG_NO_ERROR = 0, //读取/发送消息成功
MSG_NO_MSG = -1, //未读取到消息
MSG_BUF_ERROR = -2, //读消息格式不对
MSG_BUF_READ_OVER = -3, //读消息溢出,传的参数长度不对
MSG_BUF_WRITE_OVER = -4, //写消息会溢出
};
//消息头格式
#define MSG_HEADER_BYTE_LEN 4
#define MSG_HEADER_BIT_LEN (MSG_HEADER_BYTE_LEN*8)
#define MSG_HEADER_ALL_BIT ((1L<<MSG_HEADER_BIT_LEN) - 1)
#define MSG_INDEX_BIT 15
#define MSG_ACK_BIT 1
#define MSG_TYPE_BIT_LEN 8
#define MSG_PARAM_BIT_LEN (MSG_HEADER_BYTE_LEN*8-MSG_TYPE_BIT_LEN-MSG_INDEX_BIT-MSG_ACK_BIT)
struct lp_msg_head {
u32 type :
MSG_TYPE_BIT_LEN;
u32 ack :
MSG_ACK_BIT;
u32 index :
MSG_INDEX_BIT;
u32 len :
MSG_PARAM_BIT_LEN;
} __attribute__((packed));
//消息队列
typedef struct LP_Q {
u16 in; //写位置
u16 out; //读位置
u16 count; //有效数据
u16 size; //buf大小
u32 start; //buf起址
u32 ack_flag;
} LP_Q;
enum {
LP_BUF_NO_ERR = 0,
LP_BUF_READ_NOT_ENOUGH_DATA = -1, //buf里数据不够读
LP_BUF_READ_NO_DATA = -2, //buf里面没有数据
LP_BUF_WRITE_OVER = -3, //写数据超过了buf大小
};
//用户消息对应处理
struct lp_msg_handler {
void (*handler)(void *, u8 *, u32);
void *priv;
u8 type;
} __attribute__((packed));
void lp_ipc_init();
void lp_ipc_later_init();
void message_init();
void lp_lock();
void lp_unlock();
void lp_ipc_handle_sync_cmd();
void config_post_ack_flag(u32 enable);
//=================================M2P========================================
#define REGISTER_M2P_MSG_HANDLER(pri, _type, fn) \
const struct lp_msg_handler _##fn SEC_USED(.m2p_msg_handler)= { \
.handler = fn, \
.priv = pri, \
.type = _type, \
}
extern struct lp_msg_handler m2p_msg_handler_begin[];
extern struct lp_msg_handler m2p_msg_handler_end[];
#define list_for_each_m2p_msg_handler(p) \
for (p = m2p_msg_handler_begin; p < m2p_msg_handler_end; p++)
int m2p_get_msg(struct lp_msg_head *head, u8 *msg, u32 len);
int m2p_post_msg(u32 type, u32 ack, u8 *msg, u32 len);
void msys_to_p11_sys_cmd(u8 cmd);
int m2p_msg_hdl(u32 index);
u32 msys_ack_p11(u32 index);
//=================================P2M========================================
#define REGISTER_P2M_MSG_HANDLER(pri, _type, fn) \
const struct lp_msg_handler _##fn SEC_USED(.p2m_msg_handler)= { \
.handler = fn, \
.priv = pri, \
.type = _type, \
}
extern struct lp_msg_handler p2m_msg_handler_begin[];
extern struct lp_msg_handler p2m_msg_handler_end[];
#define list_for_each_p2m_msg_handler(p) \
for (p = p2m_msg_handler_begin; p < p2m_msg_handler_end; p++)
int p2m_get_msg(struct lp_msg_head *head, u8 *msg, u32 len);
int p2m_post_msg(u32 type, u32 ack, u8 *msg, u32 len);
int p2m_msg_hdl(u32 index);
u32 p11_ack_msys(u32 index);
#endif
@@ -0,0 +1,9 @@
#ifndef __P11_API_H__
#define __P11_API_H__
void sfr_p2m_int_set(u32 index);
void sfr_p2m_int_ie_set(u32 index, u8 enable);
#endif
@@ -0,0 +1,46 @@
/**@file p11_hw.h
* @brief hw sfr layer
* @date 2024-05-16
* @version V1.0
* @copyright Copyright(c)2010-2031 JIELI
* @details 该文件对p11 clock相关寄存器封装
*/
#ifndef __P11_CLOCK_HW_H__
#define __P11_CLOCK_HW_H__
enum P11_SYS_CLK_TABLE {
P11_SYS_CLK_RC16M = 0,
P11_SYS_CLK_RC250K,
P11_SYS_CLK_LRC_OSC,
P11_SYS_CLK_BTOSC_24M,
P11_SYS_CLK_BTOSC_48M,
P11_SYS_CLK_LRC24M,
P11_SYS_CLK_CLK_X2,
P11_SYS_CLK_TEST,
};
#define P11_SYS_CLK_SEL(x) (P11_CLOCK->CLK_CON0 = x)
//p11 btosc use d2sh
#define CLOCK_KEEP(en) \
if(en){ \
P11_CLOCK->CLK_CON1 &= ~(3<<15); \
P11_CLOCK->CLK_CON1 |= BIT(14); \
P11_CLOCK->CLK_CON1 |= (2<<15); \
}else{ \
P11_CLOCK->CLK_CON1 &= ~(3<<15); \
P11_CLOCK->CLK_CON1 &= ~BIT(14); \
}
#define P2M_CLK_SET(x) SFR(P11_SYSTEM->P2M_CLK_CON0,0,8,x)
#define P2M_CLK_GET(x) (P11_SYSTEM->P2M_CLK_CON0 & 0xff)
#define RC_250k_EN(a) \
if (a) { \
P11_CLOCK->CLK_CON1 |= BIT(10); \
} else { \
P11_CLOCK->CLK_CON1 &= ~BIT(10); \
}
#endif
@@ -0,0 +1,180 @@
//*********************************************************************************//
// Module name : csfr.h //
// Description : q32small core sfr define //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
#ifndef __P11_Q32S_CSFR__
#define __P11_Q32S_CSFR__
#define __RW volatile // read write
#define __RO volatile const // only read
#define __WO volatile // only write
#define __u8 unsigned int // u8 to u32 special for struct
#define __u16 unsigned int // u16 to u32 special for struct
#define __u32 unsigned int
#define CPU_CORE_NUM 1
//---------------------------------------------//
// q32small define
//---------------------------------------------//
//#ifdef PMU_SYSTEM
#if 1
#define p11_q32s_sfr_base 0x00a000
#define p11_q32s_sfr_offset 0x000000 // multi_core used
#else
#define p11_q32s_sfr_base 0xf2a000
#define p11_q32s_sfr_offset 0x000000 // multi_core used
#endif
#define p11_q32s_cpu_base (p11_q32s_sfr_base + 0x00)
#define p11_q32s_mpu_base (p11_q32s_sfr_base + 0x80)
#define p11_q32s(n) ((JL_TypeDef_p11_q32s *)(p11_q32s_sfr_base + p11_q32s_sfr_offset*n))
#define p11_q32s_mpu(n) ((JL_TypeDef_p11_q32s_MPU *)(p11_q32s_mpu_base + p11_q32s_sfr_offset*n))
//---------------------------------------------//
// q32small core sfr
//---------------------------------------------//
typedef struct {
/* 00 */ __RO __u32 DR00;
/* 01 */ __RO __u32 DR01;
/* 02 */ __RO __u32 DR02;
/* 03 */ __RO __u32 DR03;
/* 04 */ __RO __u32 DR04;
/* 05 */ __RO __u32 DR05;
/* 06 */ __RO __u32 DR06;
/* 07 */ __RO __u32 DR07;
/* 08 */ __RO __u32 DR08;
/* 09 */ __RO __u32 DR09;
/* 0a */ __RO __u32 DR10;
/* 0b */ __RO __u32 DR11;
/* 0c */ __RO __u32 DR12;
/* 0d */ __RO __u32 DR13;
/* 0e */ __RO __u32 DR14;
/* 0f */ __RO __u32 DR15;
/* 10 */ __RO __u32 RETI;
/* 11 */ __RO __u32 RETE;
/* 12 */ __RO __u32 RETX;
/* 13 */ __RO __u32 RETS;
/* 14 */ __RO __u32 SR04;
/* 15 */ __RO __u32 PSR;
/* 16 */ __RO __u32 CNUM;
/* 17 */ __RO __u32 SR07;
/* 18 */ __RO __u32 SR08;
/* 19 */ __RO __u32 SR09;
/* 1a */ __RO __u32 SR10;
/* 1b */ __RO __u32 ICFG;
/* 1c */ __RO __u32 USP;
/* 1d */ __RO __u32 SSP;
/* 1e */ __RO __u32 SP;
/* 1f */ __RO __u32 PCRS;
/* 20 */ __RW __u32 BPCON;
/* 21 */ __RW __u32 BSP;
/* 22 */ __RW __u32 BP0;
/* 23 */ __RW __u32 BP1;
/* 24 */ __RW __u32 BP2;
/* 25 */ __RW __u32 BP3;
/* 26 */ __WO __u32 CMD_PAUSE;
/* */ __RO __u32 REV_30_26[0x30 - 0x26 - 1];
/* 30 */ __RW __u32 PMU_CON0;
/* 31 */ __RW __u32 PMU_CON1;
/* 32 */ __RW __u32 RST_ADDR;
/* */ __RO __u32 REV_3b_30[0x3b - 0x32 - 1];
/* 3b */ __RW __u8 TTMR_CON;
/* 3c */ __RW __u32 TTMR_CNT;
/* 3d */ __RW __u32 TTMR_PRD;
/* 3e */ __RW __u32 BANK_CON;
/* 3f */ __RW __u32 BANK_NUM;
/* 40 */ __RW __u32 ICFG00;
/* 41 */ __RW __u32 ICFG01;
/* 42 */ __RW __u32 ICFG02;
/* 43 */ __RW __u32 ICFG03;
/* 44 */ __RW __u32 ICFG04;
/* 45 */ __RW __u32 ICFG05;
/* 46 */ __RW __u32 ICFG06;
/* 47 */ __RW __u32 ICFG07;
/* 48 */ __RW __u32 ICFG08;
/* 49 */ __RW __u32 ICFG09;
/* 4a */ __RW __u32 ICFG10;
/* 4b */ __RW __u32 ICFG11;
/* 4c */ __RW __u32 ICFG12;
/* 4d */ __RW __u32 ICFG13;
/* 4e */ __RW __u32 ICFG14;
/* 4f */ __RW __u32 ICFG15;
/* 50 */ __RW __u32 ICFG16;
/* 51 */ __RW __u32 ICFG17;
/* 52 */ __RW __u32 ICFG18;
/* 53 */ __RW __u32 ICFG19;
/* 54 */ __RW __u32 ICFG20;
/* 55 */ __RW __u32 ICFG21;
/* 56 */ __RW __u32 ICFG22;
/* 57 */ __RW __u32 ICFG23;
/* 58 */ __RW __u32 ICFG24;
/* 59 */ __RW __u32 ICFG25;
/* 5a */ __RW __u32 ICFG26;
/* 5b */ __RW __u32 ICFG27;
/* 5c */ __RW __u32 ICFG28;
/* 5d */ __RW __u32 ICFG29;
/* 5e */ __RW __u32 ICFG30;
/* 5f */ __RW __u32 ICFG31;
/* 60 */ __RO __u32 IPND0;
/* 61 */ __RO __u32 IPND1;
/* 62 */ __RO __u32 IPND2;
/* 63 */ __RO __u32 IPND3;
/* 64 */ __RO __u32 IPND4;
/* 65 */ __RO __u32 IPND5;
/* 66 */ __RO __u32 IPND6;
/* 67 */ __RO __u32 IPND7;
/* 68 */ __WO __u32 ILAT_SET;
/* 69 */ __WO __u32 ILAT_CLR;
/* 6a */ __RW __u32 IPMASK;
/* 6b */ __RW __u32 GIEMASK;
/* 6c */ __RW __u32 IWKUP_NUM;
/* */ __RO __u32 REV_70_6c[0x70 - 0x6c - 1];
/* 70 */ __RW __u32 ETM_CON;
/* 71 */ __RO __u32 ETM_PC0;
/* 72 */ __RO __u32 ETM_PC1;
/* 73 */ __RO __u32 ETM_PC2;
/* 74 */ __RO __u32 ETM_PC3;
/* 75 */ __RW __u32 WP0_ADRH;
/* 76 */ __RW __u32 WP0_ADRL;
/* 77 */ __RW __u32 WP0_DATH;
/* 78 */ __RW __u32 WP0_DATL;
/* 79 */ __RW __u32 WP0_PC;
/* */ __RO __u32 REV_80_79[0x80 - 0x79 - 1];
/* 80 */ __RW __u32 EMU_CON;
/* 81 */ __RW __u32 EMU_MSG;
/* 82 */ __RO __u32 EMU_SSP_H;
/* 83 */ __RO __u32 EMU_SSP_L;
/* 84 */ __RO __u32 EMU_USP_H;
/* 85 */ __RO __u32 EMU_USP_L;
} JL_TypeDef_p11_q32s;
#undef __RW
#undef __RO
#undef __WO
#undef __u8
#undef __u16
#undef __u32
#endif
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
@@ -0,0 +1,34 @@
//===============================================================================//
//
// input IO define
//
//===============================================================================//
#define P11_PB0_IN 1
#define P11_PB1_IN 2
#define P11_PB2_IN 3
#define P11_PB3_IN 4
#define P11_PB4_IN 5
#define P11_PB5_IN 6
#define P11_PB6_IN 7
#define P11_PB7_IN 8
#define P11_PB8_IN 9
//===============================================================================//
//
// function input select sfr
//
//===============================================================================//
typedef struct {
__RW __u8 P11_FI_GP_ICH0;
__RW __u8 P11_FI_GP_ICH1;
__RW __u8 P11_FI_GP_ICH2;
__RW __u8 P11_FI_UART0_RX;
__RW __u8 P11_FI_UART1_RX;
__RW __u8 P11_FI_SPI_DI;
__RW __u8 P11_FI_IIC_SCL;
__RW __u8 P11_FI_IIC_SDA;
} P11_IMAP_TypeDef;
#define P11_IMAP_BASE (p11_sfr_base + map_adr(0x17, 0x00))
#define P11_IMAP ((P11_IMAP_TypeDef *)P11_IMAP_BASE)
@@ -0,0 +1,35 @@
//===============================================================================//
//
// output function define
//
//===============================================================================//
#define P11_FO_GP_OCH0 ((0 << 2)|BIT(1))
#define P11_FO_GP_OCH1 ((1 << 2)|BIT(1))
#define P11_FO_GP_OCH2 ((2 << 2)|BIT(1))
#define P11_FO_UART0_TX ((3 << 2)|BIT(1)|BIT(0))
#define P11_FO_UART1_TX ((4 << 2)|BIT(1)|BIT(0))
#define P11_FO_SPI_CLK ((5 << 2)|BIT(1)|BIT(0))
#define P11_FO_SPI_DO ((6 << 2)|BIT(1)|BIT(0))
#define P11_FO_IIC_SCL ((7 << 2)|BIT(1)|BIT(0))
#define P11_FO_IIC_SDA ((8 << 2)|BIT(1)|BIT(0))
//===============================================================================//
//
// IO output select sfr
//
//===============================================================================//
typedef struct {
__RW __u8 P11_PB0_OUT;
__RW __u8 P11_PB1_OUT;
__RW __u8 P11_PB2_OUT;
__RW __u8 P11_PB3_OUT;
__RW __u8 P11_PB4_OUT;
__RW __u8 P11_PB5_OUT;
__RW __u8 P11_PB6_OUT;
__RW __u8 P11_PB7_OUT;
__RW __u8 P11_PB8_OUT;
} P11_OMAP_TypeDef;
#define P11_OMAP_BASE (p11_sfr_base + map_adr(0x16, 0x00))
#define P11_OMAP ((P11_OMAP_TypeDef *)P11_OMAP_BASE)
@@ -0,0 +1,41 @@
#ifndef __P11_MMAP_H__
#define __P11_MMAP_H__
/////////////////////////////////////////////////////////////////////////////////
//#ifdef PMU_SYSTEM
#if 1
#define P11_RAM_BASE 0
#else
#define P11_RAM_BASE 0xF20000
#endif
#define P11_RAM_BEGIN (P11_RAM_BASE)
#define P11_RAM_SIZE (0x8000)
#define P11_RAM_END (P11_RAM_BASE+P11_RAM_SIZE)
/////////////////////////////////////////////////////////////////////////////////
#define MSYS_POFF_RAM_END P11_RAM_END
#define MSYS_POFF_RAM_SIZE 0x20
#define MSYS_POFF_RAM_BEGIN (MSYS_POFF_RAM_END - MSYS_POFF_RAM_SIZE)
/////////////////////////////////////////////////////////////////////////////////
#define M2P_MESSAGE_END MSYS_POFF_RAM_BEGIN
#define M2P_MESSAGE_SIZE 0xe0
#define M2P_MESSAGE_RAM_BEGIN (M2P_MESSAGE_END - M2P_MESSAGE_SIZE)
/////////////////////////////////////////////////////////////////////////////////
#define P2M_MESSAGE_END M2P_MESSAGE_RAM_BEGIN
#define P2M_MESSAGE_SIZE 0x40
#define P2M_MESSAGE_RAM_BEGIN (P2M_MESSAGE_END - P2M_MESSAGE_SIZE)
//////////////////////////////////////////////////////////////////////////////
#define P11_RAM0_END P2M_MESSAGE_RAM_BEGIN
#define P11_RAM0_BEGIN (P11_RAM_BASE+P11_ISR_SIZE)
#define P11_RAM0_SIZE (P11_RAM0_END - P11_RAM0_BEGIN)
//////////////////////////////////////////////////////////////////////////////
#define P11_ISR_END P11_RAM0_BEGIN
#define P11_ISR_SIZE 0x80
#define P11_ISR_BEGIN P11_RAM_BASE
#endif
@@ -0,0 +1,22 @@
#ifndef _ROM_API_H_
#define _ROM_API_H_
//---------------------------------------------//
// rom functions
//---------------------------------------------//
void idle(void);
void standby(volatile u32 *pwr_con_sfr);
void standby_ext(volatile u32 *pwr_con_sfr);
void sleep_ext(volatile u32 *pwr_con_sfr);
void sleep(volatile u32 *pwr_con_sfr);
void deep_sleep(volatile u32 *nvpwr_sfr, volatile u32 *pvdd_sfr, volatile u32 *pwr_con_sfr, u32 dly, u32 pvdd_set, u8 nvpwr_set);
#define CALL_IDLE() idle()
#define CALL_STANDBY() standby(&P11_CLOCK->PWR_CON)
#define CALL_SLEEP() sleep(&P11_CLOCK->PWR_CON)
#define CALL_STANDBY_EXT() standby_ext(&P11_CLOCK->PWR_CON)
#define CALL_SLEEP_EXT() sleep_ext(&P11_CLOCK->PWR_CON)
#define CALL_DEEP_SLEEP(x,y,z) deep_sleep(&P3_NVRAM_PWR, &P3_PVDD1_AUTO, &P11_CLOCK->PWR_CON, x, y, z)
#endif /* #ifndef _ROM_API_H_ */
@@ -0,0 +1,332 @@
#ifndef __P11__
#define __P11__
//===============================================================================//
//
// sfr define
//
//===============================================================================//
//#ifdef PMU_SYSTEM
#if 1
#define p11_base 0x000000
#define p11_ram_base p11_base
#define p11_sfr_base 0x00a000
#else
#define p11_base 0xf20000
#define p11_ram_base p11_base
#define p11_sfr_base 0xf2a000
#endif
#define __RW volatile // read write
#define __RO volatile const // only read
#define __WO volatile // only write
#define __u8 unsigned int // u8 to u32 special for struct
#define __u16 unsigned int // u16 to u32 special for struct
#define __u32 unsigned int
#define __s8(x) char(x); char(reserved_1_##x); char(reserved_2_##x); char(reserved_3_##x)
#define __s16(x) short(x); short(reserved_1_##x)
#define __s32(x) int(x)
#define map_adr(grp, adr) ((64 * grp + adr) * 4) // grp(0x0-0xff), adr(0x0-0x3f)
#define P11_ACCESS(x) (*(volatile u32 *)(p11_base + x))
#define P11_RAM(x) (*(volatile u32 *)(p11_ram_base + x))
//===============================================================================//
//
// sfr address define
//
//===============================================================================//
//............. 0x0000 - 0x03ff............ for cpu
// #include ../core/csfr.h
//............. 0x0400 - 0x04ff............ for clock
typedef struct {
__RW __u32 PWR_CON;
__RW __u32 RST_SRC;
__RW __u32 WKUP_EN;
__RW __u32 WKUP_SRC;
__RW __u32 SYS_DIV;
__RW __u32 CLK_CON0;
__RW __u32 CLK_CON1;
__RW __u32 CLK_CON2;
__RW __u32 XOSC_CFG0;
__RW __u32 XOSC_CFG1;
__RW __u32 LRC24M_CFG0;
__RW __u32 CLKCFG_CFG0;
} P11_CLOCK_TypeDef;
#define P11_CLOCK_BASE (p11_sfr_base + map_adr(0x04, 0x00))
#define P11_CLOCK ((P11_CLOCK_TypeDef *)P11_CLOCK_BASE)
#define P11_PWR_CON P11_CLOCK->PWR_CON
#define P11_CLK_CON0 P11_CLOCK->CLK_CON0
//............. 0x0600 - 0x06ff............ for system
typedef struct {
__RW __u32 P2M_INT_IE;
__RW __u32 P2M_INT_SET;
__RW __u32 P2M_INT_CLR;
__RO __u32 P2M_INT_PND;
__RW __u32 P2M_CLK_CON0;
__RW __u32 M2P_INT_IE;
__RW __u32 M2P_INT_SET;
__RW __u32 M2P_INT_CLR;
__RO __u32 M2P_INT_PND;
__RW __u32 P11_SYS_CON0;
__RW __u32 P11_SYS_CON1;
__RW __u32 PMU_KEY;
} P11_SYSTEM_TypeDef;
#define P11_SYSTEM_BASE (p11_sfr_base + map_adr(0x06, 0x00))
#define P11_SYSTEM ((P11_SYSTEM_TypeDef *)P11_SYSTEM_BASE)
//............. 0x0700 - 0x07ff............ for mbist
typedef struct {
__RW __u32 CON;
__RW __u32 SEL;
__RW __u32 BEG;
__RW __u32 END;
__RW __u32 DAT_VLD0;
__RW __u32 DAT_VLD1;
__RW __u32 DAT_VLD2;
__RW __u32 DAT_VLD3;
__RO __u32 ROM_CRC;
__RW __u32 MCFG0_RF1P;
__RW __u32 MCFG0_RF2P;
__RW __u32 MCFG0_RM1P;
__RW __u32 MCFG0_RM2P;
__RW __u32 MCFG0_VROM;
__RW __u32 MCFG0_CON[3];
} P11_MBIST_TypeDef;
#define P11_MBIST_BASE (p11_sfr_base + map_adr(0x07, 0x00))
#define P11_MBIST ((P11_MBIST_TypeDef *)P11_MBIST_BASE)
//............. 0x0800 - 0x08ff............ for watch dog
typedef struct {
__RW __u32 CON;
__RW __u32 KEY;
__RW __u32 DUMMY;
} P11_WDT_TypeDef;
#define P11_WDT_BASE (p11_sfr_base + map_adr(0x08, 0x00))
#define P11_WDT ((P11_WDT_TypeDef *)P11_WDT_BASE)
#define P11_SIM_END P11_WDT->DUMMY
//............. 0x0900 - 0x0cff............ for lp timer
typedef struct {
__RW __u32 CON0;
__RW __u32 CON1;
__RW __u32 CON2;
__RW __u32 PRD;
__RW __u32 RSC;
__RO __u32 CNT;
} P11_LPTMR_TypeDef;
#define P11_LPTMR0_BASE (p11_sfr_base + map_adr(0x09, 0x00))
#define P11_LPTMR1_BASE (p11_sfr_base + map_adr(0x0a, 0x00))
#define P11_LPTMR2_BASE (p11_sfr_base + map_adr(0x0b, 0x00))
#define P11_LPTMR3_BASE (p11_sfr_base + map_adr(0x0c, 0x00))
#define P11_LPTMR0 ((P11_LPTMR_TypeDef *)P11_LPTMR0_BASE)
#define P11_LPTMR1 ((P11_LPTMR_TypeDef *)P11_LPTMR1_BASE)
#define P11_LPTMR2 ((P11_LPTMR_TypeDef *)P11_LPTMR2_BASE)
#define P11_LPTMR3 ((P11_LPTMR_TypeDef *)P11_LPTMR3_BASE)
//............. 0x0d00 - 0x0dff............ for irflt
typedef struct {
__RW __u32 CON;
} P11_IRFLT_TypeDef;
#define P11_IRFLT_BASE (p11_sfr_base + map_adr(0x0d, 0x00))
#define P11_IRFLT ((P11_IRFLT_TypeDef *)P11_IRFLT_BASE)
//............. 0x0e00 - 0x0eff............ for spi
typedef struct {
__RW __u32 CON;
__RW __u32 BAUD;
__RW __u32 BUF;
__WO __u32 ADR;
__RW __u32 CNT;
__RW __u32 CON1;
} P11_SPI_TypeDef;
#define P11_SPI_BASE (p11_sfr_base + map_adr(0x0e, 0x00))
#define P11_SPI ((P11_SPI_TypeDef *)P11_SPI_BASE)
//............. 0x0f00 - 0x10ff............ for uart
typedef struct {
__RW __u16 CON0;
__RW __u16 CON1;
__RW __u16 CON2;
__RW __u16 BAUD;
__RW __u8 BUF;
__RW __u32 OTCNT;
//__RW __u32 TXADR;
//__WO __u16 TXCNT;
//__RW __u32 RXSADR;
//__RW __u32 RXEADR;
//__RW __u32 RXCNT;
//__RO __u16 HRXCNT;
//__RO __u16 RX_ERR_CNT;
} P11_UART_TypeDef;
#define P11_UART0_BASE (p11_sfr_base + map_adr(0x0f, 0x00))
#define P11_UART1_BASE (p11_sfr_base + map_adr(0x10, 0x00))
#define P11_UART0 ((P11_UART_TypeDef *)P11_UART0_BASE)
#define P11_UART1 ((P11_UART_TypeDef *)P11_UART1_BASE)
//............. 0x1100 - 0x11ff............ for iic
typedef struct {
__RW __u32 CON ;
__RW __u32 PND ;
__RW __u32 TX_BUF ;
__RW __u32 TASK ;
__RO __u32 RX_BUF ;
__RW __u32 ADDR ;
__RW __u32 BAUD ;
__RW __u32 TSU ;
__RW __u32 THD ;
__RO __u32 DBG ;
} P11_IIC_TypeDef;
#define P11_IIC_BASE (p11_sfr_base + map_adr(0x11, 0x00))
#define P11_IIC ((P11_IIC_TypeDef *)P11_IIC_BASE)
//............. 0x1200 - 0x12ff............ for port
typedef struct {
__RW __u32 OCH_CON0 ;
__RW __u32 ICH_CON0 ;
__RW __u32 P33_PORT ;
__RW __u32 PB_SEL ;
__RO __u32 PB_IN ;
__RW __u32 PB_OUT ;
__RW __u32 PB_DIR ;
__RW __u32 PB_DIE ;
__RW __u32 PB_DIEH ;
__RW __u32 PB_PU0 ;
__RW __u32 PB_PU1 ;
__RW __u32 PB_PD0 ;
__RW __u32 PB_PD1 ;
__RW __u32 PB_HD0 ;
__RW __u32 PB_HD1 ;
__RW __u32 PB_SPL ;
} P11_PORT_TypeDef;
#define P11_PORT_BASE (p11_sfr_base + map_adr(0x12, 0x00))
#define P11_PORT ((P11_PORT_TypeDef *)P11_PORT_BASE)
//............. 0x1300 - 0x14ff............ for lp ctmu
typedef struct {
__RW __u32 CON0 ;
__RW __u32 CHEN ;
__RW __u32 CNUM ;
__RW __u32 PPRD ;
__RW __u32 DPRD ;
__RW __u32 ECON ;
__RW __u32 EXEN ;
__RW __u32 CHIS ;
__RW __u32 CLKC ;
__WO __u32 WCON ;
__RW __u32 ANA0 ;
__RW __u32 ANA1 ;
__RO __u32 RES ;
__RW __u32 DMA_START_ADR;
__RW __u32 DMA_HALF_ADR;
__RW __u32 DMA_END_ADR;
__RW __u32 DMA_CON;
__RW __u32 MSG_CON;
__RO __u32 DMA_WADR;
__RW __u32 SLEEP_CON;
} P11_LPCTM_TypeDef;
#define P11_LPCTM0_BASE (p11_sfr_base + map_adr(0x13, 0x00))
#define P11_LPCTM0 ((P11_LPCTM_TypeDef *)P11_LPCTM0_BASE)
// #define P11_LPCTM1_BASE (p11_sfr_base + map_adr(0x14, 0x00))
// #define P11_LPCTM1 ((P11_LPCTM_TypeDef *)P11_LPCTM1_BASE)
//............. 0x1500 - 0x15ff............ for lpvad
typedef struct {
__RW __u32 VAD_CON;
__RW __u32 VAD_ACON0;
__RW __u32 VAD_ACON1;
__RW __u32 AVAD_CON;
__RW __u32 AVAD_DATA;
__RW __u32 DVAD_CON0;
__RW __u32 DVAD_CON1;
__RW __u32 DMA_BADR;
__RW __u32 DMA_LEN;
__RW __u32 DMA_HPTR;
__RW __u32 DMA_SPTR;
__RW __u32 DMA_SPN;
__RW __u32 DMA_SHN;
} P11_LPVAD_TypeDef;
#define P11_LPVAD_BASE (p11_sfr_base + map_adr(0x15, 0x00))
#define P11_LPVAD ((P11_LPVAD_TypeDef *)P11_LPVAD_BASE)
//............. 0x1600 - 0x17ff............ for crossbar
#include "p11_io_omap.h"
#include "p11_io_imap.h"
//............. 0x1800 - 0x19ff............ for gp timer
typedef struct {
__RW __u32 CON;
__RW __u32 CNT;
__RW __u32 PRD;
__RW __u32 PWM;
__RW __u32 IRFLT;
} P11_GPTMR_TypeDef;
#define P11_GPTMR0_BASE (p11_sfr_base + map_adr(0x18, 0x00))
#define P11_GPTMR1_BASE (p11_sfr_base + map_adr(0x18, 0x05))
#define P11_GPTMR0 ((P11_GPTMR_TypeDef *)P11_GPTMR0_BASE)
#define P11_GPTMR1 ((P11_GPTMR_TypeDef *)P11_GPTMR1_BASE)
//............. 0x1a00 - 0x1aff............ for NFC
typedef struct {
__RW __u32 CON0;
__RW __u32 CON1;
__RW __u32 CON2;
__RW __u32 CON3;
__RW __u32 BUF0;
__RW __u32 BUF1;
__RW __u32 BUF2;
__RW __u32 BUF3;
} P11_NFC_TypeDef;
#define P11_NFC_BASE (p11_sfr_base + map_adr(0x1a, 0x00))
#define P11_NFC ((P11_NFC_TypeDef *)P11_NFC_BASE)
//............. 0x1b00 - 0x1bff............ for RESLOCK
typedef struct {
__RW __u32 LOCK[16];
} P11_RESLOCK_TypeDef;
#define P11_RESLOCK_BASE (p11_sfr_base + map_adr(0x1b,0x00))
#define P11_RESLOCK ((P11_RESLOCK_TypeDef *)P11_RESLOCK_BASE)
//............. 0x1c00 - 0x1cff............ for lp_gpcnt0
typedef struct {
__RW __u32 CON;
__RO __u32 NUM;
} P11_GPCNT_TypeDef;
#define P11_GPCNT0_BASE (p11_sfr_base + map_adr(0x1c, 0x00))
#define P11_GPCNT0 ((P11_GPCNT_TypeDef *)P11_GPCNT0_BASE)
#endif
@@ -0,0 +1,70 @@
#ifndef __P33_ACCESS_H__
#define __P33_ACCESS_H__
//
//
// for p33 access
//
//
//
/**************************************************************/
//ROM
u8 p33_buf(u8 buf);
#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0); asm volatile ("csync")
//#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0)
// #define p33_xor_1byte(addr, data0) addr ^= (data0)
#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0); asm volatile ("csync")
//#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0)
// #define p33_or_1byte(addr, data0) addr |= (data0)
#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0)); asm volatile ("csync")
//#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0))
//#define p33_and_1byte(addr, data0) addr &= (data0)
// void p33_tx_1byte(u16 addr, u8 data0);
#define p33_tx_1byte(addr, data0) addr = data0
// u8 p33_rx_1byte(u16 addr);
#define p33_rx_1byte(addr) addr
#define P33_CON_SET(sfr, start, len, data) (sfr = (sfr & ~((~(0xffffffff << (len))) << (start))) | \
(((data) & (~(0xffffffff << (len)))) << (start)))
#define P33_CON_GET(sfr) (sfr)
#if 1
#define p33_fast_access(reg, data, en) \
{ \
if (en) { \
p33_or_1byte(reg, (data)); \
} else { \
p33_and_1byte(reg, (u8)~(data)); \
} \
}
#else
#define p33_fast_access(reg, data, en) \
{ \
if (en) { \
reg |= (data); \
} else { \
reg &= ~(data); \
} \
}
#endif
#endif
@@ -0,0 +1,260 @@
#ifndef __P33_API_H__
#define __P33_API_H__
//
//
// vol
//
//
//
/****************************************************************/
enum DVDD_VOL {
DVDD_VOL_0840MV = 0,
DVDD_VOL_0870MV,
DVDD_VOL_0900MV,
DVDD_VOL_0930MV,
DVDD_VOL_0960MV,
DVDD_VOL_0990MV,
DVDD_VOL_1020MV,
DVDD_VOL_1050MV,
DVDD_VOL_1080MV,
DVDD_VOL_1110MV,
DVDD_VOL_1140MV,
DVDD_VOL_1170MV,
DVDD_VOL_1200MV,
DVDD_VOL_1230MV,
DVDD_VOL_1260MV,
DVDD_VOL_1290MV,
};
/*enum DVDD2_VOL {*/
/*};*/
/*enum RVDD_VOL {*/
/*};*/
/*enum RVDD2_VOL {*/
/*};*/
/*enum BTVDD_VOL {*/
/*};*/
enum DCVDD_VOL {
DCVDD_VOL_1000MV = 0,
DCVDD_VOL_1050MV,
DCVDD_VOL_1100MV,
DCVDD_VOL_1150MV,
DCVDD_VOL_1200MV,
DCVDD_VOL_1250MV,
DCVDD_VOL_1300MV,
DCVDD_VOL_1350MV,
DCVDD_VOL_1400MV,
DCVDD_VOL_1450MV,
DCVDD_VOL_1500MV,
DCVDD_VOL_1550MV,
DCVDD_VOL_1600MV,
};
enum VDDIOM_VOL {
VDDIOM_VOL_21V = 0,
VDDIOM_VOL_22V,
VDDIOM_VOL_23V,
VDDIOM_VOL_24V,
VDDIOM_VOL_25V,
VDDIOM_VOL_26V,
VDDIOM_VOL_27V,
VDDIOM_VOL_28V,
VDDIOM_VOL_29V,
VDDIOM_VOL_30V,
VDDIOM_VOL_31V,
VDDIOM_VOL_32V,
VDDIOM_VOL_33V,
VDDIOM_VOL_34V,
VDDIOM_VOL_35V,
VDDIOM_VOL_36V,
};
enum VDDIOW_VOL {
VDDIOW_VOL_21V = 0,
VDDIOW_VOL_22V,
VDDIOW_VOL_23V,
VDDIOW_VOL_24V,
VDDIOW_VOL_25V,
VDDIOW_VOL_26V,
VDDIOW_VOL_27V,
VDDIOW_VOL_28V,
VDDIOW_VOL_29V,
VDDIOW_VOL_30V,
VDDIOW_VOL_31V,
VDDIOW_VOL_32V,
VDDIOW_VOL_33V,
VDDIOW_VOL_34V,
VDDIOW_VOL_35V,
VDDIOW_VOL_36V,
};
enum WVDD_VOL {
WVDD_VOL_0500MV = 0,
WVDD_VOL_0550MV,
WVDD_VOL_0600MV,
WVDD_VOL_0650MV,
WVDD_VOL_0700MV,
WVDD_VOL_0750MV,
WVDD_VOL_0800MV,
WVDD_VOL_0850MV,
WVDD_VOL_0900MV,
WVDD_VOL_0950MV,
WVDD_VOL_1000MV,
WVDD_VOL_1050MV,
WVDD_VOL_1100MV,
WVDD_VOL_1150MV,
WVDD_VOL_1200MV,
WVDD_VOL_1250MV,
};
enum PVDD_VOL {
PVDD_VOL_0500MV = 0,
PVDD_VOL_0550MV,
PVDD_VOL_0600MV,
PVDD_VOL_0650MV,
PVDD_VOL_0700MV,
PVDD_VOL_0750MV,
PVDD_VOL_0800MV,
PVDD_VOL_0850MV,
PVDD_VOL_0900MV,
PVDD_VOL_0950MV,
PVDD_VOL_1000MV,
PVDD_VOL_1050MV,
PVDD_VOL_1100MV,
PVDD_VOL_1150MV,
PVDD_VOL_1200MV,
PVDD_VOL_1250MV,
};
void dvdd_vol_sel(enum DVDD_VOL vol);
enum DVDD_VOL get_dvdd_vol_sel();
/*void dvdd2_vol_sel(enum DVDD2_VOL vol);*/
/*enum DVDD2_VOL get_dvdd2_vol_sel();*/
/*void rvdd_vol_sel(enum RVDD_VOL vol);*/
/*enum RVDD_VOL get_rvdd_vol_sel();*/
/*void rvdd2_vol_sel(enum RVDD2_VOL vol);*/
/*enum RVDD2_VOL get_rvdd2_vol_sel();*/
void dcvdd_vol_sel(enum DCVDD_VOL vol);
enum DCVDD_VOL get_dcvdd_vol_sel();
/*void btvdd_vol_sel(enum BTVDD_VOL vol);*/
/*enum BTVDD_VOL get_btvdd_vol_sel();*/
void pvdd_config(u32 lev, u32 low_lev, u32 output);
void pvdd_output(u32 output);
void vddiom_vol_sel(enum VDDIOM_VOL vol);
enum VDDIOM_VOL get_vddiom_vol_sel();
void vddiow_vol_sel(enum VDDIOW_VOL vol);
enum VDDIOW_VOL get_vddiow_vol_sel();
//
//
// lvd
//
//
//
/****************************************************************/
typedef enum {
LVD_RESET_MODE, //复位模式
LVD_EXCEPTION_MODE, //异常模式,进入异常中断
LVD_WAKEUP_MODE, //唤醒模式,进入唤醒中断,callback参数为回调函数
} LVD_MODE;
typedef enum {
VLVD_SEL_166V = 0,
VLVD_SEL_177V,
VLVD_SEL_188V,
VLVD_SEL_199V,
VLVD_SEL_210V,
VLVD_SEL_221V,
VLVD_SEL_232V,
VLVD_SEL_243V,
VLVD_SEL_254V,
VLVD_SEL_265V,
VLVD_SEL_276V,
VLVD_SEL_287V,
VLVD_SEL_298V,
VLVD_SEL_309V,
VLVD_SEL_320V,
VLVD_SEL_331V,
} LVD_VOL;
void lvd_en(u8 en);
void lvd_config(LVD_VOL vol, u8 expin_en, LVD_MODE mode, void (*callback));
//
//
// pinr
//
//
//
//******************************************************************
void gpio_longpress_pin0_reset_config(u32 pin, u32 level, u32 time, u32 release, u32 pull_enable);
void gpio_longpress_pin1_reset_config(u32 pin, u32 level, u32 time, u32 release);
//
//
// dcdc
//
//
//
//******************************************************************
enum POWER_MODE {
//LDO模式
PWR_LDO15,
//DCDC模式
PWR_DCDC15,
};
enum POWER_DCDC_TYPE {
PWR_DCDC12 = 2,
PWR_DCDC18_DCDC12 = 6,
PWR_DCDC18_DCDC12_DCDC09 = 7,
};
enum {
DCDC09 = 1,
DCDC12 = 2,
DCDC18 = 4,
};
void power_set_dcdc_type(enum POWER_DCDC_TYPE type);
void power_set_mode(enum POWER_MODE mode);
//
//
// lptmr
//
//
//
//******************************************************************
void lptmr1_init(void);
void lptmr1_set_wkup_time(u64 wkup_us, u8 type);
enum {
P11_LPTMR_WKUP_EVENT = 1, //p11定时唤醒事件
MSYS_ALARM_WKUP_EVENT,//闹钟唤醒事件
MSYS_RTC_1HZ_EVENT,//触发主系统1s更新1次时间事件
MSYS_SOFF_WKUP_EVENT,//soff定时唤醒事件
LPTMR_INTERRUPT_EVENT,//lptmr中断事件
};
//每个滤波参数不一样
#define MAX_WAKEUP_PORT 8 //最大同时支持数字io输入个数
#define MAX_WAKEUP_ANA_PORT 3 //最大同时支持模拟io输入个数
#endif
@@ -0,0 +1,340 @@
#ifndef __P33_SFR_H__
#define __P33_SFR_H__
//#ifdef PMU_SYSTEM
#if 1
#define P33_ACCESS(x) (*(volatile u32 *)(0xc000 + x*4))
#else
#define P33_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xc000 + x*4))
#endif
//#ifdef PMU_SYSTEM
#if 1
#define RTC_ACCESS(x) (*(volatile u32 *)(0xd000 + x*4))
#else
#define RTC_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xd000 + x*4))
#endif
//===========
//===============================================================================//
//
//
//
//===============================================================================//
//............. 0x0000 - 0x000f............
#define P3_VLMT_CON P33_ACCESS(0x01)
#define P3_POR_CON P33_ACCESS(0x02)
#define P3_VLVD_CON0 P33_ACCESS(0x03)
#define P3_VLVD_CON1 P33_ACCESS(0x04)
#define P3_VLVD_FLT P33_ACCESS(0x05)
#define P3_WDT_CON P33_ACCESS(0x06)
#define P3_OCP_CON0 P33_ACCESS(0x07)
#define P3_ANA_FLOW0 P33_ACCESS(0x08)
#define P3_ANA_FLOW1 P33_ACCESS(0x09)
#define P3_ANA_FLOW2 P33_ACCESS(0x0a)
#define P3_ANA_KEEP0 P33_ACCESS(0x0c)
#define P3_ANA_KEEP1 P33_ACCESS(0x0d)
#define P3_ANA_KEEP2 P33_ACCESS(0x0e)
//............. 0X0010 - 0X001F.........for analog others
#define P3_OSL_CON P33_ACCESS(0x10)
#define P3_RST_FLAG P33_ACCESS(0x11)
#define P3_VBAT_TYPE P33_ACCESS(0x12)
#define P3_LRC_CON0 P33_ACCESS(0x13)
#define P3_LRC_CON1 P33_ACCESS(0x14)
#define P3_RST_CON0 P33_ACCESS(0x15)
#define P3_RST_CON1 P33_ACCESS(0x16)
#define P3_RST_CON2 P33_ACCESS(0x17)
#define P3_VLD_KEEP P33_ACCESS(0x18)
#define P3_CLK_CON0 P33_ACCESS(0x19)
#define P3_ANA_READ P33_ACCESS(0x1a)
#define P3_CHG_CON0 P33_ACCESS(0x1b)
#define P3_CHG_CON1 P33_ACCESS(0x1c)
#define P3_CHG_CON2 P33_ACCESS(0x1d)
#define P3_CHG_CON3 P33_ACCESS(0x1e)
#define P3_CHG_CON4 P33_ACCESS(0x1f)
//............. 0X0020 - 0X002F............ for buck circuit
//#define P3_BUCK1_CON0 P33_ACCESS(0x20)
//#define P3_BUCK1_CON1 P33_ACCESS(0x21)
//#define P3_BUCK1_CON2 P33_ACCESS(0x22)
//#define P3_BUCK1_CON3 P33_ACCESS(0x23)
//#define P3_BUCK1_CON4 P33_ACCESS(0x24)
//#define P3_BUCK1_CON5 P33_ACCESS(0x25)
//#define P3_BUCK1_CON6 P33_ACCESS(0x26)
//#define P3_BUCK1_CON7 P33_ACCESS(0x27)
#define P3_BUCK2_CON0 P33_ACCESS(0x20)
#define P3_BUCK2_CON1 P33_ACCESS(0x21)
#define P3_BUCK2_CON2 P33_ACCESS(0x22)
#define P3_BUCK2_CON3 P33_ACCESS(0x23)
#define P3_BUCK2_CON4 P33_ACCESS(0x24)
#define P3_BUCK2_CON5 P33_ACCESS(0x25)
#define P3_BUCK2_CON6 P33_ACCESS(0x26)
#define P3_BUCK2_CON7 P33_ACCESS(0x27)
//#define P3_BUCK3_CON0 P33_ACCESS(0x28)
//#define P3_BUCK3_CON1 P33_ACCESS(0x29)
//#define P3_BUCK3_CON2 P33_ACCESS(0x2a)
//#define P3_BUCK3_CON3 P33_ACCESS(0x2b)
//#define P3_BUCK3_CON4 P33_ACCESS(0x2c)
//#define P3_BUCK3_CON5 P33_ACCESS(0x2d)
//#define P3_BUCK3_CON6 P33_ACCESS(0x2e)
//#define P3_BUCK3_CON7 P33_ACCESS(0x2f)
//............. 0X0030 - 0X003F............ for PMU manager
#define P3_SFLAG0 P33_ACCESS(0x30)
#define P3_SFLAG1 P33_ACCESS(0x31)
#define P3_SFLAG2 P33_ACCESS(0x32)
#define P3_SFLAG3 P33_ACCESS(0x33)
#define P3_SFLAG4 P33_ACCESS(0x34)
#define P3_SFLAG5 P33_ACCESS(0x35)
#define P3_SFLAG6 P33_ACCESS(0x36)
#define P3_SFLAG7 P33_ACCESS(0x37)
#define P3_SFLAG8 P33_ACCESS(0x38)
#define P3_SFLAG9 P33_ACCESS(0x39)
#define P3_SFLAGA P33_ACCESS(0x3a)
#define P3_SFLAGB P33_ACCESS(0x3b)
//............. 0X0040 - 0X004F............ for
#define P3_IVS_RD P33_ACCESS(0x40)
#define P3_IVS_SET P33_ACCESS(0x41)
#define P3_IVS_CLR P33_ACCESS(0x42)
#define P3_PVDD0_AUTO P33_ACCESS(0x43)
#define P3_PVDD1_AUTO P33_ACCESS(0x44)
#define P3_WKUP_DLY P33_ACCESS(0x45)
#define P3_PCNT_FLT P33_ACCESS(0x48)
#define P3_PCNT_CON P33_ACCESS(0x49)
#define P3_PCNT_SET0 P33_ACCESS(0x4a)
#define P3_PCNT_SET1 P33_ACCESS(0x4b)
#define P3_PCNT_DAT0 P33_ACCESS(0x4c)
#define P3_PCNT_DAT1 P33_ACCESS(0x4d)
#define P3_P11_CPU P33_ACCESS(0x4f)
//............. 0X0050 - 0X005F............ for port wake up
#define P3_WKUP_FLT_EN0 P33_ACCESS(0x50)
#define P3_WKUP_P_IE0 P33_ACCESS(0x51)
#define P3_WKUP_N_IE0 P33_ACCESS(0x52)
#define P3_WKUP_LEVEL0 P33_ACCESS(0x53)
#define P3_WKUP_P_CPND0 P33_ACCESS(0x54)
#define P3_WKUP_N_CPND0 P33_ACCESS(0x55)
#define P3_WKUP_P_PND0 P33_ACCESS(0x56)
#define P3_WKUP_N_PND0 P33_ACCESS(0x57)
#define P3_WKUP_FLT_EN1 P33_ACCESS(0x58)
#define P3_WKUP_P_IE1 P33_ACCESS(0x59)
#define P3_WKUP_N_IE1 P33_ACCESS(0x5a)
#define P3_WKUP_LEVEL1 P33_ACCESS(0x5b)
#define P3_WKUP_P_CPND1 P33_ACCESS(0x5c)
#define P3_WKUP_N_CPND1 P33_ACCESS(0x5d)
#define P3_WKUP_P_PND1 P33_ACCESS(0x5e)
#define P3_WKUP_N_PND1 P33_ACCESS(0x5f)
//............. 0X0060 - 0X006F............ for analog wake up
#define P3_AWKUP_FLT_EN P33_ACCESS(0x60)
#define P3_AWKUP_P_IE P33_ACCESS(0x61)
#define P3_AWKUP_N_IE P33_ACCESS(0x62)
#define P3_AWKUP_LEVEL P33_ACCESS(0x63)
#define P3_AWKUP_P_PND P33_ACCESS(0x64)
#define P3_AWKUP_N_PND P33_ACCESS(0x65)
#define P3_AWKUP_P_CPND P33_ACCESS(0x66)
#define P3_AWKUP_N_CPND P33_ACCESS(0x67)
#define P3_WKUP_CLK_SEL P33_ACCESS(0x68)
#define P3_AWKUP_CLK_SEL P33_ACCESS(0x69)
#define P3_SYS_PWR0 P33_ACCESS(0x6a)
#define P3_SYS_PWR1 P33_ACCESS(0x6b)
#define P3_SYS_PWR2 P33_ACCESS(0x6c)
#define P3_SYS_PWR3 P33_ACCESS(0x6d)
#define P3_SYS_PWR4 P33_ACCESS(0x6e)
#define P3_SYS_PWR5 P33_ACCESS(0x6f)
//............. 0X0070 - 0X007F............ for
#define P3_PGDR_CON0 P33_ACCESS(0x70)
#define P3_PGDR_CON1 P33_ACCESS(0x71)
#define P3_PGSD_CON P33_ACCESS(0x72)
#define P3_LP_CTL P33_ACCESS(0x74)
#define P3_LP_CFG P33_ACCESS(0x75)
#define P3_NVRAM_PWR P33_ACCESS(0x76)
#define P3_WVD_CON0 P33_ACCESS(0x77)
#define P3_PVD_CON0 P33_ACCESS(0x78)
#define P3_EVD_CON0 P33_ACCESS(0x79)
#define P3_PMU_CON0 P33_ACCESS(0x7a)
#define P3_PMU_CON4 P33_ACCESS(0x7e)
#define P3_PMU_CON5 P33_ACCESS(0x7f)
//............. 0X0080 - 0X008F............ for
#define P3_PINR_CON P33_ACCESS(0x80)
#define P3_PINR_CON1 P33_ACCESS(0x81)
#define P3_PINR_SAFE P33_ACCESS(0x82)
#define P3_PINR_SAFE1 P33_ACCESS(0x83)
#define P3_PINR_PND1 P33_ACCESS(0x84)
#define P3_RST_SRC0 P33_ACCESS(0x8e)
#define P3_RST_SRC1 P33_ACCESS(0x8f)
//............. 0X0090 - 0X009F............ for
#define P3_PSW_CON0 P33_ACCESS(0x90)
#define P3_PSW_CON1 P33_ACCESS(0x91)
#define P3_PSW_CON2 P33_ACCESS(0x92)
#define P3_PMU_ADC0 P33_ACCESS(0x93)
#define P3_PMU_ADC1 P33_ACCESS(0x94)
#define P3_VBG_CON0 P33_ACCESS(0x95)
#define P3_VBG_CON1 P33_ACCESS(0x96)
#define P3_IOV_CON0 P33_ACCESS(0x97)
#define P3_IOV_CON1 P33_ACCESS(0x98)
#define P3_PAVD_CON0 P33_ACCESS(0x99)
#define P3_DCV_CON0 P33_ACCESS(0x9a)
#define P3_DVD_CON0 P33_ACCESS(0x9b)
#define P3_DVD2_CON0 P33_ACCESS(0x9c)
#define P3_RVD_CON0 P33_ACCESS(0x9d)
#define P3_RVD_CON1 P33_ACCESS(0x9e)
#define P3_RVD2_CON0 P33_ACCESS(0x9f)
//............. 0X00A0 - 0X00AF............
#define P3_PR_PWR P33_ACCESS(0xa0)
#define P3_VPWR_CON0 P33_ACCESS(0xa1)
#define P3_VPWR_CON1 P33_ACCESS(0xa2)
#define P3_RTC_ADC0 P33_ACCESS(0xa3)
#define P3_LS_P11 P33_ACCESS(0xa4)
#define P3_LS_EN P33_ACCESS(0xa5)
#define P3_EXT_EFUSE_CON P33_ACCESS(0xa6)
#define P3_WKUP_SRC P33_ACCESS(0xa8)
#define P3_ANA_MFIX P33_ACCESS(0xa9)
#define P3_DBG_CON0 P33_ACCESS(0xaa)
#define P3_DBG_CON1 P33_ACCESS(0xab)
#define P3_MFIX_OPT P33_ACCESS(0xac)
//............. 0X00B0 - 0X00BF............ for EFUSE
#define P3_EFUSE_CON0 P33_ACCESS(0xb0)
#define P3_EFUSE_CON1 P33_ACCESS(0xb1)
#define P3_EFUSE_CON2 P33_ACCESS(0xb2)
#define P3_EFUSE_RDAT P33_ACCESS(0xb3)
#define P3_EFUSE_PU_DAT0 P33_ACCESS(0xb4)
#define P3_EFUSE_PU_DAT1 P33_ACCESS(0xb5)
#define P3_EFUSE_PU_DAT2 P33_ACCESS(0xb6)
#define P3_EFUSE_PU_DAT3 P33_ACCESS(0xb7)
#define P3_FUNC_EN P33_ACCESS(0xb8)
#define P3_FUNC_CTL0 P33_ACCESS(0xb9)
#define P3_FUNC_CTL1 P33_ACCESS(0xba)
#define P3_FUNC_CTL2 P33_ACCESS(0xbb)
#define P3_EFUSE_ANA0 P33_ACCESS(0xbc)
//............. 0X00C0 - 0X00CF............ for port input select
#define P3_PORT_SEL0 P33_ACCESS(0xc0)
#define P3_PORT_SEL1 P33_ACCESS(0xc1)
#define P3_PORT_SEL2 P33_ACCESS(0xc2)
#define P3_PORT_SEL3 P33_ACCESS(0xc3)
#define P3_PORT_SEL4 P33_ACCESS(0xc4)
#define P3_PORT_SEL5 P33_ACCESS(0xc5)
#define P3_PORT_SEL6 P33_ACCESS(0xc6)
#define P3_PORT_SEL7 P33_ACCESS(0xc7)
#define P3_PORT_SEL8 P33_ACCESS(0xc8)
//............. 0x00d0 - 0x00df............
#define P3_LS_IO_USR P33_ACCESS(0xd0) //TODO: check sync with verilog head file chip_def.v LEVEL_SHIFTER
#define P3_LS_IO_ROM P33_ACCESS(0xd1)
#define P3_LS_IO_PINR P33_ACCESS(0xd2)
#define P3_LS_CTMU P33_ACCESS(0xd3)
#define P3_LS_IO_SHA P33_ACCESS(0xd4)
#define P3_LS_LRC24M P33_ACCESS(0xd5)
#define P3_LS_BT P33_ACCESS(0xd6)
#define P3_LS_PLL P33_ACCESS(0xd7)
//............. 0X00E0 - 0X00FF............ for p33 lp timer
#define P3_LP_RSC00 P33_ACCESS(0xe0)
#define P3_LP_RSC01 P33_ACCESS(0xe1)
#define P3_LP_RSC02 P33_ACCESS(0xe2)
#define P3_LP_RSC03 P33_ACCESS(0xe3)
#define P3_LP_PRD00 P33_ACCESS(0xe4)
#define P3_LP_PRD01 P33_ACCESS(0xe5)
#define P3_LP_PRD02 P33_ACCESS(0xe6)
#define P3_LP_PRD03 P33_ACCESS(0xe7)
#define P3_LP_RSC10 P33_ACCESS(0xe8)
#define P3_LP_RSC11 P33_ACCESS(0xe9)
#define P3_LP_RSC12 P33_ACCESS(0xea)
#define P3_LP_RSC13 P33_ACCESS(0xeb)
#define P3_LP_RSC14 P33_ACCESS(0xec)
#define P3_LP_RSC15 P33_ACCESS(0xed)
#define P3_LP_PRD10 P33_ACCESS(0xee)
#define P3_LP_PRD11 P33_ACCESS(0xef)
#define P3_LP_PRD12 P33_ACCESS(0xf0)
#define P3_LP_PRD13 P33_ACCESS(0xf1)
#define P3_LP_PRD14 P33_ACCESS(0xf2)
#define P3_LP_PRD15 P33_ACCESS(0xf3)
#define P3_LP_TMR0_CLK P33_ACCESS(0xf4)
#define P3_LP_TMR1_CLK P33_ACCESS(0xf5)
#define P3_LP_TMR0_CON P33_ACCESS(0xf6)
#define P3_LP_TMR1_CON P33_ACCESS(0xf7)
#define P3_LP_TMR_CFG P33_ACCESS(0xf8)
#define P3_LP_CNTRD0 P33_ACCESS(0xf9)
#define P3_LP_CNT0 P33_ACCESS(0xfa)
#define P3_LP_CNT1 P33_ACCESS(0xfb)
#define P3_LP_CNT2 P33_ACCESS(0xfc)
#define P3_LP_CNT3 P33_ACCESS(0xfd)
#define P3_LP_CNT4 P33_ACCESS(0xfe)
#define P3_LP_CNT5 P33_ACCESS(0xff)
//===============================================================================//
//
// P33 RTCVDD
//
//===============================================================================//
//............. 0X0080 - 0X008F............ for RTC
#define R3_ALM_CON RTC_ACCESS(0x80)
#define R3_RTC_CON0 RTC_ACCESS(0x84)
#define R3_RTC_CON1 RTC_ACCESS(0x85)
#define R3_RTC_DAT0 RTC_ACCESS(0x86)
#define R3_RTC_DAT1 RTC_ACCESS(0x87)
#define R3_RTC_DAT2 RTC_ACCESS(0x88)
#define R3_RTC_DAT3 RTC_ACCESS(0x89)
#define R3_RTC_DAT4 RTC_ACCESS(0x8a)
#define R3_ALM_DAT0 RTC_ACCESS(0x8b)
#define R3_ALM_DAT1 RTC_ACCESS(0x8c)
#define R3_ALM_DAT2 RTC_ACCESS(0x8d)
#define R3_ALM_DAT3 RTC_ACCESS(0x8e)
#define R3_ALM_DAT4 RTC_ACCESS(0x8f)
//............. 0X0090 - 0X009F............ for wake up
#define R3_WKUP_EN RTC_ACCESS(0x90)
#define R3_WKUP_EDGE RTC_ACCESS(0x91)
#define R3_WKUP_CPND RTC_ACCESS(0x92)
#define R3_WKUP_PND RTC_ACCESS(0x93)
#define R3_WKUP_LEVEL RTC_ACCESS(0x94)
//............. 0X00A0 - 0X00AF............ for system
#define R3_TIME_CON RTC_ACCESS(0xa0)
#define R3_TIME_CPND RTC_ACCESS(0xa1)
#define R3_TIME_PND RTC_ACCESS(0xa2)
#define R3_ADC_CON RTC_ACCESS(0xa4)
#define R3_OSL_CON RTC_ACCESS(0xa5)
#define R3_WKUP_SRC RTC_ACCESS(0xa8)
#define R3_RST_SRC RTC_ACCESS(0xa9)
#define R3_RST_CON RTC_ACCESS(0xab)
#define R3_CLK_CON RTC_ACCESS(0xac)
//............. 0X00B0 - 0X00BF............ for PORT control
#define R3_PR_IN RTC_ACCESS(0xb0)
#define R3_PR_OUT RTC_ACCESS(0xb1)
#define R3_PR_DIR RTC_ACCESS(0xb2)
#define R3_PR_DIE RTC_ACCESS(0xb3)
#define R3_PR_PU0 RTC_ACCESS(0xb4)
#define R3_PR_PU1 RTC_ACCESS(0xb5)
#define R3_PR_PD0 RTC_ACCESS(0xb6)
#define R3_PR_PD1 RTC_ACCESS(0xb7)
#define R3_PR_HD0 RTC_ACCESS(0xb8)
#define R3_PR_HD1 RTC_ACCESS(0xb9)
#endif
@@ -0,0 +1,53 @@
/**@file power_api.h
* @brief 电源、低功耗
* @details
* @author
* @date 2021-8-26
* @version V1.0
* @copyright Copyright:(c)JIELI 2011-2020 @ , All Rights Reserved.
*/
#ifndef __POWER_API__
#define __POWER_API__
#define P11_POWEROFF_DATA //AT(.p11_poweroff_data)
#define P11_POWEROFF_BSS //AT(.p11_poweroff_bss)
#define P11_POWEROFF_CODE //_NOINLINE_ AT(.p11_poweroff_code)
//
//
// platform_data
//
//
//
//******************************************************************
struct _power_pdata {
};
//
//
// power_api
//
//
//
//******************************************************************
#include "power_manage.h"
void power_early_init(u32 arg);
void power_later_init(u32 arg);
void power_init(struct _power_pdata *pdata);
//
//
// lowpower
//
//
//
//******************************************************************
void __power_recover(void);
void p11_lowpower_schedule(void);
#endif
@@ -0,0 +1,9 @@
#ifndef __POWER_APP_H__
#define __POWER_APP_H__
void power_early_flowing();
int power_later_flowing();
void board_power_init();
#endif
@@ -0,0 +1,104 @@
#ifndef __POWER_MANAGE_H__
#define __POWER_MANAGE_H__
//******************************************************************************************
/*p11低功耗等级
*/
enum LOW_POWER_LEVEL {
P11_POWER_MODE_RUN = 0,
P11_POWER_MODE_IDLE,
P11_POWER_MODE_STANDBY,
P11_POWER_MODE_SLEEP,
P11_POWER_MODE_DEEP_SLEEP,
P11_POWER_MODE_DEEP_SLEEP_BEST_PDOWN,
P11_POWER_MODE_DEEP_SLEEP_BEST_POFF,
};
struct low_power_target {
char *name;
enum LOW_POWER_LEVEL(*level)();
};
extern const struct low_power_target low_power_target_begin[];
extern const struct low_power_target low_power_target_end[];
#define list_for_each_low_power_target(p) \
for (p = low_power_target_begin; p < low_power_target_end; p++)
#define REGISTER_LOWPOWER_TARGET(target) \
static const struct low_power_target target SEC_USED(.lp_target)
enum LOW_POWER_LEVEL p11_low_power_level(void);
u8 is_p11_low_power_mode(enum LOW_POWER_LEVEL level);
//******************************************************************************************
/*p11低功耗回调
*/
struct low_power_callback {
void (*low_power_enter)(enum LOW_POWER_LEVEL level);
void (*low_power_exit)(enum LOW_POWER_LEVEL level);
};
extern const struct low_power_callback low_power_callback_begin[];
extern const struct low_power_callback low_power_callback_end[];
#define list_for_each_low_power_callback(p) \
for (p = low_power_callback_begin; p < low_power_callback_end; p++)
#define REGISTER_LOWPOWER_CALLBACK(callback) \
static const struct low_power_callback target SEC_USED(.lp_target)
//******************************************************************************************
/*
* deepsleep register
*/
struct deepsleep_target {
char *name;
u8(*enter)(void);
u8(*exit)(void);
};
#define DEEPSLEEP_TARGET_REGISTER(target) \
const struct deepsleep_target target SEC_USED(.deepsleep_target)
extern const struct deepsleep_target deepsleep_target_begin[];
extern const struct deepsleep_target deepsleep_target_end[];
#define list_for_each_deepsleep_target(p) \
for (p = deepsleep_target_begin; p < deepsleep_target_end; p++)
//******************************************************************************************
struct _phw_dev {
};
struct phw_dev_ops {
void *(*early_init)(u32 arg);
u32(*init)(struct _phw_dev *dev, u32 arg);
u32(*ioctl)(struct _phw_dev *dev, u32 cmd, u32 arg);
u32(*sleep_already)(struct _phw_dev *dev, u32 arg);
u32(*sleep_prepare)(struct _phw_dev *dev, u32 arg);
u32(*sleep_enter)(struct _phw_dev *dev, u32 arg);
u32(*sleep_exit)(struct _phw_dev *dev, u32 arg);
u32(*sleep_post)(struct _phw_dev *dev, u32 arg);
u32(*soff_prepare)(struct _phw_dev *dev, u32 arg);
u32(*soff_enter)(struct _phw_dev *dev, u32 arg);
u32(*soff_exit)(struct _phw_dev *dev, u32 arg);
u32(*deepsleep_enter)(struct _phw_dev *dev, u32 arg);
u32(*deepsleep_exit)(struct _phw_dev *dev, u32 arg);
};
#define REGISTER_PHW_DEV_PMU_OPS(ops) \
const struct phw_dev_ops *phw_pmu_ops = &ops
extern const struct phw_dev_ops *phw_pmu_ops;
#endif
@@ -0,0 +1,6 @@
#ifndef __POWER_PORT_H__
#define __POWER_PORT_H__
void port_init();
#endif
@@ -0,0 +1,14 @@
#ifndef __POWER_WAKEUP_H__
#define __POWER_WAKEUP_H__
typedef enum {
RISING_EDGE = 1,
FALLING_EDGE,
BOTH_EDGE,
} P33_IO_WKUP_EDGE;
void power_wakeup_init();
void p33_io_wakeup_set_callback(u32(*callback)(u32 imap, P33_IO_WKUP_EDGE edge));
#endif
@@ -0,0 +1,32 @@
#ifndef __POWER_INTERFACE_H__
#define __POWER_INTERFACE_H__
#include "includes.h"
//-------------------------------------------------------
/* p33
*/
#include "power/p33/p33_sfr.h"
#include "power/p33/p33_api.h"
#include "power/p33/p33_access.h"
//-------------------------------------------------------
/* p11
*/
#include "power/p11/p11_csfr.h"
#include "power/p11/p11_sfr.h"
#include "power/p11/lp_ipc.h"
#include "power/p11/p11_mmap.h"
#include "power/p11/p11_api.h"
#include "power/p11/p11_rom_api.h"
#include "power/p11/p11_clock_hw.h"
//-------------------------------------------------------
/* power
*/
#include "power/power_app.h"
#include "power/power_api.h"
#include "power/power_wakeup.h"
#include "power/power_port.h"
#endif
+20
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@@ -0,0 +1,20 @@
#ifndef __TIMER_H__
#define __TIMER_H__
#include "typedef.h"
#include "p11_gptimer.h"
#define USR_TMR GPTIMER1
void timer_suspend(void);
void timer_resume(u32 usec);
void timer_stop(void);
void timer_run(u32 period_ms);
void timer_init();
_INLINE_ u32 timer_get_jiffies();
_INLINE_ u64 timer_get_sys_tick_time_us(void);
void timer_set_clock_source(u32 clk);
void timer_dump();
#endif
+71
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@@ -0,0 +1,71 @@
#ifndef __UART_H__
#define __UART_H__
enum UART_CLK_TABLE {
UART_CLK_DIABLE = 0,
UART_CLK_STD_12M,
UART_CLK_RC16M,
UART_CLK_SYS_CLK,
};
//======================================================//
// UART HW DEFINE //
//======================================================//
//------------------- P11_UARTx->BAUD
#define UART_BAUD_SET(x,v) (x->BAUD = v)
//------------------- P11_UARTx->CLK_CON0
#define UART_CON0_CLEAR(x) (x->CON0 = 0)
#define UART_TX_PENDING_IS(x) (x->CON0 & BIT(15))
#define UART_RX_PENDING_IS(x) (x->CON0 & BIT(14))
#define UART_TX_PENDING_CLEAR(x) (x->CON0 |= BIT(13))
#define UART_RX_PENDING_CLEAR(x) (x->CON0 |= BIT(12))
#define UART_OT_PENDING_IS(x) (x->CON0 & BIT(11))
#define UART_OT_PENDING_CLEAR(x) (x->CON0 |= BIT(10))
#define UART_OT_INT_ENABLE(x) (x->CON0 |= BIT(5))
#define UART_OT_INT_DISABLE(x) (x->CON0 &= ~BIT(5))
enum UART_CLK_DIV_TABLE {
UART_CLK_DIV_4,
UART_CLK_DIV_3,
};
/*
波特率计算:
UART_BAUD_SET = Fuart_clk / ((BAUD + 1) * UART_DIV_SEL)
*/
#define UART_DIV_SEL(x,v) SFR(x->CON0, 4, 1, v)
#define UART_RX_INT_ENABLE(x) (x->CON0 |= BIT(3))
#define UART_RX_INT_DISABLE(x) (x->CON0 &= ~BIT(3))
#define UART_TX_INT_ENABLE(x) (x->CON0 |= BIT(2))
#define UART_TX_INT_DISABLE(x) (x->CON0 &= ~BIT(2))
#define UART_RX_ENABLE(x) (x->CON0 |= BIT(1))
#define UART_RX_DISABLE(x) (x->CON0 &= ~BIT(1))
#define UART_TX_ENABLE(x) (x->CON0 |= BIT(0))
#define UART_TX_DISABLE(x) (x->CON0 &= ~BIT(0))
//------------------- P11_UARTx->CLK_CON2
#define UART_CON1_CLEAR(x) (x->CON2 = 0)
#define UART_9BIT_ENABLE(x) (x->CON2 |= BIT(0))
#define UART_9BIT_DISABLE(x) (x->CON2 &= ~BIT(0))
#define UART_9BIT_TX_DATA(x,v) SFR(x->CON2, 1, 1 v)
#define UART_9BIT_RX_DATA(x) (x->CON2 & BIT(2))
//------------------- P11_UARTx->BUF
#define UART_BUF_WRITE(x,v) (x->BUF = v)
#define UART_BUF_READ(x) (x->BUF)
//------------------- P11_UARTx->OTCNT
/*
OT超时计算:
Tot = Tuart_clk * UART_OTCNT_SET
*/
#define UART_OTCNT_SET(x,v) (x->OTCNT = v)
void debug_uart_init(u8 tx_port);
void uart_clk_sel(enum UART_CLK_TABLE clk);
#endif
@@ -0,0 +1,8 @@
#ifndef _DUBUG_H_
#define _DUBUG_H_
void exception_analyze(u32 *p_sp);
void debug_init(void);
void debug_test();
#endif /* #ifndef _DUBUG_H_ */
+111
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@@ -0,0 +1,111 @@
#ifndef __ASS_Q32S_HWI__
#define __ASS_Q32S_HWI__
//*********************************************************************************//
// Module name : hwi.h //
// Description : q32DSP interrupt head file //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
#define IRQ_EXCEPTION_IDX 0
#define IRQ_SOFT0_IDX 1
#define IRQ_M2P_IDX 2
#define IRQ_P33_IDX 3
#define IRQ_WDT_IDX 4
//#define IRQ_SPI_IDX 5
#define IRQ_UART0_IDX 6
//#define IRQ_UART1_IDX 7
#define IRQ_IIC_IDX 8
#define IRQ_LP_TMR0_IDX 9
#define IRQ_LP_TMR1_IDX 10
#define IRQ_P33_LPTMR0_IDX 11
#define IRQ_P33_LPTMR1_IDX 12
#define IRQ_GP_TMR0_IDX 13
#define IRQ_GP_TMR1_IDX 14
#define IRQ_LP_CTM_IDX 15
//#define IRQ_LP_CTM1_IDX 16
//#define IRQ_LP_VAD_IDX 17
//#define IRQ_LP_NFC_IDX 18
#define IRQ_PINR_IDX 19
#define IRQ_GPCNT_IDX 20
//---------------------------------------------//
// interrupt install
//---------------------------------------------//
void reg_set_ip(unsigned char index, unsigned char dat);
void bit_set_ie(unsigned char index);
void bit_clr_ie(unsigned char index);
void bit_set_swi(unsigned char index);
void bit_clr_swi(unsigned char index);
void request_irq(u8 index, void (*handler)(void), u8 priority);
//---------------------------------------------//
// core_num
//---------------------------------------------//
static inline int core_num(void)
{
u32 num;
asm volatile("%0 = cnum" : "=r"(num) :);
return num;
}
//---------------------------------------------//
// interrupt enable
//---------------------------------------------//
#define ENABLE_INT enable_int
#define enable_int() local_irq_enable()
#define DISABLE_INT disable_int
#define disable_int() local_irq_disable()
#define ___interrupt __attribute__((interrupt("")))
void local_irq_disable();
void local_irq_enable();
void irq_disable_core();
void irq_enable_core();
#define P33_IE_ENABLE() \
bit_set_ie(IRQ_P33_IDX)
#define P33_IE_DISABLE() \
bit_clr_ie(IRQ_P33_IDX)
static inline int cpu_in_irq()
{
int flag;
__asm__ volatile("%0 = icfg" : "=r"(flag));
return flag & 0xff;
}
static inline int cpu_irq_disable()
{
#if 0
int flag;
int ret;
__asm__ volatile("%0 = icfg" : "=r"(flag));
ret = ((flag & 0x300) != 0x300);
return ret;
#else
extern int __cpu_irq_disabled();
return __cpu_irq_disabled();
#endif
}
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
#endif
@@ -0,0 +1,28 @@
#ifndef __INCLUDES__
#define __INCLUDES__
#define PMU_SYSTEM 1
//utils
#include "typedef.h"
#include "typedef/assert.h"
#include "printf.h"
#include "string.h"
#include "delay.h"
//apps
#include "lib_config.h"
#include "sdk_config.h"
//driver
#include "power_interface.h"
#include "clock_interface.h"
#include "uart.h"
//system
#include "hwi.h"
#include "interrupt_hw.h"
#include "debug.h"
#endif
@@ -0,0 +1,32 @@
#ifndef __INTERRUPT_HW__
#define __INTERRUPT_HW__
/*
gpcnt需要打断低功耗采样,优先即最高且不可屏蔽
*/
#define IRQ_EXCEPTION_IP 0
#define IRQ_M2P_IP 2
#define IRQ_P33_IP 0
#define IRQ_PINR_IP 0
#define IRQ_SOFT0_IP 0
#define IRQ_WDT_IP 0
#define IRQ_SPI_IP 0
#define IRQ_UART0_IP 0
#define IRQ_UART1_IP 0
#define IRQ_IIC_IP 0
#define IRQ_LP_TMR0_IP 2
#define IRQ_LP_TMR1_IP 0
#define IRQ_LP_TMR2_IP 0
#define IRQ_LP_TMR3_IP 0
#define IRQ_GP_TMR0_IP 0
#define IRQ_GP_TMR1_IP 0
#define IRQ_LP_CTM_IP 1
#define IRQ_LP_VAD_IP 0
#define IRQ_GPCNT_IP 3
#endif
+9
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@@ -0,0 +1,9 @@
#ifndef __DELAY_H__
#define __DELAY_H__
void delay(u32 cnt);
void udelay(u32 us);//不准
void mdelay(u32 ms);//不准
#endif
+16
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@@ -0,0 +1,16 @@
#ifndef __ASSERT_H__
#define __ASSERT_H__
#define ASSERT(a,...) \
do { \
if(!(a)){ \
printf("file:%s, line:%d", __FILE__, __LINE__); \
printf("ASSERT-FAILD: "#a" "__VA_ARGS__); \
while(1); \
} \
}while(0);
#endif /* #ifndef _COMMON_H_ */
@@ -0,0 +1,90 @@
//*********************************************************************************//
// Module name : typedef.h //
// Description : typedef head file //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
#ifndef __typedef_h__
#define __typedef_h__
//------------------------------------------------------//
// typedef
//------------------------------------------------------//
//typedef bool _bit, bit;
typedef float _f32, f32;
typedef double _d64, d64;
typedef signed char _s08, s08, _s8, s8;
typedef signed short _s16, s16;
typedef signed int _s32, s32;
typedef signed long long _s64, s64;
typedef unsigned char _u08, u08, _u8, u8, bool, BOOL;
typedef unsigned short _u16, u16;
typedef unsigned int _u32, u32;
typedef unsigned long long _u64, u64;
#define ARRAY_SIZE(array) (sizeof(array)/sizeof(array[0]))
//------------------------------------------------------//
// condition
//------------------------------------------------------//
#define SIMEND asm ("trigger")
#define FALSE 0
#define TRUE 1
#define false 0
#define true 1
#define NULL 0
#define AT(x) __attribute__ ((section(#x)))
#define SEC_USED(x) __attribute__((section(#x),used))
#define _INLINE_ __attribute__ ((always_inline))
#define _NOINLINE_ __attribute__ ((noinline))
#define __WEAK__ __attribute__((weak))
#define __NO_INIT__
#define ___interrupt __attribute__((interrupt("")))
#define ALIGNED(x) __attribute__((aligned(x)))
//------------------------------------------------------//
// common define
//------------------------------------------------------//
#define hi(adr) ( (adr) >> 16 )
#define lo(adr) ( (adr) & 0xffff )
#define LDR_W(ptr) *( (volatile _u32*)(ptr) )
#define LDR_H(ptr) *( (volatile _u16*)(ptr) )
#define LDR_B(ptr) *( (volatile _u08*)(ptr) )
#define STR_W(ptr,vld) *( (volatile _u32*)(ptr) ) = (_u32)(vld);
#define STR_H(ptr,vld) *( (volatile _u16*)(ptr) ) = (_u16)(vld);
#define STR_B(ptr,vld) *( (volatile _u08*)(ptr) ) = (_u08)(vld);
#define BIT(n) ( 1<<(n) )
#define BITSET(r,n) ( r |= (1<<(n)) )
#define BITCLR(r,n) ( r &= ~(1<<(n)) )
#define BITXOR(r,n) ( r ^= (1<<(n)) )
#define BITTST(r,n) ( r & (1<<(n)) )
#define BIT_CHK1(r,n) ( BITTST((r),(n)) == (1<<(n)) )
#define BIT_CHK0(r,n) ( BITTST((r),(n)) == (0<<(n)) )
#define MIN(a,b) ( ((a)<(b)) ? (a) : (b) )
#define MAX(a,b) ( ((a)>(b)) ? (a) : (b) )
#define SFR(sfr, start, len, dat) (sfr = sfr & ~((~(0xffffffff << (len))) << (start)) | (((dat) & (~(0xffffffff << (len)))) << (start)))
#define NOP() asm volatile ("nop")
#endif
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
+25
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@@ -0,0 +1,25 @@
#ifndef __USR_TIMER_H__
#define __USR_TIMER_H__
#define time_after(a,b) ((long)(b) - (long)(a) <= 0)
#define time_before(a,b) time_after(b,a)
#define TIMER_ID_0_ERROR 1 // ID号0错误
u16 usr_timer_add(void *priv, void (*func)(void *priv), u32 msec, u8 priority);
void usr_timer_del(u16 t);
u16 usr_timeout_add(void *priv, void (*func)(void *priv), u32 msec, u8 priority);
void usr_timeout_del(u16 t);
int usr_timer_modify(u16 id, u32 msec);
int usr_timeout_modify(u16 id, u32 msec);
void usr_timer_schedule();
void usr_timer_dump(void);
void usr_timer_init();
u32 usr_timer_get_timeout();
#endif
+62
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@@ -0,0 +1,62 @@
/*********************************************************************************************
* Filename : bank_switch.h
* Description : 本文件存放P11切Bank流程接口(API)和数据结构声明
* Author : MoZhiYe
* Email : mozhiye@zh-jieli.com
* Last modifiled : 2021-11-22 10:00
* Copyright:(c)JIELI 2021-2029 @ , All Rights Reserved.
*********************************************************************************************/
#ifndef __BANK_SWITCH__
#define __BANK_SWITCH__
//====================================================//
// BANK模块管理 //
//====================================================//
//demo
#define BANK_DEMO_TAG "demo"
#define BANK_CODE_DEMO_INIT_BANK_0 0
#define BANK_CODE_DEMO_NORMAL_BANK_1 1
#define BANK_CODE_DEMO_NORMAL_BANK_2 2
#define BANK_CODE_DEMO_BANK_MAX 3
#define BANK_SENSOR_TAG "sensor"
#define BANK_CODE_SENSOR_INIT_BANK_0 0
#define BANK_CODE_SENSOR_NORMAL_BANK_1 1
#define BANK_CODE_SENSOR_NORMAL_BANK_2 2
#define BANK_CODE_SENSOR_BANK_MAX 3
#define BANK_SYS_TAG "sys"
#define BANK_CODE_SYS_INIT_BANK_0 0
#define BANK_CODE_SYS_NORMAL_BANK_1 1
extern int overlay_demo_begin[];
extern int overlay_sensor_begin[];
//others
#define _BANK_CODE_SEG(name, index) __attribute__((section("."name".code.bank."#index)))
#define __BANK_CODE_SEG_DEFINE(name, index) _BANK_CODE_SEG(name, index)
#define REGISTER_CODE_SEG(index) \
_BANK_CODE_SEG(BANK_NAME,index)
struct bank_info {
char *name;
u8 total_bank;
u32 run_addr;
};
void bank_code_switch(char *name, u8 bank_index);
#endif /* #ifndef __BANK_SWITCH__ */
+360
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@@ -0,0 +1,360 @@
#ifndef CIRCULAR_BUF_INTERFACE_H
#define CIRCULAR_BUF_INTERFACE_H
#include "typedef.h"
// #include "system/spinlock.h"
/* --------------------------------------------------------------------------*/
/**
* @brief cbuffer 私有成员结构体
*/
/* ----------------------------------------------------------------------------*/
typedef struct _cbuffer_child {
u16 en : 1;
u16 offset: 15;
} cbuffer_child_t;
/* --------------------------------------------------------------------------*/
/**
* @brief cbuffer结构体
*/
/* ----------------------------------------------------------------------------*/
typedef struct _cbuffer {
u8 *begin;
u8 *end;
u8 *read_ptr;
u8 *write_ptr;
u8 *tmp_ptr ;
u16 tmp_len;
u16 data_len;
u16 total_len;
u8 child_count;
cbuffer_child_t *child;
} cbuffer_t;
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief cbuffer初始化
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] buf 缓存空间
* @param [in] size 缓存总大小
*/
/* ----------------------------------------------------------------------------*/
void cbuf_init(cbuffer_t *cbuffer, void *buf, u32 size);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:cb_memcpy管理
* @brief 把cbuffer_t结构体管理的内存空间的数据拷贝到buf数组
* @param [in] cbuffer cbuffer 句柄
* @param [out] buf 指向用于存储读取内容的目标数组
* @param [in] len 要读取的字节长度
*
* @return 成功读取的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_read(cbuffer_t *cbuffer, void *buf, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:cb_memcpy管理
* @brief 把buf数组数据拷贝cbuffer_t结构体管理的内存空间
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] buf 指向用于存储写入内容的目标数组
* @param [in] len 要写入的字节长度
*
* @return 成功写入的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_write(cbuffer_t *cbuffer, void *buf, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 判断是否可写入len字节长度的数据
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] len len字节长度的数据
*
* @return 返回可以写入的len字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_is_write_able(cbuffer_t *cbuffer, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:外部内存管理
* @brief 预分配待写入数据的空间,要和cbuf_write_updata()配套使用,更新cbuf管理handle数据。
*
* @param [in] cbuffer cbuffer句柄
* @param [in] len 回传可以最多写入len字节长度的数据
*
* @return 当前写指针的地址
*/
/* ----------------------------------------------------------------------------*/
void *cbuf_write_alloc(cbuffer_t *cbuffer, u32 *len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:外部内存管理
* @brief 更新cbuf管理handle的写指针位置和数据长度
*
* @param [in] cbuffer cbuffer句柄
* @param [in] len 在非cbuffer_t结构体包含的内存空间中写入的数据的实际字节长度
*
* @return 当前写指针的地址
*/
/* ----------------------------------------------------------------------------*/
void cbuf_write_updata(cbuffer_t *cbuffer, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:外部内存管理
* @brief 预分配待读取数据的空间,需要和cbuf_read_updata()配套使用,更新cbuf管理handle数据
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] len 回传可以最多读取len字节长度的数据
*
* @return 当前读指针的地址
*/
/* ----------------------------------------------------------------------------*/
void *cbuf_read_alloc(cbuffer_t *cbuffer, u32 *len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:外部内存管理
* @brief 更新cbuf管理handle的读指针位置和数据长度
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] len 在非cbuffer_t结构体包含的内存空间中读取的数据的实际字节长度
*/
/* ----------------------------------------------------------------------------*/
void cbuf_read_updata(cbuffer_t *cbuffer, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:外部内存管理
* @brief 清空cbuffer空间
*
* @param [in] cbuffer cbuffer 句柄
*/
/* ----------------------------------------------------------------------------*/
void cbuf_clear(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:cb_memcpy管理。
* @brief 指定位置进行数据重写
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] begin 指向需要重写内容的开始地址
* @param [out] buf 指向用于存储重写内容的目标数组
* @param [in] len 待重写内容的长度
*
* @return 成功重写的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_rewrite(cbuffer_t *cbuffer, void *begin, void *buf, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:cb_memcpy管理
* @brief 更新指向上一次操作的指针为当前指针,并刷新数据长度
*
* @param [in] cbuffer cbuffer 句柄
*/
/* ----------------------------------------------------------------------------*/
void cbuf_discard_prewrite(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:cb_memcpy管理
* @brief 操作指针回退到上一次的操作位置,并刷新数据长度
*
* @param [in] cbuffer cbuffer 句柄
*/
/* ----------------------------------------------------------------------------*/
void cbuf_updata_prewrite(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:cb_memcpy管理
* @brief 回退写入内容,从上一次的操作的指针处进行覆盖填充
*
* @param [in] cbuffer cbuffer 句柄
* @param [out] buf 指向用于覆盖写入内容的目标数组
* @param [in] len 填充数据的字节长度
*
* @return 成功填充数据的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_prewrite(cbuffer_t *cbuffer, void *buf, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 获取指向写指针的地址
*
* @param [in] cbuffer cbuffer 句柄
*
* @return 写指针的地址
*/
/* ----------------------------------------------------------------------------*/
void *cbuf_get_writeptr(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 获取cbuffer存储的数据的字节长度
*
* @param [in] cbuffer cbuffer句柄
*
* @return 获取cbuffer存储的数据的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_get_data_size(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 获取指向读指针的地址
*
* @param [in] cbuffer cbuffer句柄
*
* @return 读指针的地址
*/
/* ----------------------------------------------------------------------------*/
void *cbuf_get_readptr(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 读指针向后回退
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] len 要回退的字节长度
*
* @return 成功回退的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_read_goback(cbuffer_t *cbuffer, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 获取存储数据的字节长度
*
* @param [in] cbuffer cbuffer 句柄
*
* @return 存储数据的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_get_data_len(cbuffer_t *cbuffer);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:memcpy管理+cbuf_read_alloc系列管理函数
* @brief 预分配待读取数据的空间,并把读取到的数据存入buf数组
*
* @param [in] cbuffer cbuffer 句柄
* @param [out] buf 存储读取的数据的目标buf数组
* @param [in] len 要读取的数据的字节长度
*
* @return
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_read_alloc_len(cbuffer_t *cbuffer, void *buf, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:memcpy管理+cbuf_read_alloc系列管理函数
* @brief 更新cbuf管理handle的读指针位置和数据长度
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] len 要更新的数据的字节长度
*/
/* ----------------------------------------------------------------------------*/
void cbuf_read_alloc_len_updata(cbuffer_t *cbuffer, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief cbuffer初始化
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] buf 缓存空间
* @param [in] size 缓存总大小
* @param [in] count 需要读数的对象总数
* @param [in] child 需要读数的结构体私有属性
*/
/* ----------------------------------------------------------------------------*/
void cbuf_mult_read_init(cbuffer_t *cbuffer, void *buf, u32 size, u32 count, cbuffer_child_t *child);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief cbuffer 通道开关
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] index 通道索引
* @param [in] enable 通道开关
*/
/* ----------------------------------------------------------------------------*/
void cbuf_mult_entry_enable(cbuffer_t *cbuffer, int index, int enable);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:全局
* @brief 获取存储数据的字节长度
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] index 当前通道的索引
* @return 存储数据的字节长度
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_mult_read_get_data_len(cbuffer_t *cbuffer, int index);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:memcpy管理+cbuf_read_alloc系列管理函数
* @brief 预分配待读取数据的空间,并把读取到的数据存入buf数组
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] index 当前通道的索引
* @param [out] buf 存储读取的数据的目标buf数组
* @param [in] len 要读取的数据的字节长度
*
* @return
*/
/* ----------------------------------------------------------------------------*/
u32 cbuf_mult_read_alloc_len(cbuffer_t *cbuffer, int index, void *buf, u32 len);
/* --------------------------------------------------------------------------*/
/**
* @brief 适用范围:memcpy管理+cbuf_read_alloc系列管理函数
* @brief 更新cbuf管理handle的读指针位置和数据长度
*
* @param [in] cbuffer cbuffer 句柄
* @param [in] index 当前通道的索引
* @param [in] len 要更新的数据的字节长度
*/
/* ----------------------------------------------------------------------------*/
void cbuf_mult_read_alloc_len_updata(cbuffer_t *cbuffer, int index, u32 len);
#endif
+23
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@@ -0,0 +1,23 @@
#ifndef _PRINTF_H_
#define _PRINTF_H_
#define line_inf printf("%s %s %d \r\n" ,__FILE__, __func__ , __LINE__) ;
#include <stdarg.h>
#include "typedef/typedef.h"
//#define NOFLOAT
extern void putchar(char a);
extern void putbyte(char a);
extern int puts(const char *out);
void put_u16hex(u16 dat);
void put_u32hex(unsigned int dat);
void put_buf(const u8 *buf, int len);
int printf(const char *format, ...);
//int assert_printf(const char *format, ...);
// int sprintf(char *out, const char *format, ...);
// int vprintf(const char *fmt, __builtin_va_list va);
// int vsnprintf(char *, unsigned long, const char *, __builtin_va_list);
// int snprintf(char *buf, unsigned long size, const char *fmt, ...);
// int print(char **out, char *end, const char *format, va_list args);
//int snprintf(char *, unsigned long, const char *, ...);
#endif
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SET SCRIPT_PATH=%~dp0%
set PATH=%SCRIPT_PATH%\utils;%PATH%
cd ..
cmd
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@echo off
setlocal enabledelayedexpansion
set INDIR=%1%
set MERGE=%2%
set AROUT=%3%
echo %INDIR%
echo %MERGE%
echo %AROUT%
set FILES=
for /f "tokens=*" %%i in ('dir /b %INDIR%\*.a') DO SET FILES=!FILES! %INDIR%\%%i
echo %FILES%
%MERGE% --no-rewrite --output %AROUT% %FILES%
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