初版
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#ifndef _DUBUG_H_
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#define _DUBUG_H_
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void exception_analyze(u32 *p_sp);
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void debug_init(void);
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void debug_test();
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#endif /* #ifndef _DUBUG_H_ */
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#ifndef __ASS_Q32S_HWI__
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#define __ASS_Q32S_HWI__
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//*********************************************************************************//
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// Module name : hwi.h //
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// Description : q32DSP interrupt head file //
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// By Designer : zequan_liu //
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// Dat changed : //
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//*********************************************************************************//
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#define IRQ_EXCEPTION_IDX 0
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#define IRQ_SOFT0_IDX 1
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#define IRQ_M2P_IDX 2
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#define IRQ_P33_IDX 3
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#define IRQ_WDT_IDX 4
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//#define IRQ_SPI_IDX 5
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#define IRQ_UART0_IDX 6
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//#define IRQ_UART1_IDX 7
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#define IRQ_IIC_IDX 8
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#define IRQ_LP_TMR0_IDX 9
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#define IRQ_LP_TMR1_IDX 10
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#define IRQ_P33_LPTMR0_IDX 11
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#define IRQ_P33_LPTMR1_IDX 12
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#define IRQ_GP_TMR0_IDX 13
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#define IRQ_GP_TMR1_IDX 14
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#define IRQ_LP_CTM_IDX 15
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//#define IRQ_LP_CTM1_IDX 16
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//#define IRQ_LP_VAD_IDX 17
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//#define IRQ_LP_NFC_IDX 18
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#define IRQ_PINR_IDX 19
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#define IRQ_GPCNT_IDX 20
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//---------------------------------------------//
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// interrupt install
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//---------------------------------------------//
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void reg_set_ip(unsigned char index, unsigned char dat);
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void bit_set_ie(unsigned char index);
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void bit_clr_ie(unsigned char index);
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void bit_set_swi(unsigned char index);
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void bit_clr_swi(unsigned char index);
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void request_irq(u8 index, void (*handler)(void), u8 priority);
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//---------------------------------------------//
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// core_num
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//---------------------------------------------//
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static inline int core_num(void)
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{
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u32 num;
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asm volatile("%0 = cnum" : "=r"(num) :);
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return num;
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}
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//---------------------------------------------//
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// interrupt enable
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//---------------------------------------------//
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#define ENABLE_INT enable_int
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#define enable_int() local_irq_enable()
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#define DISABLE_INT disable_int
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#define disable_int() local_irq_disable()
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#define ___interrupt __attribute__((interrupt("")))
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void local_irq_disable();
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void local_irq_enable();
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void irq_disable_core();
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void irq_enable_core();
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#define P33_IE_ENABLE() \
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bit_set_ie(IRQ_P33_IDX)
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#define P33_IE_DISABLE() \
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bit_clr_ie(IRQ_P33_IDX)
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static inline int cpu_in_irq()
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{
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int flag;
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__asm__ volatile("%0 = icfg" : "=r"(flag));
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return flag & 0xff;
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}
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static inline int cpu_irq_disable()
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{
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#if 0
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int flag;
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int ret;
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__asm__ volatile("%0 = icfg" : "=r"(flag));
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ret = ((flag & 0x300) != 0x300);
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return ret;
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#else
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extern int __cpu_irq_disabled();
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return __cpu_irq_disabled();
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#endif
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}
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//*********************************************************************************//
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// //
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// end of this module //
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// //
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//*********************************************************************************//
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#endif
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@@ -0,0 +1,28 @@
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#ifndef __INCLUDES__
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#define __INCLUDES__
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#define PMU_SYSTEM 1
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//utils
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#include "typedef.h"
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#include "typedef/assert.h"
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#include "printf.h"
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#include "string.h"
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#include "delay.h"
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//apps
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#include "lib_config.h"
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#include "sdk_config.h"
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//driver
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#include "power_interface.h"
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#include "clock_interface.h"
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#include "uart.h"
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//system
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#include "hwi.h"
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#include "interrupt_hw.h"
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#include "debug.h"
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#endif
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@@ -0,0 +1,32 @@
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#ifndef __INTERRUPT_HW__
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#define __INTERRUPT_HW__
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/*
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gpcnt需要打断低功耗采样,优先即最高且不可屏蔽
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*/
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#define IRQ_EXCEPTION_IP 0
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#define IRQ_M2P_IP 2
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#define IRQ_P33_IP 0
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#define IRQ_PINR_IP 0
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#define IRQ_SOFT0_IP 0
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#define IRQ_WDT_IP 0
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#define IRQ_SPI_IP 0
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#define IRQ_UART0_IP 0
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#define IRQ_UART1_IP 0
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#define IRQ_IIC_IP 0
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#define IRQ_LP_TMR0_IP 2
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#define IRQ_LP_TMR1_IP 0
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#define IRQ_LP_TMR2_IP 0
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#define IRQ_LP_TMR3_IP 0
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#define IRQ_GP_TMR0_IP 0
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#define IRQ_GP_TMR1_IP 0
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#define IRQ_LP_CTM_IP 1
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#define IRQ_LP_VAD_IP 0
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#define IRQ_GPCNT_IP 3
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#endif
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