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This commit is contained in:
huxi
2025-12-03 11:12:34 +08:00
parent c23ae4f24c
commit bc195654bf
8163 changed files with 3799544 additions and 92 deletions
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loader/update_ui/BootLoaderUI.cbp
+181
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<CodeBlocks_project_file>
<FileVersion major="1" minor="6" />
<Project>
<Option title="BootLoaderUI" />
<Option compiler="pi32v2_r3_lto_compiler" />
<Build>
<Target title="Release">
<Option output="cpu/br35/tools/sdk.elf" prefix_auto="0" extension_auto="0" />
<Option object_output="obj/Release/" />
<Option type="1" />
<Option compiler="pi32v2_r3_large_lto_compiler" />
<Compiler>
<Add option="-flto" />
<Add option="-g" />
<Add option="-Wuninitialized" />
<Add option="-Wno-invalid-noreturn" />
<Add option="-fno-common" />
<Add option="-integrated-as" />
<Add option="-Oz" />
<Add option="-c" />
<Add option="-fallow-pointer-null" />
<Add option="-fprefer-gnu-section" />
<Add option="-Wno-shift-negative-value" />
<Add option="-DSUPPORT_MS_EXTENSIONS" />
<Add option="-DCONFIG_RELEASE_ENABLE" />
<Add option="-DCONFIG_CPU_BR35" />
<Add option="-DCONFIG_USB_SUPPORT_MRX_TX" />
<Add option="-DCONFIG_PRINT_IN_MASK" />
<Add option="-DCONFIG_NEW_BREDR_ENABLE" />
<Add option="-DCONFIG_NEW_MODEM_ENABLE" />
<Add option="-DCONFIG_UCOS_ENABLE" />
<Add option="-DCONFIG_EQ_SUPPORT_ASYNC" />
<Add option="-DEQ_CORE_V1" />
<Add option="-DCONFIG_AAC_CODEC_FFT_USE_MUTEX" />
<Add option="-DCONFIG_DNS_ENABLE" />
<Add option="-DCONFIG_DMS_MALLOC" />
<Add option="-DCONFIG_MMU_ENABLE" />
<Add option="-DCONFIG_SBC_CODEC_HW" />
<Add option="-DCONFIG_MSBC_CODEC_HW" />
<Add option="-DCONFIG_AEC_M=256" />
<Add option="-DCONFIG_AUDIO_ONCHIP" />
<Add option="-DCONFIG_MEDIA_DEVELOP_ENABLE" />
<Add option="-DCONFIG_MIXER_CYCLIC" />
<Add option="-DCONFIG_SOUND_PLATFORM_ENABLE=1" />
<Add option="-DCONFIG_SUPPORT_EX_TWS_ADJUST" />
<Add option="-D__GCC_PI32V2__" />
<Add option="-DSUPPORT_BLUETOOTH_PROFILE_RELEASE" />
<Add option="-DCONFIG_SOUNDBOX" />
<Add option="-DAPP_USE_SOFT_SPI_ACCESS_VM" />
<Add option="-DEVENT_HANDLER_NUM_CONFIG=2" />
<Add option="-DEVENT_TOUCH_ENABLE_CONFIG=0" />
<Add option="-DEVENT_POOL_SIZE_CONFIG=256" />
<Add option="-DCONFIG_EVENT_KEY_MAP_ENABLE=0" />
<Add option="-DTIMER_POOL_NUM_CONFIG=15" />
<Add option="-DAPP_ASYNC_POOL_NUM_CONFIG=0" />
<Add option="-DVFS_ENABLE=1" />
<Add option="-DUSE_SDFILE_NEW=1" />
<Add option="-DSDFILE_STORAGE=1" />
<Add option="-DVFS_FILE_POOL_NUM_CONFIG=1" />
<Add option="-DFS_VERSION=0x020001" />
<Add option="-DFATFS_VERSION=0x020101" />
<Add option="-DSDFILE_VERSION=0x020000" />
<Add option="-DVM_MAX_SIZE_CONFIG=64*1024" />
<Add option="-DVM_ITEM_MAX_NUM=256" />
<Add option="-DCONFIG_TWS_ENABLE" />
<Add option="-DCONFIG_WATCH_CASE_ENABLE=1" />
<Add option="-DCONFIG_LITE_AEC_ENABLE=0" />
<Add option="-DAUDIO_REC_POOL_NUM=1" />
<Add option="-DAUDIO_DEC_POOL_NUM=3" />
<Add option="-DAUDIO_LINEIN_ENABLE" />
<Add option="-DCONFIG_LMP_CONN_SUSPEND_ENABLE" />
<Add option="-DCONFIG_BTCTRLER_TASK_DEL_ENABLE" />
<Add option="-DCONFIG_LINK_DISTURB_SCAN_ENABLE=0" />
<Add option="-DCONFIG_UPDATA_ENABLE" />
<Add option="-DCONFIG_OTA_UPDATA_ENABLE" />
<Add option="-DCONFIG_ITEM_FORMAT_VM" />
<Add option="-DLV_LVGL_H_INCLUDE_SIMPLE" />
<Add option="-DLV_EX_CONF_INCLUDE_SIMPLE" />
<Add option="-DLV_DEMO_CONF_INCLUDE_SIMPLE" />
<Add option="-D__LD__" />
<Add directory="include_lib" />
<Add directory="include_lib/driver" />
<Add directory="include_lib/driver/cpu/br35" />
<Add directory="include_lib/driver/device" />
<Add directory="include_lib/system" />
<Add directory="include_lib/system/generic" />
<Add directory="include_lib/system/device" />
<Add directory="include_lib/system/fs" />
<Add directory="include_lib/system/ui_new/ui/cpu/br35" />
<Add directory="include_lib/system/ui_new" />
<Add directory="include" />
<Add directory="cpu/br35" />
<Add directory="./" />
<Add directory="include_lib/system/os" />
<Add directory="apps/watch/board/br35" />
<Add directory="include_lib/system/math/cpu/br35" />
</Compiler>
<Linker>
<Add option="-flto" />
<Add option="--plugin-opt=-pi32v2-always-use-itblock=false" />
<Add option="--plugin-opt=-enable-ipra=true" />
<Add option="--plugin-opt=-pi32v2-merge-max-offset=4096" />
<Add option="--plugin-opt=-pi32v2-enable-simd=true" />
<Add option="--plugin-opt=mcpu=r3" />
<Add option="--plugin-opt=-global-merge-on-const" />
<Add option="--plugin-opt=-inline-threshold=5" />
<Add option="--plugin-opt=-inline-max-allocated-size=32" />
<Add option="--plugin-opt=-inline-normal-into-special-section=true" />
<Add option="--plugin-opt=-dont-used-symbol-list=malloc,free,sprintf,printf,puts,putchar" />
<Add option="--plugin-opt=save-temps" />
<Add option="--plugin-opt=-pi32v2-enable-rep-memop" />
<Add option="--plugin-opt=-warn-stack-size=256" />
<Add option="--sort-common" />
<Add option="--plugin-opt=-pi32v2-large-program=true" />
<Add option="--gc-sections" />
<Add option="--start-group" />
<Add option="--end-group" />
<Add option="-Tcpu/br35/sdk.ld" />
<Add option="-M=cpu/br35/tools/sdk.map" />
<Add library="C:/JL/pi32/pi32v2-lib/r3/libm.a" />
<Add library="include_lib/liba/br35/cpu.a" />
</Linker>
<ExtraCommands>
<Add after="cpu\br35\tools\download.bat sdk" />
<Mode after="always" />
</ExtraCommands>
</Target>
</Build>
<Unit filename="apps/watch/log_config/lib_system_config.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="cpu/br35/sdk.ld" />
<Unit filename="cpu/br35/ui_driver/lcd_drive/lcd_drive.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_qspi_st77903_400x400.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_qspi_st77903_400x400_v1.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_qspi_st77916_320x386.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_spi_sh8601a_454x454.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="cpu/br35/ui_entry.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="include/app_config.h" />
<Unit filename="include/ui.h" />
<Unit filename="include/ui/lcd_spi/lcd_drive.h" />
<Unit filename="include_lib/driver/cpu/br35/asm/cpu.h" />
<Unit filename="include_lib/driver/cpu/br35/asm/gpio.h" />
<Unit filename="include_lib/system/fs/fs.h" />
<Unit filename="include_lib/system/ui/includes.h" />
<Unit filename="include_lib/system/ui_new/ui/cpu/br35/dbi.h" />
<Unit filename="include_lib/system/ui_new/ui/cpu/br35/lcd_buffer_manager.h" />
<Unit filename="lib/ui/ui_basic.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="lib/ui/ui_draw_arc.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="lib/ui/ui_draw_image.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="lib/ui/ui_draw_text.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="lib/ui/ui_mask.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="lib/ui/ui_math.c">
<Option compilerVar="CC" />
</Unit>
<Extensions />
</Project>
</CodeBlocks_project_file>
loader/update_ui/OTA_UI字模生成工具.rar
BIN
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loader/update_ui/apps/watch/log_config/lib_system_config.c
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const int config_asser = 1;
const int ENABLE_JL_UI_FRAME = 0;
loader/update_ui/cpu/br35/clock_cfg.h
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#ifndef CLOCK_CFG_H
#define CLOCK_CFG_H
#include "typedef.h"
/*
*/
enum {
BT_IDLE_CLOCK = 1,
MUSIC_IDLE_CLOCK,
FM_IDLE_CLOCK,
LINEIN_IDLE_CLOCK,
PC_IDLE_CLOCK,
REC_IDLE_CLOCK,
RTC_IDLE_CLOCK,
SPDIF_IDLE_CLOCK,
BOX_IDLE_CLOCK,
DEC_SBC_CLK,
DEC_AAC_CLK,
DEC_MSBC_CLK,
DEC_CVSD_CLK,
AEC8K_CLK,
AEC8K_ADV_CLK,
AEC16K_CLK,
AEC16K_ADV_CLK,
AEC8K_SPX_CLK,
AEC16K_SPX_CLK,
DEC_TONE_CLK,
DEC_MP3_CLK,
DEC_WAV_CLK, /// 10
DEC_G729_CLK,
DEC_G726_CLK,
DEC_PCM_CLK,
DEC_MTY_CLK,
DEC_WMA_CLK,
DEC_APE_CLK,
DEC_FLAC_CLK,
DEC_AMR_CLK,
DEC_DTS_CLK,
DEC_M4A_CLK, ///20
DEC_ALAC_CLK,
DEC_FM_CLK,
DEC_LINE_CLK,
DEC_TWS_SBC_CLK,
SPDIF_CLK,
ENC_RECODE_CLK,
ENC_SBC_CLK,
ENC_WAV_CLK,
ENC_G726_CLK,
ENC_MP3_CLK,
ENC_TWS_SBC_CLK,
ENC_MSBC_CLK, //////30
ENC_CVSD_CLK,
SYNC_CLK,
AUTOMUTE_CLK,
FINDF_CLK,
FM_INSIDE_CLK,
BT_CONN_CLK,
EQ_CLK,
EQ_DRC_CLK,
EQ_ONLINE_CLK,
REVERB_CLK,
REVERB_HOWLING_CLK,
REVERB_PITCH_CLK,
DEC_MP3PICK_CLK,
DEC_WMAPICK_CLK,
DEC_M4APICK_CLK,
DEC_MIX_CLK,
DEC_IIS_CLK,
DEC_UI_CLK,
DEC_MIDI_CLK,
WATCH_SPORT_CLK,
DEC_3D_CLK,
DEC_VBASS_CLK,
DEC_LOUDNES_CLK,
DONGLE_ENC_CLK,
LCD_UI_CLK,
SCAN_DISK_CLK,
SPECTRUM_CLK,
LOCALTWS_CLK,
AI_SPEECH_CLK,
SMARTBOX_ACTION_CLK,
ADAPTER_PROCESS_CLK,
ENUM_MAX_CLK = 63,
};
void clock_pause_play(u8 mode);
void clock_idle(u32 type);
void clock_add(u32 type);
void clock_remove(u32 type);
void clock_set_cur(void);
void clock_add_set(u32 type);
void clock_remove_set(u32 type);
#endif
loader/update_ui/cpu/br35/maskrom_stubs.ld
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lp_signature_set = ABSOLUTE(0x1fd6c);
memmem = ABSOLUTE(0x1fd70);
memcpy = ABSOLUTE(0x1fd74);
memmove = ABSOLUTE(0x1fd78);
memcmp = ABSOLUTE(0x1fd7c);
memset = ABSOLUTE(0x1fd80);
strcmp = ABSOLUTE(0x1fd84);
strcpy = ABSOLUTE(0x1fd88);
strlen = ABSOLUTE(0x1fd8c);
strncmp = ABSOLUTE(0x1fd90);
strstr = ABSOLUTE(0x1fd94);
strchr = ABSOLUTE(0x1fd98);
__divdi3 = ABSOLUTE(0x1fd9c);
__udivmoddi4 = ABSOLUTE(0x1fda0);
__adddf3 = ABSOLUTE(0x1fda4);
__fixdfsi = ABSOLUTE(0x1fda8);
flush_dcache = ABSOLUTE(0x1fdac);
flushinv_dcache = ABSOLUTE(0x1fdb0);
IcuWaitIdle = ABSOLUTE(0x1fdb4);
DcuWaitIdle = ABSOLUTE(0x1fdb8);
IcuInitial = ABSOLUTE(0x1fdbc);
DcuInitial = ABSOLUTE(0x1fdc0);
/* sfc_suspend = ABSOLUTE(0x1fdc4); */
/* sfc_resume = ABSOLUTE(0x1fdc8); */
sfc_drop_cache = ABSOLUTE(0x1fdcc);
chip_crc16 = ABSOLUTE(0x1fdd0);
CrcDecode = ABSOLUTE(0x1fdd4);
get_flash_file_key = ABSOLUTE(0x1fdd8);
dec_isd_cfg_ini = ABSOLUTE(0x1fddc);
_jlfs_mount = ABSOLUTE(0x1fde0);
sfc_boot = ABSOLUTE(0x1fde4);
mask_init = ABSOLUTE(0x1fde8);
wdt_clr = ABSOLUTE(0x1fdec);
nvram_set_boot_state = ABSOLUTE(0x1fdf0);
chip_reset = ABSOLUTE(0x1fdf4);
the_debug_isr = ABSOLUTE(0x1fdf8);
print = ABSOLUTE(0x1fdfc);
sprintf = ABSOLUTE(0x1fe00);
printf = ABSOLUTE(0x1fe04);
puts = ABSOLUTE(0x1fe08);
doe = ABSOLUTE(0x1fe0c);
spi_get_port = ABSOLUTE(0x1fe10);
_pll_init = ABSOLUTE(0x1fe14);
flash_poweron = ABSOLUTE(0x1fe18);
spi_unmount = ABSOLUTE(0x1fe1c);
spi_port_io_init = ABSOLUTE(0x1fe20);
usb_slave_mode = ABSOLUTE(0x1fe24);
LZ4_setStreamDecode = ABSOLUTE(0x1fe28);
LZ4_decompress_safe_continue = ABSOLUTE(0x1fe2c);
LZ4_decompress_generic = ABSOLUTE(0x1fe30);
_sdk_mkey_lock = ABSOLUTE(0x1fe34);
g_hash_function = ABSOLUTE(0x1fe38);
f1_hash_function = ABSOLUTE(0x1fe3c);
f2_hash_function = ABSOLUTE(0x1fe40);
f3_hash_function = ABSOLUTE(0x1fe44);
h2_hash_function = ABSOLUTE(0x1fe48);
h3_hash_function = ABSOLUTE(0x1fe4c);
h4_hash_function = ABSOLUTE(0x1fe50);
h5_hash_function = ABSOLUTE(0x1fe54);
g_function = ABSOLUTE(0x1fe58);
f1_function = ABSOLUTE(0x1fe5c);
f2_function = ABSOLUTE(0x1fe60);
f3_function = ABSOLUTE(0x1fe64);
sha256Compute = ABSOLUTE(0x1fe68);
uECC_compute_public_key = ABSOLUTE(0x1fe6c);
uECC_shared_secret = ABSOLUTE(0x1fe70);
bi_initialize = ABSOLUTE(0x1fe74);
bi_read_from_byte = ABSOLUTE(0x1fe78);
bi_poly_mod2 = ABSOLUTE(0x1fe7c);
bi_poly_mul = ABSOLUTE(0x1fe80);
trim = ABSOLUTE(0x1fe84);
bi_wirte_to_byte = ABSOLUTE(0x1fe88);
bi_free = ABSOLUTE(0x1fe8c);
bi_terminate = ABSOLUTE(0x1fe90);
get_cvsd_codec_ops = ABSOLUTE(0x1fe94);
wtgv2_silk_NLSF_CB_NB_MB = ABSOLUTE(0x18590);
wtgv2_LSFCosTab_FIX_Q12 = ABSOLUTE(0x1848c);
icdf_global_table = ABSOLUTE(0x18a88);
get_wtgv2dec_ops = ABSOLUTE(0x1fe98);
wtgv2_silk_Decode = ABSOLUTE(0x1fe9c);
wtgv2_silk_decode_frame = ABSOLUTE(0x1fea0);
wtgv2_silk_decoder_set_fs = ABSOLUTE(0x1fea4);
wtgv2_silk_decode_indices = ABSOLUTE(0x1fea8);
wtgv2_silk_decode_pulses = ABSOLUTE(0x1feac);
wtgv2_silk_decode_parameters = ABSOLUTE(0x1feb0);
wtgv2_silk_decode_core = ABSOLUTE(0x1feb4);
logAprx_CORDIC_float = ABSOLUTE(0x1feb8);
expAprx_CORDIC_float = ABSOLUTE(0x1febc);
magnAprx_float = ABSOLUTE(0x1fec0);
MatrixCopy_float_c_c = ABSOLUTE(0x1fec4);
MatrixCopy_float_f_f = ABSOLUTE(0x1fec8);
MatrixEwMulAndSumOneDim_float_c_c_c_s0 = ABSOLUTE(0x1fecc);
MatrixEwMulAndSumOneDim_float_c_c_c_s1 = ABSOLUTE(0x1fed0);
MatrixEwMulAndSumOneDim_float_f_f_f_s0 = ABSOLUTE(0x1fed4);
MatrixEwMulAndSumOneDim_float_f_f_f_s1 = ABSOLUTE(0x1fed8);
MatrixEwConjMulAndSumOneDim_float_c_c_c_s0 = ABSOLUTE(0x1fedc);
MatrixEwConjMulAndSumOneDim_float_c_c_c_s1 = ABSOLUTE(0x1fee0);
VecMeanSq_s16_f32 = ABSOLUTE(0x1fee4);
VecOverShift_s16_f32 = ABSOLUTE(0x1fee8);
VecMinus_s16_f32_f32 = ABSOLUTE(0x1feec);
VectorCopy_f32_s16 = ABSOLUTE(0x1fef0);
VecEleMul_s16_s16_f32 = ABSOLUTE(0x1fef4);
VecEleMul_f32_s16_f32 = ABSOLUTE(0x1fef8);
VecMeanSq_float_f_f = ABSOLUTE(0x1fefc);
VectorSet_float_f_f = ABSOLUTE(0x1ff00);
VecMagRecAve_float_c_f_f = ABSOLUTE(0x1ff04);
VecMulScalar_float_c_f_c = ABSOLUTE(0x1ff08);
VecConjEleMul_float_c_c_c = ABSOLUTE(0x1ff0c);
VecPlus_float_f_f_f = ABSOLUTE(0x1ff10);
VecDivide_float_c_f_c_f = ABSOLUTE(0x1ff14);
VecPlus_float_c_c_c = ABSOLUTE(0x1ff18);
VecConjMulRecAve_float_c_c_c_f = ABSOLUTE(0x1ff1c);
VecGetMag_float_c_f = ABSOLUTE(0x1ff20);
VecMax_float_f_f = ABSOLUTE(0x1ff24);
VecRecAve_float_f_f_f = ABSOLUTE(0x1ff28);
VecEleMul_float_f_f_f = ABSOLUTE(0x1ff2c);
VecMagAndDiv_float_c_f_f_f = ABSOLUTE(0x1ff30);
VecMin_float_f_f = ABSOLUTE(0x1ff34);
VecMinus_float_f_f_f = ABSOLUTE(0x1ff38);
VecMean_float_f_f = ABSOLUTE(0x1ff3c);
VecEleMul_float_c_f_c = ABSOLUTE(0x1ff40);
VecMeanSqu_float_c_f = ABSOLUTE(0x1ff44);
VecCopy_float_f_f = ABSOLUTE(0x1ff48);
VecMin_float_f_f_f = ABSOLUTE(0x1ff4c);
VecDivide_float_f_f_f_f = ABSOLUTE(0x1ff50);
VecCompBT_float_f_f_f = ABSOLUTE(0x1ff54);
VecCondCopy_float_f_f_f = ABSOLUTE(0x1ff58);
VecMulScalar_float_f_f_f = ABSOLUTE(0x1ff5c);
VecPlusScalar_float_f_f_f = ABSOLUTE(0x1ff60);
VecMinScalar_float_f_f_f = ABSOLUTE(0x1ff64);
VecOpposite_float_f_f = ABSOLUTE(0x1ff68);
VecEleMla_float_f_f_f = ABSOLUTE(0x1ff6c);
VecEleMla_float_c_c_c = ABSOLUTE(0x1ff70);
VecMinus_float_c_c_c = ABSOLUTE(0x1ff74);
VecDotProduct_float_f_f_f = ABSOLUTE(0x1ff78);
VecDotProduct_float_c_c_c = ABSOLUTE(0x1ff7c);
VecDotProduct_float_c_f_c = ABSOLUTE(0x1ff80);
VecCopy_float_c_c = ABSOLUTE(0x1ff84);
VecCopy_float_f_c = ABSOLUTE(0x1ff88);
VecConjDotProduct_float_c_c_c = ABSOLUTE(0x1ff8c);
VecNormalize_float_c_c_f = ABSOLUTE(0x1ff90);
VecRecAve_float_c_c_f = ABSOLUTE(0x1ff94);
VecOverlapShift_float_f_f_i = ABSOLUTE(0x1ff98);
VecMax_float_f_f_f = ABSOLUTE(0x1ff9c);
VecConjEwMulAndDiv_float_c_c_f_f_c = ABSOLUTE(0x1ffa0);
VecPlusMulScalar_float_c_c_f_c = ABSOLUTE(0x1ffa4);
VecCondCopy_float_c_i_c = ABSOLUTE(0x1ffa8);
VecEleMulAndDiv_float_f_f_f_f_f = ABSOLUTE(0x1ffac);
VectorSet_float_f_c = ABSOLUTE(0x1ffb0);
VecDivScalar_float_f_f_f = ABSOLUTE(0x1ffb4);
VecDivScalar_float_c_f_c = ABSOLUTE(0x1ffb8);
VecPlusScalar_float_c_f_c = ABSOLUTE(0x1ffbc);
VecMinScalar_float_c_f_c = ABSOLUTE(0x1ffc0);
mdct_tab_256 = ABSOLUTE(0x19000);
mdct_tab_2048 = ABSOLUTE(0x19200);
sine_long_1024 = ABSOLUTE(0x1a200);
sine_short_128 = ABSOLUTE(0x1b200);
kbd_long_1024 = ABSOLUTE(0x1b400);
kbd_short_128 = ABSOLUTE(0x1c400);
Huffmancb_SCL = ABSOLUTE(0x1c634);
num_swb_960_window = ABSOLUTE(0x1c844);
num_swb_1024_window = ABSOLUTE(0x1c850);
num_swb_128_window = ABSOLUTE(0x1c85c);
swb_offset_1024_96 = ABSOLUTE(0x1c868);
swb_offset_128_96 = ABSOLUTE(0x1c8bc);
swb_offset_1024_64 = ABSOLUTE(0x1c8d6);
swb_offset_128_64 = ABSOLUTE(0x1c936);
swb_offset_1024_48 = ABSOLUTE(0x1c950);
swb_offset_128_48 = ABSOLUTE(0x1c9b4);
swb_offset_1024_32 = ABSOLUTE(0x1c9d2);
swb_offset_1024_24 = ABSOLUTE(0x1ca3a);
swb_offset_128_24 = ABSOLUTE(0x1ca9a);
swb_offset_1024_16 = ABSOLUTE(0x1caba);
swb_offset_128_16 = ABSOLUTE(0x1cb12);
swb_offset_1024_8 = ABSOLUTE(0x1cb32);
swb_offset_128_8 = ABSOLUTE(0x1cb84);
swb_offset_1024_window = ABSOLUTE(0x1cba4);
swb_offset_128_window = ABSOLUTE(0x1cbd4);
iq_table = ABSOLUTE(0x1cc04);
tns_coef_0_3 = ABSOLUTE(0x1d008);
tns_coef_0_4 = ABSOLUTE(0x1d048);
tns_coef_1_3 = ABSOLUTE(0x1d088);
tns_coef_1_4 = ABSOLUTE(0x1d0c8);
pow05_table = ABSOLUTE(0x1d108);
sample_rates = ABSOLUTE(0x1d124);
pred_sfb_max = ABSOLUTE(0x1d154);
tns_sbf_max = ABSOLUTE(0x1d160);
Huffmancb_1 = ABSOLUTE(0x1d1a0);
Huffmancb_2 = ABSOLUTE(0x1d338);
Huffmancb_3 = ABSOLUTE(0x1d470);
Huffmancb_4 = ABSOLUTE(0x1d5a8);
Huffmancb_5 = ABSOLUTE(0x1d6d8);
Huffmancb_6 = ABSOLUTE(0x1d820);
Huffmancb_7 = ABSOLUTE(0x1d960);
Huffmancb_8 = ABSOLUTE(0x1da58);
Huffmancb_9 = ABSOLUTE(0x1db50);
Huffmancb_10 = ABSOLUTE(0x1ddf0);
Huffmancb_11 = ABSOLUTE(0x1e080);
AACcodeBookDTable = ABSOLUTE(0x1e540);
AAC_SFHUFF_TAB = ABSOLUTE(0x1c83c);
get_aac_ops = ABSOLUTE(0x1ffc4);
silk_NLSF_CB_WB = ABSOLUTE(0x1e5b8);
silk_LTP_vq_ptrs_Q7 = ABSOLUTE(0x1ea5c);
get_opus_enc_ops = ABSOLUTE(0x1ffc8);
opus_encode = ABSOLUTE(0x1ffcc);
silk_Encode = ABSOLUTE(0x1ffd0);
silk_encode_do_VAD_FIX = ABSOLUTE(0x1ffd4);
silk_encode_frame_FIX = ABSOLUTE(0x1ffd8);
silk_find_pitch_lags_FIX = ABSOLUTE(0x1ffdc);
silk_noise_shape_analysis_FIX = ABSOLUTE(0x1ffe0);
silk_find_pred_coefs_FIX = ABSOLUTE(0x1ffe4);
silk_process_gains_FIX = ABSOLUTE(0x1ffe8);
silk_prefilter_FIX = ABSOLUTE(0x1ffec);
silk_NSQ_del_dec_c = ABSOLUTE(0x1fff0);
silk_encode_indices = ABSOLUTE(0x1fff4);
silk_encode_pulses = ABSOLUTE(0x1fff8);
silk_ana_filt_bank_1 = ABSOLUTE(0x1fffc);
STFT_Win_FixHalf_M512_D160 = ABSOLUTE(0x3804);
STFT_Win_FixHalf_M256_D160 = ABSOLUTE(0x3c04);
STFT_Win_FixHalf_M256_D80 = ABSOLUTE(0x3e04);
STFT_Win_FixHalf_M128_D80 = ABSOLUTE(0x4004);
WOLAAnalysisFilter_Float_M64_m4_r1 = ABSOLUTE(0x4);
WOLASynthesisFilter_Float_M64_m4_r1 = ABSOLUTE(0x404);
WOLAAnalysisFilter_Float_M128_m4_r1 = ABSOLUTE(0x804);
WOLASynthesisFilter_Float_M128_m4_r1 = ABSOLUTE(0x1004);
WOLAAnalysisFilter_Float_M256_m4_r1 = ABSOLUTE(0x1804);
WOLASynthesisFilter_Float_M256_m4_r1 = ABSOLUTE(0x2804);
quantize_intervals_LF = ABSOLUTE(0x9914);
invert_quantize_dither_factors_LF = ABSOLUTE(0x9a18);
quantize_dither_factors_LF = ABSOLUTE(0x9b1c);
quantize_factor_select_offset_LF = ABSOLUTE(0x9c20);
hd_quantize_intervals_LF = ABSOLUTE(0x9ca4);
boot_arg_list = ABSOLUTE(0x19fc28);
_IRQ_MEM_ADDR = ABSOLUTE(0x19fe00);
_MASK_MEM_BEGIN = ABSOLUTE(0x19fc00);
_MASK_MEM_SIZE = ABSOLUTE(0x1a4);
loader/update_ui/cpu/br35/sdk.ld
+378
View File
@@ -0,0 +1,378 @@
__local_irq_enable = ABSOLUTE(0xffd5c);
__local_irq_disable = ABSOLUTE(0xffd60);
request_irq = ABSOLUTE(0xffd64);
lp_signature_set = ABSOLUTE(0xffd68);
memcpy = ABSOLUTE(0xffd6c);
memmove = ABSOLUTE(0xffd70);
memcmp = ABSOLUTE(0xffd74);
memset = ABSOLUTE(0xffd78);
memchr = ABSOLUTE(0xffd7c);
strcmp = ABSOLUTE(0xffd80);
strcpy = ABSOLUTE(0xffd84);
strncpy = ABSOLUTE(0xffd88);
strlen = ABSOLUTE(0xffd8c);
strncmp = ABSOLUTE(0xffd90);
strstr = ABSOLUTE(0xffd94);
strchr = ABSOLUTE(0xffd98);
strrchr = ABSOLUTE(0xffd9c);
strcat = ABSOLUTE(0xffda0);
__divdi3 = ABSOLUTE(0xffda4);
__umoddi3 = ABSOLUTE(0xffda8);
__muldi3 = ABSOLUTE(0xffdac);
__udivdi3 = ABSOLUTE(0xffdb0);
__udivmoddi4 = ABSOLUTE(0xffdb4);
ic_pll_init = ABSOLUTE(0xffdb8);
sfc_suspend = ABSOLUTE(0xffdbc);
sfc_resume = ABSOLUTE(0xffdc0);
sfc_drop_cache = ABSOLUTE(0xffdc4);
sfc_boot = ABSOLUTE(0xffdc8);
sfc_entry_continue_mode = ABSOLUTE(0xffdcc);
ota_jump_mode = ABSOLUTE(0xffdd0);
DcuInitial = ABSOLUTE(0xffdd4);
DcuFlushinvAll = ABSOLUTE(0xffdd8);
DcuWaitIdle = ABSOLUTE(0xffddc);
IcuInitial = ABSOLUTE(0xffde0);
IcuFlushinvAll = ABSOLUTE(0xffde4);
IcuWaitIdle = ABSOLUTE(0xffde8);
DcuEnable = ABSOLUTE(0xffdec);
DcuFlushRegion = ABSOLUTE(0xffdf0);
chip_crc16 = ABSOLUTE(0xffdf4);
CrcDecode = ABSOLUTE(0xffdf8);
mask_init = ABSOLUTE(0xffdfc);
wdt_clear = ABSOLUTE(0xffe00);
nvram_set_boot_state = ABSOLUTE(0xffe04);
chip_reset = ABSOLUTE(0xffe08);
flash_poweron = ABSOLUTE(0xffe0c);
flash_poweron_base = ABSOLUTE(0xffe10);
flash_poweroff = ABSOLUTE(0xffe14);
flash_poweroff_base = ABSOLUTE(0xffe18);
spi_io_mount = ABSOLUTE(0xffe1c);
spi_io_unmount = ABSOLUTE(0xffe20);
get_sfc_read_mode = ABSOLUTE(0xffe24);
spi_port_io_init = ABSOLUTE(0xffe28);
spi_port_io_uninit = ABSOLUTE(0xffe2c);
usb_slave_mode = ABSOLUTE(0xffe30);
uart_set_dma_dir = ABSOLUTE(0xffe34);
doe = ABSOLUTE(0xffe38);
LZ4_setStreamDecode = ABSOLUTE(0xffe3c);
LZ4_decompress_safe_continue = ABSOLUTE(0xffe40);
LZ4_decompress_generic = ABSOLUTE(0xffe44);
LZ4_decompress_safe_usingDict = ABSOLUTE(0xffe48);
dec_isd_cfg_ini = ABSOLUTE(0xffe4c);
rom_nand_flash_get_features = ABSOLUTE(0xffe50);
rom_nand_flash_set_features = ABSOLUTE(0xffe54);
pmalloc_init = ABSOLUTE(0xfff84);
pmalloc = ABSOLUTE(0xfff88);
pfree = ABSOLUTE(0xfff8c);
pmalloc_get_unused_pages = ABSOLUTE(0xfff90);
get_physic_address = ABSOLUTE(0xfff94);
pmalloc_get_hdl = ABSOLUTE(0xfff98);
vmm_init_ = ABSOLUTE(0xfff9c);
vmalloc_ = ABSOLUTE(0xfffa0);
vfree_ = ABSOLUTE(0xfffa4);
vmem_get_phy_adr = ABSOLUTE(0xfffa8);
vmem_start = ABSOLUTE(0xfffac);
vmem_end = ABSOLUTE(0xfffb0);
vmalloc_get_hdl = ABSOLUTE(0xfffb4);
vmalloc_v2 = ABSOLUTE(0xfffb8);
vfree_v2 = ABSOLUTE(0xfffbc);
vcopy_ = ABSOLUTE(0xfffc0);
lock_vir_mem = ABSOLUTE(0xfffc4);
unlock_vir_mem = ABSOLUTE(0xfffc8);
hw_mmu_disable = ABSOLUTE(0xfffcc);
get_sbc_frame_info = ABSOLUTE(0xfffd0);
get_sbc_dec_ops = ABSOLUTE(0xfffd4);
sbc_dec_loop_u = ABSOLUTE(0xfffd8);
sbc_unpack_frame_u = ABSOLUTE(0xfffdc);
sbc_synthesize_audio_u = ABSOLUTE(0xfffe0);
sbc_oput_deal_normal = ABSOLUTE(0xfffe4);
sbc_oput_deal_To_ch2 = ABSOLUTE(0xfffe8);
sbc_bit_offset4 = ABSOLUTE(0xf88c0);
sbc_bit_offset8 = ABSOLUTE(0xf8900);
sbc_proto4_m0 = ABSOLUTE(0xf8980);
sbc_proto4_m1 = ABSOLUTE(0xf89d0);
sbc_proto8_m0 = ABSOLUTE(0xf8a20);
sbc_proto8_m1 = ABSOLUTE(0xf8ac0);
syn_matrix4 = ABSOLUTE(0xf8b60);
syn_matrix8 = ABSOLUTE(0xf8be0);
crc8_table = ABSOLUTE(0xf87c0);
sbc_div_new_table = ABSOLUTE(0xf8de0);
need_fix_iir_filter_buf = ABSOLUTE(0xfffec);
fix_iir_filter_init = ABSOLUTE(0xffff0);
fix_iir_filter_update = ABSOLUTE(0xffff4);
fix_iir_filter_run = ABSOLUTE(0xffff8);
fix_iir_filter_clear_mem = ABSOLUTE(0xffffc);
_SFC_MEMORY_START_ADDR = ABSOLUTE(0xc000000);
_IRQ_MEM_ADDR = ABSOLUTE(0x100000);
_RAM_LIMIT_L = ABSOLUTE(0x100000);
_RAM_LIMIT_H = ABSOLUTE(0x137000);
_MASK_USED_MEM_END = ABSOLUTE(0x101310);
_MASK_EXPORT_MEM_BEGIN = ABSOLUTE(0x100200);
_MASK_EXPORT_MEM_SIZE = ABSOLUTE(0x34c);
_UBOOT_LOADER_RAM_START = ABSOLUTE(0x102600);
_UBOOT_LOADER_RAM_END = ABSOLUTE(0x137000);
_UBOOT_LOADER_RAM_SIZE = ABSOLUTE(0x34a00);
g_boot_soft_flag = ABSOLUTE(0x100204);
irq_lock_cnt = ABSOLUTE(0x1002b8);
efuse_page0 = ABSOLUTE(0x1002ac);
efuse_page1 = ABSOLUTE(0x1002b0);
efuse_page2 = ABSOLUTE(0x1002b4);
nvram_list = ABSOLUTE(0x100214);
exception_irq_handler = ABSOLUTE(0xf8004);
EXTERN(
_start
source_node_adapter
mixer_node_adapter
dac_node_adapter
classd_node_adapter
clk_sync_node_adapter
decoder_node_adapter
resample_node_adapter
bt_audio_sync_node_adapter
adc_file_plug
tone_file_plug
ring_file_plug
key_tone_file_plug
sbc_decoder_plug
msbc_decoder_plug
sine_dec_plug
cvsd_decoder_plug
pcm_dec_plug
zero_file_plug
msbc_encoder_soft_plug
cvsd_encoder_plug
music_file_plug
wdrc_node_adapter
g729_dec_plug
fat_vfs_ops
fat_sdfile_fat_ops
fat_sdfile_fat_ops
sdfile_resfile_ops
sdfile_vfs_ops
ex_sdfile_vfs_ops
wav_package
sof_eq_node_adapter
);
UPDATE_SIZE = 0x80;
UPDATE_BEG = 0x10c800;
EX_CODE_BEGIN = 0x10054c;
EX_CODE_SIZE = 0xa000;
EX_CODE_END = EX_CODE_BEGIN + EX_CODE_SIZE;
EX_RAM_BEGIN = EX_CODE_BEGIN + EX_CODE_SIZE;
EX_RAM_SIZE = UPDATE_BEG - EX_RAM_BEGIN;
RAM_LIMIT_L = _UBOOT_LOADER_RAM_START;
RAM_LIMIT_H = _UBOOT_LOADER_RAM_START + 0x8000;
PHY_RAM_SIZE = 0x8000;
ISR_BASE = _IRQ_MEM_ADDR;
ROM_RAM_SIZE = _MASK_EXPORT_MEM_SIZE;
ROM_RAM_BEG = _MASK_EXPORT_MEM_BEGIN;
RAM0_BEG = RAM_LIMIT_L;
RAM0_END = RAM_LIMIT_H;
RAM0_SIZE = RAM0_END - RAM0_BEG;
RAM1_BEG = RAM_LIMIT_L;
RAM1_END = RAM0_BEG;
RAM1_SIZE = RAM1_END - RAM1_BEG;
PSRAM_BEGIN = 0x8000000;
PSRAM_SIZE = 0x0;
PSRAM_END = PSRAM_BEGIN + PSRAM_SIZE;
FREE_DACHE_WAY = 2;
FREE_IACHE_WAY = 0;
DCACHE_RAM_SIZE = FREE_DACHE_WAY*8K;
ICACHE_RAM_SIZE = FREE_IACHE_WAY*8K;
MEMORY
{
code0(rx) : ORIGIN = EX_CODE_BEGIN, LENGTH = EX_CODE_SIZE
ram0(rwx) : ORIGIN = EX_RAM_BEGIN, LENGTH = EX_RAM_SIZE
psram(rwx) : ORIGIN = PSRAM_BEGIN, LENGTH = PSRAM_SIZE
dcache_ram(rw) : ORIGIN = 0x370000+((4-FREE_DACHE_WAY)*8K), LENGTH = DCACHE_RAM_SIZE
icache_ram(rw) : ORIGIN = 0x3C0000+((4-FREE_IACHE_WAY)*8K), LENGTH = ICACHE_RAM_SIZE
}
SECTIONS
{
. = ORIGIN(code0);
.text ALIGN(4):
{
. = ALIGN(4);
API_TAB_BEGIN = .;
KEEP(*(.api_tab))
API_TAB_END = .;
. = ALIGN(4);
lcd_interface_begin = .;
KEEP(*(.lcd_if_info))
lcd_interface_end = .;
. = ALIGN(4);
lcd_device_begin = .;
KEEP(*(.lcd_device_info))
lcd_device_end = .;
. = ALIGN(4);
clock_critical_handler_begin = .;
KEEP(*(.clock_critical_txt))
clock_critical_handler_end = .;
. = ALIGN(4);
KEEP(*(.text*))
. = ALIGN(4);
KEEP(*(.rodata*))
. = ALIGN(4);
KEEP(*(.data))
. = ALIGN(4);
_bss_begin = . ;
KEEP(*(.bss))
_bss_end = . ;
. = ALIGN(4);
_HEAP_BEGIN = . ;
_HEAP_END = EX_CODE_END;
} > code0
. = ORIGIN(ram0);
.mmu_tlb ALIGN(0x1000):
{
*(.mmu_tlb_segment);
} > ram0
.data ALIGN(32):
{
. = ALIGN(4);
*(.data_magic)
. = ALIGN(4);
} > ram0
.data_code ALIGN(32):
{
data_code_pc_limit_begin = .;
*(.flushinv_icache)
*(.cache)
*(.os_critical_code)
*(.fat_data_code)
*(.fat_data_code_ex)
*(.ui_ram)
*(.math_fast_funtion_code)
. = ALIGN(4);
_SPI_CODE_START = . ;
*(.spi_code)
. = ALIGN(4);
_SPI_CODE_END = . ;
. = ALIGN(4);
} > ram0
.moveable_slot ALIGN(4):
{
*(movable.slot.*)
} >ram0
__report_overlay_begin = .;
data_code_pc_limit_end = .;
__report_overlay_end = .;
}
text_begin = ADDR(.text);
text_size = SIZEOF(.text);
text_end = text_begin + text_size;
/*PROVIDE(bss_begin = _bss_begin);*/
/*PROVIDE(bss_end = _bss_end);*/
_bss_size = _bss_end - _bss_begin;
/*PROVIDE(bss_size = _bss_end - _bss_begin);*/
data_addr = ADDR(.data);
data_begin = text_begin + text_size;
data_size = SIZEOF(.data);
moveable_slot_addr = ADDR(.moveable_slot);
moveable_slot_begin = data_begin + data_size;
moveable_slot_size = SIZEOF(.moveable_slot);
data_code_addr = ADDR(.data_code);
data_code_begin = moveable_slot_begin + moveable_slot_size;
data_code_size = SIZEOF(.data_code);
PROVIDE(HEAP_BEGIN = _HEAP_BEGIN);
PROVIDE(HEAP_END = _HEAP_END);
_MALLOC_SIZE = _HEAP_END - _HEAP_BEGIN;
PROVIDE(MALLOC_SIZE = _HEAP_END - _HEAP_BEGIN);
ASSERT(MALLOC_SIZE >= 0x8000, "heap space too small !")
loader/update_ui/cpu/br35/sdk_used_list.c
+184
View File
@@ -0,0 +1,184 @@
#include "app_config.h"
#if TCFG_USER_TWS_ENABLE
tws_local_media_sync
#if TCFG_EQ_ONLINE_ENABLE
tws_ci_data
#endif /* #if TCFG_EQ_ONLINE_ENABLE */
tws_acl_data_sync
tws_event_sync
tws_conn_sync
tws_lmp_slot_sync
tws_low_latency
tws_media_sync
tws_power_balance
tws_sync_call
tws_tx_sync
tws_link_sync
tws_afh_sync
#endif /* #if TCFG_USER_TWS_ENABLE */
#if CONFIG_FATFS_ENABLE
fat_vfs_ops
#endif
#if VFS_ENABLE
sdfile_vfs_ops
#if TCFG_NORFLASH_SFC_DEV_ENABLE || TCFG_NORFLASH_DEV_ENABLE || TCFG_VIRFAT_INSERT_FLASH_ENABLE
nor_fs_vfs_ops
nor_sdfile_vfs_ops
nor_rec_fs_vfs_ops
fat_sdfile_fat_ops
#endif
#endif /*VFS_ENABLE*/
#if FLASH_INSIDE_REC_ENABLE
inside_nor_fs_vfs_ops
#endif
#ifndef TCFG_DEC_SBC_CLOSE
sbc_decoder
#endif
#ifndef TCFG_DEC_MSBC_CLOSE
msbc_decoder
#endif
#ifndef TCFG_DEC_SBC_HWACCEL_CLOSE
sbc_hwaccel
#endif
#ifndef TCFG_DEC_CVSD_CLOSE
cvsd_decoder
#endif
#ifndef TCFG_DEC_PCM_CLOSE
pcm_decoder
#endif
#if TCFG_DEC_MTY_ENABLE
mty_decoder
#endif
#if TCFG_DEC_MP3_ENABLE
mp3_decoder
#if TCFG_DEC2TWS_ENABLE
mp3pick_decoder
#endif
#endif
#if TCFG_DEC_WMA_ENABLE
wma_decoder
#if TCFG_DEC2TWS_ENABLE
wmapick_decoder
#endif
#endif
#if TCFG_DEC_FLAC_ENABLE
flac_decoder
#endif
#if TCFG_DEC_APE_ENABLE
ape_decoder
#endif
#if TCFG_DEC_M4A_ENABLE
m4a_decoder
#if TCFG_DEC2TWS_ENABLE
m4apick_decoder
#endif
#endif
#if TCFG_DEC_ALAC_ENABLE
alac_decoder
#endif
#if TCFG_DEC_AMR_ENABLE
amr_decoder
#endif
#if TCFG_DEC_DTS_ENABLE
dts_decoder
#endif
#if TCFG_DEC_G729_ENABLE || TCFG_BT_SUPPORT_G729
g729_decoder
#endif
#if TCFG_DEC_WTGV2_ENABLE
wtgv2_decoder
#endif
#if TCFG_DEC_AAC_ENABLE || TCFG_BT_SUPPORT_AAC
aac_decoder
#endif
#if TCFG_DEC_G726_ENABLE
g726_decoder
#endif
#if TCFG_DEC_MIDI_ENABLE
midi_decoder
#endif
#if TCFG_DEC_WAV_ENABLE
wav_decoder
#endif
#if AUDIO_MIDI_CTRL_CONFIG
midi_ctrl_decoder
#endif
#if TCFG_DEC_LC3_ENABLE
lc3_decoder
#endif
#if TCFG_ENC_CVSD_ENABLE
cvsd_encoder
#endif
#if TCFG_ENC_MSBC_ENABLE
msbc_encoder
#endif
#if TCFG_ENC_MP3_ENABLE
mp3_encoder
#endif
#if TCFG_ENC_G726_ENABLE
g726_encoder
#endif
#if TCFG_ENC_ADPCM_ENABLE
adpcm_encoder
#endif
#if TCFG_ENC_PCM_ENABLE
pcm_encoder
#endif
#if TCFG_ENC_OPUS_ENABLE
opus_encoder
#endif
#if TCFG_ENC_SPEEX_ENABLE
speex_encoder
#endif
#if TCFG_ENC_SBC_ENABLE
sbc_encoder
#endif
#ifdef AUDIO_OUT_WAY_TYPE
#if (AUDIO_OUT_WAY_TYPE & AUDIO_WAY_TYPE_DAC)
audio_dac_driver
#endif /*(AUDIO_OUT_WAY_TYPE & AUDIO_WAY_TYPE_DAC)*/
#endif /*AUDIO_OUT_WAY_TYPE*/
loader/update_ui/cpu/br35/tools/download.bat
+60
View File
@@ -0,0 +1,60 @@
@echo off
Setlocal enabledelayedexpansion
@echo ********************************************************************************
@echo SDK BR28
@echo ********************************************************************************
@echo %date%
cd /d %~dp0
set OBJDUMP=C:\JL\pi32\bin\llvm-objdump.exe
set OBJCOPY=C:\JL\pi32\bin\llvm-objcopy.exe
set ELFFILE=sdk.elf
%OBJDUMP% -D -address-mask=0x1ffffff -print-dbg %ELFFILE% > %ELFFILE%.lst
%OBJCOPY% -O binary -j .text %ELFFILE% text.bin
%OBJCOPY% -O binary -j .data %ELFFILE% data.bin
%OBJCOPY% -O binary -j .data_code %ELFFILE% data_code.bin
%OBJCOPY% -O binary -j .overlay_aec %ELFFILE% aec.bin
%OBJCOPY% -O binary -j .overlay_aac %ELFFILE% aac.bin
%OBJCOPY% -O binary -j .overlay_aptx %ELFFILE% aptx.bin
%OBJCOPY% -O binary -j .common %ELFFILE% common.bin
%OBJDUMP% -section-headers -address-mask=0x1ffffff %ELFFILE%
REM %OBJDUMP% -t %ELFFILE% > symbol_tbl.txt
copy /b text.bin + data.bin + data_code.bin + aec.bin + aac.bin + aptx.bin + common.bin app.bin
copy text.bin user_api.bin
del common.bin
del aptx.bin
del aac.bin
del aec.bin
del data_code.bin
del data.bin
del text.bin
REM call download/watch/download.bat
set target="H:\jianlong\support\2022-08-30 otaÉı¼¶uiÖ§³Öst77903\tools"
if exist %target% (
copy user_api.bin %target%
echo ¿½±´user_api.binµ½%target%
)
loader/update_ui/cpu/br35/tools/user_api.bin
BIN
View File
Binary file not shown.
loader/update_ui/cpu/br35/ui_driver/lcd_drive/lcd_drive.c
+731
View File
@@ -0,0 +1,731 @@
#include "app_config.h"
#include "ui/lcd_spi/lcd_drive.h"
#include "includes.h"
#include "ui/ui_api.h"
#include "clock_cfg.h"
#include "dbi.h"
#include "gpio.h"
#define lcd_debug LCD_PRINTF
static u8 backlight_status = 0;
static u8 lcd_sleep_in = 0;
static struct lcd_drive *__lcd = NULL;
static struct dbi_param *__this = NULL;
void lcd_drv_cmd_list(u8 *cmd_list, int cmd_cnt);
static void lcd_drv_power_on(void *p);
static void lcd_drv_clear_screen(u32 color, int xstart, int xend, int ystart, int yend);
struct lcd_drive *lcd_drv_get_hdl(u8 mode, const char *logo);
struct lcd_drive *lcd_drv_get_hdl_by_logo(const char *logo);
struct lcd_drive *lcd_drv_get_hdl_by_id();
struct lcd_platform_data lcd_cfg_dat;
#define lcd_dat (&lcd_cfg_dat)
// EN 控制
void lcd_en_ctrl(u8 val)
{
if (lcd_dat == NULL) {
return ;
}
enum gpio_mode mode = val ? PORT_OUTPUT_HIGH : PORT_OUTPUT_LOW;
enum gpio_drive_strength drive = PORT_DRIVE_STRENGT_64p0mA;
if (lcd_dat->pin_en != NO_CONFIG_PORT) {
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_en), mode);
gpio_set_drive_strength(IO_PORT_SPILT(lcd_dat->pin_en), drive);
}
}
// BL 控制
void lcd_bl_ctrl(u8 val)
{
if (lcd_dat == NULL) {
return ;
}
if (lcd_dat->pin_bl == NO_CONFIG_PORT) {
return;
}
if (lcd_dat->pin_bl == IO_LCD_PG) {
u32 value = val ? 0 : 1;
power_gate_open_drain_output(lcd_dat->pin_bl, value);
return;
}
enum gpio_mode mode = val ? PORT_OUTPUT_HIGH : PORT_OUTPUT_LOW;
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_bl), mode);
}
// TE 控制
static int spi_te_stat()
{
if (lcd_dat == NULL) {
return -1;
}
if (lcd_dat->pin_te == NO_CONFIG_PORT) {
return -1;
}
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_te), PORT_INPUT_PULLUP_100K);
return gpio_read(lcd_dat->pin_te);
}
/*
*********************************************************************************************************
* LCD DEVICE RESET
*
* Description: LCD 设备复位
*
* Arguments : none
*
* Returns : none
*
* Notes : 1、判断是否在屏驱有重新定义LCD复位函数，
* 是使用屏驱上定义的LCD复位函数，
* 否使用GPIO控制板级配置的LCD复位IO
*********************************************************************************************************
*/
static void lcd_reset(struct lcd_drive *lcd)
{
if (lcd->reset) {
lcd->reset();
} else {
if(!lcd_dat){
return;
}
if (lcd_dat->pin_reset == NO_CONFIG_PORT) {
return ;
}
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_reset), PORT_OUTPUT_HIGH);
delay_2ms(5);
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_reset), PORT_OUTPUT_LOW);
delay_2ms(5);
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_reset), PORT_OUTPUT_HIGH);
delay_2ms(5);
}
}
/*
*********************************************************************************************************
* LCD BACKLIGHT CONTROL
*
* Description: LCD 背光控制
*
* Arguments : on LCD 背光开关标志，0为关，其它值为开
*
* Returns : none
*
* Notes : 1、判断是否在屏驱有重新定义背光控制函数，
* 是使用屏驱上定义的背光控制函数，
* 否使用GPIO控制板级配置的背光IO
*
* 2、配置背光状态标志，打开为true，关闭为false
*********************************************************************************************************
*/
static void lcd_mcpwm_init()
{
}
int lcd_drv_backlight_ctrl_base(u8 percent)
{
if (__lcd->backlight_ctrl) {
__lcd->backlight_ctrl(percent);
} else if (lcd_dat && (lcd_dat->pin_bl != NO_CONFIG_PORT)) {
if (percent > 0) {
lcd_bl_ctrl(1);
} else {
lcd_bl_ctrl(0);
}
} else {
return -1;
}
return 0;
}
int lcd_drv_backlight_ctrl(u8 percent)
{
int ret = lcd_drv_backlight_ctrl_base(percent);
if (ret < 0) {
backlight_status = 0;
} else {
backlight_status = percent;
}
return ret;
}
int lcd_drv_power_ctrl(u8 on)
{
if (!__lcd) {
__lcd = lcd_drv_get_hdl(TCFG_LCD_MATCH_MODE, LCD_LOGO);
}
if (!__this) {
__this = __lcd->param;
}
if (__lcd && __lcd->power_ctrl) {
__lcd->power_ctrl(on);
}
return 0;
}
struct lcd_platform_data *lcd_get_platform_data()
{
return lcd_dat;
}
static int find_begin(u8 *begin, u8 *end, int pos)
{
u8 *p = &begin[pos];
while ((p + 3) < end) {
if ((p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3]) == BEGIN_FLAG) {
return (&p[4] - begin);
}
p++;
}
return -1;
}
static int find_end(u8 *begin, u8 *end, int pos)
{
u8 *p = &begin[pos];
while ((p + 3) < end) {
if ((p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3]) == END_FLAG) {
return (&p[0] - begin);
}
p++;
}
return -1;
}
void lcd_drv_cmd_list(u8 *cmd_list, int cmd_cnt)
{
int i;
int k;
u8 *p8;
u8 *temp = NULL;
u16 temp_len = 5 * 64;
u16 len;
temp = (u8 *)malloc(temp_len);
for (i = 0; i < cmd_cnt;) {
int begin = find_begin(cmd_list, &cmd_list[cmd_cnt], i);
int cnt = 0;
if ((begin != -1)) {
int end = find_end(cmd_list, &cmd_list[cmd_cnt], begin);
if (end != -1) {
p8 = (u8 *)&cmd_list[begin];
u8 *param;
u32 addr;
if (lcd_get_param(CMD_MODE) == CMD_24BIT) {
cnt = end - begin - 3;
param = &p8[3];
addr = (p8[0] << 16) | (p8[1] << 8) | p8[2];
} else if (lcd_get_param(CMD_MODE) == CMD_16BIT) {
cnt = end - begin - 2;
param = &p8[2];
addr = (p8[0] << 8) | p8[1];
} else {
cnt = end - begin - 1;
param = &p8[1];
addr = p8[0];
}
if (((p8[0] << 24) | (p8[1] << 16) | (p8[2] << 8) | p8[3]) == REGFLAG_DELAY_FLAG) {
LCD_PRINTF("delay %d ms\n", p8[4]);
delay_2ms(p8[4] / 2);
#if 0
} else if (((p8[0] << 24) | (p8[1] << 16) | (p8[2] << 8) | p8[3]) == REGFLAG_CONFIRM_FLAG) {
u8 addr1 = p8[4];
u8 value = p8[5];
u8 timeout = p8[6];
LCD_PRINTF("addr : 0x%x, value : 0x%x, timeout : %d\n", addr1, value, timeout);
u8 power_mode;
u32 jiffies_begin = jiffies_msec();
int wait_timeout = jiffies + msecs_to_jiffies(timeout); //超时时间设置
while (1) {
if (time_after(jiffies, wait_timeout)) {
LCD_PRINTF("confirm fail! lcd power_mode status 0x%x wait timeout\n", value);
break;
}
lcd_read_cmd(addr, &power_mode, sizeof(power_mode));
if (power_mode == value) {
cnt++;
if (cnt > 10) {
break;
}
} else {
cnt = 0;
}
}
u32 jiffies_end = jiffies_msec();
LCD_PRINTF("0x%x wait %d ms\n", addr1, jiffies_end - jiffies_begin);
#endif
} else {
len = sprintf((char *)temp, "send : 0x%08x(%d), ", addr, cnt);
for (k = 0; k < cnt; k++) {
len += sprintf((char *)&temp[len], "0x%02x, ", param[k]);
if (len > (temp_len - 10)) {
len += sprintf((char *)&temp[len], "...");
break;
}
}
len += sprintf((char *)&temp[len], "\n");
if (len <= temp_len) {
LCD_PRINTF("cmd:%s", temp);
}
lcd_write_cmd(addr, param, cnt);
}
i = end + 4;
}
}
}
free(temp);
}
/*
*********************************************************************************************************
* LCD DEVICE MATCH
*
* Description: LCD 设备初始化
*
* Arguments : 匹配模式， 屏驱LOGO
*
* Returns : 屏设备句柄
*
* Notes : 1、当只有一个屏驱时，不进行匹配，直接返回该屏驱句柄
*
* 2、两种匹配方式 LOGO 或者 ID
*
* 3、若存在屏设备句柄时直接返回
*********************************************************************************************************
*/
struct lcd_drive *lcd_drv_get_hdl(u8 mode, const char *logo)
{
if (__lcd) {
return __lcd;
} else {
if (mode == LCD_MATCH_BY_LOGO) {
return lcd_drv_get_hdl_by_logo(logo);
} else {
return lcd_drv_get_hdl_by_id();
}
}
}
/*
*********************************************************************************************************
* LCD DEVICE INIT
*
* Description: LCD 设备初始化
*
* Arguments : *p 板级配置的 LCD SPI 信息
*
* Returns : 0 初始化成功
* -1 初始化失败
*
* Notes : 1、判断是否在板级文件配置SPI，是继续，否进入断言，
*
* 2、配置SPI可操作IO给IMD操作
*
* 3、LCD设备复位
*
* 4、SPI模块初始化，IMD模块初始化
*********************************************************************************************************
*/
int lcd_drv_init(void *p)
{
lcd_debug("lcd_drv_init ...\n");
struct ui_devices_cfg *cfg = (struct ui_devices_cfg *)p;
memcpy(lcd_dat, cfg->private_data, sizeof(struct lcd_platform_data));
lcd_debug("spi pin rest:%d, en:%d\n", lcd_dat->pin_reset, lcd_dat->pin_en);
//可通过屏幕logo或者屏幕id匹配屏驱，任选一种匹配方式
if (!__lcd) {
__lcd = lcd_drv_get_hdl(TCFG_LCD_MATCH_MODE, LCD_LOGO);
}
if (!__this) {
__this = __lcd->param;
}
ASSERT(__lcd, ", don't find lcd_device");
ASSERT(__this, ", don't find dbi_param");
/* 如果有使能IO，设置使能IO输出高电平 */
lcd_en_ctrl(true);
if (__lcd->row_addr_align && __lcd->column_addr_align) {
lcd_set_align(__lcd->row_addr_align, __lcd->column_addr_align);
} else {
lcd_set_align(1, 1);
}
/* lcd复位 */
lcd_reset(__lcd);
/* 初始化硬件等 */
lcd_init(__this);
/* 屏幕初始化指令 */
lcd_drv_cmd_list(__lcd->lcd_cmd, __lcd->cmd_cnt);
u8 power_mode = 0;
lcd_read_cmd(0x0a, &power_mode, sizeof(power_mode));
LCD_PRINTF("power_mode : 0x%x\n", power_mode);
u8 pixel_format = 0;
lcd_read_cmd(0x0c, &pixel_format, sizeof(pixel_format));
LCD_PRINTF("pixel_format : 0x%x\n", pixel_format);
lcd_mcpwm_init();
return 0;
}
/*
*********************************************************************************************************
* GET LCD DEVICE INFO
*
* Description: 获取 LCD 设备信息
*
* Arguments : *info LCD 设备信息缓存结构体，根据结构体内容赋值即可
*
* Returns : 0 获取成功
* -1 获取失败
*
* Notes : 1、根据参数结构体的内容，将LCD对应信息赋值给结构体元素
*********************************************************************************************************
*/
static void lcd_drv_get_screen_info(struct lcd_info *info)
{
/* imb的宽高 */
ASSERT(__this);
info->width = __this->in_width;
info->height = __this->in_height;
info->radius = __lcd->radius;
info->fill_argb = __lcd->fill_argb;
/* imb的输出格式 */
info->color_format = __this->in_format;//OUTPUT_FORMAT_RGB565;
if (info->color_format == OUTPUT_FORMAT_RGB565) {
info->stride = (info->width * 2 + 3) / 4 * 4;
} else if (info->color_format == OUTPUT_FORMAT_RGB888) {
info->stride = (info->width * 3 + 3) / 4 * 4;
}
/* 屏幕类型 */
info->interface = __this->lcd_type;
info->fps = __this->fps;
/* 对齐 */
info->col_align = __lcd->column_addr_align;
info->row_align = __lcd->row_addr_align;
if (!info->col_align) {
info->col_align = 1;
}
if (!info->row_align) {
info->row_align = 1;
}
/* 背光状态 */
info->bl_status = !!backlight_status;
info->buf_num = __this->buffer_num;
info->buffer = __this->buffer;
info->buffer_size = __this->buffer_total_size;
ASSERT(info->col_align, " = 0, lcd driver column address align error, default value is 1");
ASSERT(info->row_align, " = 0, lcd driver row address align error, default value is 1");
/* return 0; */
}
/*$PAGE*/
/*
*********************************************************************************************************
* MALLOC DISPLAY BUFFER
*
* Description: 申请 LCD 显存 buffer
*
* Arguments : **buf 保存显存buffer指针
* *size 保存显存buffer大小
*
* Returns : 0 成功
* -1 失败
*
* Notes : 1、根据LCD驱动中配置的显存大小和数量申请显存BUFFER
*
* 2、将显存buffer指针赋值给参数**buf，显存buffer大小赋值给参数*size
*
* 注意：buffer默认是lock状态，此时不能推屏，需由UI框架获取并写入数据后才能推屏
*********************************************************************************************************
*/
static void lcd_drv_buffer_malloc(u8 **buf, u32 *size)
{
/* int buf_size = ((__this->lcd_width * __this->lcd_height * 2) + 3) / 4 * 4; */
ASSERT(__this);
int buf_size = (__this->buffer_size + 3) / 4 * 4; // 把buffer大小做四字节对齐
*buf = (u8 *)malloc(buf_size * __this->buffer_num);
if (*buf == NULL) {
ASSERT(0);
// 如果buffer申请失败
*size = 0;
return;
}
*size = buf_size * __this->buffer_num;
__this->buffer = *buf;
__this->buffer_total_size = *size;
return;
}
/*$PAGE*/
/*
*********************************************************************************************************
* FREE DISPLAY BUFFER
*
* Description: 释放 LCD 显存 buffer
*
* Arguments : *buf 显存buffer指针
*
* Returns : 0 成功
* -1 失败
*
* Notes : 1、使用memory API 释放显存buffer
*********************************************************************************************************
*/
static void lcd_drv_buffer_free(u8 *buf)
{
if (buf) {
free(buf);
}
return;
}
/*$PAGE*/
/*
*********************************************************************************************************
* LCD DRAW BUFFER
*
* Description: 把显存 buf 推送到屏幕
*
* Arguments : *buf 显存buffer指针
* len 显存buffer的数据量
* wait 是否等待
*
* Returns : 0 成功
* -1 失败
*
* Notes : 1、使用 IMD 模块将显存buffer推给屏幕
*********************************************************************************************************
*/
static void lcd_drv_draw(u8 *buf, int xstart, int xend, int ystart, int yend)
{
lcd_draw(buf, xstart, xend, ystart, yend);
while(lcd_busy()){
delay_2ms(1);
}
}
static void lcd_drv_draw_continue(u8 *buf, int xstart, int xend, int ystart, int yend)
{
lcd_draw_continue(buf, xstart, xend, ystart, yend);
}
/*$PAGE*/
/*
*********************************************************************************************************
* GET LCD DRIVE HANDLER
*
* Description: 获取LCD驱动句柄
*
* Arguments : none
*
* Returns : struct lcd_interface* LCD驱动接口句柄
*
* Notes : 1、从LCD接口列表中找到LCD接口句柄并返回
*********************************************************************************************************
*/
struct lcd_interface *lcd_get_hdl()
{
struct lcd_interface *p;
ASSERT(lcd_interface_begin != lcd_interface_end, "don't find lcd interface!");
for (p = lcd_interface_begin; p < lcd_interface_end; p++) {
return p;
}
return NULL;
}
static void lcd_drv_set_draw_area(u16 xs, u16 xe, u16 ys, u16 ye)
{
lcd_set_draw_area(xs, xe, ys, ye);
}
static void lcd_drv_clear_screen(u32 color, int xstart, int xend, int ystart, int yend)
{
lcd_clear(color, xstart, xend, ystart, yend);
lcd_wait_busy();
}
struct lcd_drive *lcd_drv_get_hdl_by_logo(const char *logo)
{
struct lcd_drive *p;
int lcd_type;
int spi_mode;
int spi_submode;
int lcd_num = 0;
/* LCD_PRINTF("find logo %s\n", logo); */
ASSERT(lcd_device_begin != lcd_device_end, "don't find lcd device!");
//统计屏驱的个数
for (p = lcd_device_begin; p < lcd_device_end; p++) {
LCD_PRINTF("find logo:%s\n", p->logo);
lcd_num++;
}
//只有一个屏驱时不进行匹配
if (lcd_num == 1) {
p = lcd_device_begin;
LCD_PRINTF("Due to lcd_num = %d, don't match any lcd device. Only one lcd device %s is selected by default.\n", lcd_num, p->logo ? p->logo : "null");
return p;
}
//需确保所有使能的屏驱接口保持一致
for (p = lcd_device_begin; p < lcd_device_end; p++) {
if (p == lcd_device_begin) {
lcd_type = ((struct dbi_param *)p->param)->lcd_type;
spi_mode = ((struct dbi_param *)p->param)->spi.spi_mode & 0xf0;
spi_submode = ((struct dbi_param *)p->param)->spi.spi_mode & 0x0f;
} else {
ASSERT(lcd_type == ((struct dbi_param *)p->param)->lcd_type, ", all lcd interface must the same");
ASSERT(spi_mode == (((struct dbi_param *)p->param)->spi.spi_mode & 0xf0), ", all spi_mode must the same");
ASSERT(spi_submode == (((struct dbi_param *)p->param)->spi.spi_mode & 0x0f), ", all spi_submode must the same");
}
}
for (p = lcd_device_begin; p < lcd_device_end; p++) {
if (p->logo && logo && !strcmp(p->logo, logo)) {
LCD_PRINTF("p->logo : %s\n", p->logo);
return p;
}
}
return NULL;
}
struct lcd_drive *lcd_drv_get_hdl_by_id()
{
struct lcd_drive *p;
int lcd_type;
int spi_mode;
int spi_submode;
int lcd_num = 0;
ASSERT(lcd_device_begin != lcd_device_end, "don't find lcd device!");
//统计屏驱的个数
for (p = lcd_device_begin; p < lcd_device_end; p++) {
lcd_num++;
}
//只有一个屏驱时不进行匹配
if (lcd_num == 1) {
p = lcd_device_begin;
LCD_PRINTF("Due to lcd_num = %d, don't match any lcd device. Only one lcd device %s is selected by default.\n", lcd_num, p->logo ? p->logo : "null");
return p;
}
//需确保所有使能的屏驱接口保持一致
for (p = lcd_device_begin; p < lcd_device_end; p++) {
if (p == lcd_device_begin) {
lcd_type = ((struct dbi_param *)p->param)->lcd_type;
spi_mode = ((struct dbi_param *)p->param)->spi.spi_mode & 0xf0;
spi_submode = ((struct dbi_param *)p->param)->spi.spi_mode & 0x0f;
} else {
ASSERT(lcd_type == ((struct dbi_param *)p->param)->lcd_type, ", all lcd interface must the same");
ASSERT(spi_mode == (((struct dbi_param *)p->param)->spi.spi_mode & 0xf0), ", all spi_mode must the same");
ASSERT(spi_submode == (((struct dbi_param *)p->param)->spi.spi_mode & 0x0f), ", all spi_submode must the same");
}
}
for (p = lcd_device_begin; p < lcd_device_end; p++) {
struct dbi_param *this = (struct dbi_param *)p->param;
extern struct dbi_variable dbi_var;
dbi_var.clock_init = false;
lcd_en_ctrl(true);
lcd_set_ctrl_pin_func(spi_te_stat);
lcd_reset(p); /* lcd复位 */
lcd_init(this); /* 初始化lcd控制器 */
u32 lcd_read_id = 0;
if (p->read_id) {
lcd_read_id = p->read_id();
}
LCD_PRINTF("p->logo : %s, p->lcd_id : 0x%x, read_id : 0x%x\n", p->logo ? p->logo : "null", p->lcd_id, lcd_read_id);
if (p->lcd_id == lcd_read_id) {
return p;
}
}
return NULL;
}
int lcd_drv_get_info(void *info)
{
struct lcd_interface *lcd;
lcd = lcd_get_hdl();
ASSERT(lcd);
if (lcd->get_screen_info) {
lcd->get_screen_info(info);
}
return 0;
}
REGISTER_LCD_INTERFACE(lcd) = {
.init = lcd_drv_init,
.draw = lcd_drv_draw,
.get_screen_info = lcd_drv_get_screen_info,
.buffer_malloc = lcd_drv_buffer_malloc,
.buffer_free = lcd_drv_buffer_free,
.backlight_ctrl = lcd_drv_backlight_ctrl,
.power_ctrl = lcd_drv_power_ctrl,
.set_draw_area = lcd_drv_set_draw_area,
.clear_screen = lcd_drv_clear_screen,
};
loader/update_ui/cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_qspi_st77903_400x400.c
+196
View File
@@ -0,0 +1,196 @@
/*
** 包含board的头文件，确定baord里面开关的屏驱宏
*/
#include "app_config.h"
#include "clock_cfg.h"
#include "ui/lcd_spi/lcd_drive.h"
/*
** 驱动代码的宏开关
*/
//<<<[qspi屏 400x400]>>>//
#if TCFG_LCD_QSPI_ST77903_ENABLE
#define LCD_DRIVE_CONFIG QSPI_RGB565_ST77903_1T2B
/*
** 包含imd头文件，屏驱相关的变量和结构体都定义在imd.h
*/
#include "asm/imd.h"
#include "asm/imb.h"
#include "includes.h"
#include "ui/ui_api.h"
#define SCR_X 0
#define SCR_Y 0
#define SCR_W 400
#define SCR_H 400
#define LCD_W 400
#define LCD_H 400
#define LCD_BLOCK_W 400
#define LCD_BLOCK_H 10
#define BUF_NUM 2
#define LCD_FORMAT OUTPUT_FORMAT_RGB565
/*
** 初始化代码
*/
static const u8 lcd_qspi_st77903_cmd_list_poweron[] ALIGNED(4) = {
_BEGIN_, 0xF0, 0xC3, _END_,
_BEGIN_, 0xF0, 0x96, _END_,
_BEGIN_, 0xF0, 0xA5, _END_,
_BEGIN_, 0xC1, 0xBB, 0x02, 0x0F, 0x0B, _END_,
_BEGIN_, 0xC2, 0xBB, 0x02, 0x0F, 0x0B, _END_,
_BEGIN_, 0xC3, 0x11, 0x03, 0x24, 0x01, _END_,
_BEGIN_, 0xC4, 0x11, 0x03, 0x24, 0x01, _END_,
_BEGIN_, 0xC5, 0x2E, _END_,
_BEGIN_, 0xE0, 0xF0, 0x05, 0x0A, 0x0C, 0x0A, 0x07, 0x34, 0x73, 0x4B, 0x0E, 0x1B, 0x19, 0x29, 0x2A, _END_,
_BEGIN_, 0xE1, 0xF0, 0x05, 0x0A, 0x0C, 0x0A, 0x06, 0x33, 0x03, 0x4C, 0x0E, 0x1C, 0x1A, 0x29, 0x2A, _END_,
_BEGIN_, 0xE4, 0xC8, 0x20, _END_,
_BEGIN_, 0xE5, 0x0F, 0xF5, 0x00, 0x11, 0x22, 0x25, 0x10, 0x77, 0x77, 0x77, 0x44, 0x44, _END_,
_BEGIN_, 0xE6, 0x0F, 0xF5, 0x00, 0x11, 0x22, 0x25, 0x10, 0x22, 0x22, 0x22, 0x22, 0x22, _END_,
_BEGIN_, 0xE7, 0x00, 0x77, 0x1F, 0xCC, 0x2A, 0x80, 0x33, _END_,
_BEGIN_, 0xEC, 0x00, 0x55, 0x00, 0x00, 0x00, 0x49, 0x22, _END_,
_BEGIN_, 0xED, 0xC3, _END_,
_BEGIN_, 0xE4, 0x08, 0x2F, _END_,
_BEGIN_, 0xB2, 0x10, _END_,
_BEGIN_, 0xB3, 0x02, _END_,
_BEGIN_, 0xB4, 0x02, _END_,
/* _BEGIN_, 0xB5, 0x00, 0x54, 0x00, 0x54, _END_, */
_BEGIN_, 0xB5, 0x00, 0x06, 0x00, 0x06, _END_,
_BEGIN_, 0xB6, 0xC7, 0x31, _END_,
_BEGIN_, 0xBA, 0x5B, 0xAA, 0x02, 0x00, 0x21, 0x01, 0x00, _END_,
_BEGIN_, 0xBB, 0x00, 0x28, 0x00, 0x28, 0x08, 0x07, 0x07, 0x04, _END_,
_BEGIN_, 0xBC, 0x00, 0x36, 0x00, 0x28, 0x08, 0x07, 0x07, 0x04, _END_,
_BEGIN_, 0xBD, 0x77, 0xFF, 0xFF, 0xFF, 0xBA, 0xAB, 0xFF, 0xFF, 0x16, 0xFF, 0x02, _END_,
_BEGIN_, 0xA4, 0xC0, 0x4A, 0xE0, _END_,
_BEGIN_, 0xA5, 0x20, 0x12, 0x40, 0x01, 0x00, 0x06, 0x2A, 0x0A, 0x00, _END_,
_BEGIN_, 0xA6, 0x20, 0x12, 0x40, 0x01, 0x00, 0x06, 0x2A, 0x0A, 0x00, _END_,
_BEGIN_, 0xd9, 0x22, _END_,
_BEGIN_, 0x21, _END_,
_BEGIN_, 0x35, 0x00, _END_,
_BEGIN_, 0x36, 0x0C, _END_,
_BEGIN_, 0x3A, 0x05, _END_,
_BEGIN_, 0x11, _END_,
_BEGIN_, REGFLAG_DELAY, 120, _END_,
_BEGIN_, 0x29, _END_,
_BEGIN_, REGFLAG_DELAY, 120, _END_,
//test bist mode
//_BEGIN_, 0XB0, 0XA5, _END_,
//_BEGIN_, 0XCC, 0X40, 0X00, 0X3F, 0X00, 0X0A, 0X0A, 0XEA, 0XEA, 0X03, _END_,
};
/*
** lcd背光控制
** 考虑到手表应用lcd背光控制需要更灵活自由，可能需要pwm调光，随时亮灭等
** 因此内部不操作lcd背光，全部由外部自行控制
*/
static int lcd_qspi_st77903_backlight_ctrl(u8 percent)
{
if (percent) {
} else {
}
return 0;
}
/*
** lcd电源控制
*/
static int lcd_qspi_st77903_power_ctrl(u8 onoff)
{
lcd_en_ctrl(onoff);
return 0;
}
/*
** 设置lcd进入睡眠
*/
static void lcd_qspi_st77903_entersleep(void)
{
lcd_write_cmd(0x28, NULL, 0);
lcd_write_cmd(0x10, NULL, 0);
delay_2ms(120 / 2); // delay 120ms
}
/*
** 设置lcd退出睡眠
*/
static void lcd_qspi_st77903_exitsleep(void)
{
lcd_write_cmd(0x11, NULL, 0);
delay_2ms(5); // delay 120ms
lcd_write_cmd(0x29, NULL, 0);
}
struct imd_param lcd_qspi_st77903_param = {
.scr_x = SCR_X,
.scr_y = SCR_Y,
.scr_w = SCR_W,
.scr_h = SCR_H,
.in_width = SCR_W,
.in_height = SCR_H,
.in_format = LCD_FORMAT,
.lcd_width = LCD_W,
.lcd_height = LCD_H,
.lcd_type = LCD_TYPE_SPI,
.buffer_num = BUF_NUM,
.buffer_size = LCD_BLOCK_W * LCD_BLOCK_H * 2,
.fps = 61,
.spi = {
.spi_mode = SPI_IF_MODE(LCD_DRIVE_CONFIG),
.pixel_type = PIXEL_TYPE(LCD_DRIVE_CONFIG),
.out_format = OUT_FORMAT(LCD_DRIVE_CONFIG),
.port = SPI_PORTA,
.spi_dat_mode = SPI_MODE_UNIDIR,
.qspi_cmd = {
.write_cmd = 0xde,
.read_cmd = 0xdd,
},
},
.debug_mode_en = false,
.debug_mode_color = 0xff0000,
};
REGISTER_LCD_DEVICE() = {
.logo = "st77903",
.row_addr_align = 1,
.column_addr_align = 1,
.lcd_cmd = (void *) &lcd_qspi_st77903_cmd_list_poweron,
.cmd_cnt = sizeof(lcd_qspi_st77903_cmd_list_poweron) / sizeof(lcd_qspi_st77903_cmd_list_poweron[0]),
.param = (void *) &lcd_qspi_st77903_param,
.reset = NULL, // 没有特殊的复位操作，用内部普通复位函数即可
.backlight_ctrl = NULL, //lcd_qspi_st77903_backlight_ctrl,
.power_ctrl = lcd_qspi_st77903_power_ctrl,
.entersleep = lcd_qspi_st77903_entersleep,
.exitsleep = lcd_qspi_st77903_exitsleep,
};
#endif
loader/update_ui/cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_qspi_st77903_400x400_v1.c
+247
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@@ -0,0 +1,247 @@
/*
** 包�board的头文件，确定baord里�开关的�驱�
*/
#include "app_config.h"
#include "clock_cfg.h"
#include "ui/lcd_spi/lcd_drive.h"
/*
** 驱动代�的�开�
*/
//<<<[qspiå±?400x400]>>>//
#if TCFG_LCD_QSPI_ST77903_V1_ENABLE
#define LCD_DRIVE_CONFIG QSPI_RGB565_ST77903_1T2B
/*
** 包�imd头文件，�驱相关的��和结构体都定义在imd.h
*/
#include "includes.h"
#include "ui/ui_api.h"
#define SCR_X 0
#define SCR_Y 0
#define SCR_W 400
#define SCR_H 400
#define LCD_W 400
#define LCD_H 400
#define LCD_BLOCK_W 400
#if defined(TCFG_PSRAM_DEV_ENABLE) && TCFG_PSRAM_DEV_ENABLE
#define LCD_BLOCK_H 40
#else
#define LCD_BLOCK_H 20
#endif
#define BUF_NUM 2
#define LCD_FORMAT OUTPUT_FORMAT_RGB565
/*
** �始化代�
*/
static const u8 lcd_qspi_st77903_v1_cmd_list_poweron[] ALIGNED(4) = {
_BEGIN_, 0xF0, 0xC3, _END_,
_BEGIN_, 0xF0, 0x96, _END_,
_BEGIN_, 0xF0, 0xA5, _END_,
_BEGIN_, 0xC1, 0xBB, 0x02, 0x0F, 0x0B, _END_,
_BEGIN_, 0xC2, 0xBB, 0x02, 0x0F, 0x0B, _END_,
_BEGIN_, 0xC3, 0x56, 0x06, 0x04, 0x03, _END_,
_BEGIN_, 0xC4, 0x42, 0x05, 0x24, 0x03, _END_,
_BEGIN_, 0xC5, 0x2c, _END_,
_BEGIN_, 0xE0, 0xF0, 0x05, 0x09, 0x09, 0x0A, 0x25, 0x2C, 0x33, 0x44, 0x38, 0x14, 0x14, 0x29, 0x2F, _END_,
_BEGIN_, 0xE1, 0xF0, 0x05, 0x0A, 0x0A, 0x0A, 0x25, 0x2D, 0x33, 0x43, 0x38, 0x14, 0x14, 0x29, 0x2F, _END_,
_BEGIN_, 0xE4, 0xC8, 0x20, _END_,
_BEGIN_, 0xE5, 0x0F, 0xF5, 0x00, 0x11, 0x22, 0x25, 0x10, 0x55, 0x55, 0x55, 0x55, 0x55, _END_,
_BEGIN_, 0xE6, 0x0F, 0xF5, 0x00, 0x11, 0x22, 0x25, 0x10, 0x55, 0x55, 0x55, 0x55, 0x55, _END_,
_BEGIN_, 0xE7, 0x00, 0x77, 0x1F, 0xCC, 0x2A, 0x80, 0x33, _END_,
_BEGIN_, 0xEC, 0x00, 0x55, 0x00, 0x00, 0x00, 0x49, 0x22, _END_,
_BEGIN_, 0xB2, 0x10, _END_,
_BEGIN_, 0xB3,/*0x02*/0x03, _END_,
_BEGIN_, 0xB4, 0x02, _END_,
//_BEGIN_, 0xB5, 0x00, 0x54, 0x00, 0x54, _END_,
_BEGIN_, 0xB5, 0x00, 0x06, 0x00, 0x06, _END_,
_BEGIN_, 0xB6, 0xC7, 0x31, _END_,
_BEGIN_, 0xBA, 0x5B, 0xAA, 0x02, 0x00, 0x21, 0x01, 0x00, _END_,
_BEGIN_, 0xBB, 0x00, 0x24, 0x00, 0x27, 0x08, 0x07, 0x07, 0x04, _END_,
_BEGIN_, 0xBC, 0x00, 0x36, 0x00, 0x28, 0x08, 0x07, 0x07, 0x04, _END_,
_BEGIN_, 0xBD, 0x77, 0xFF, 0xFF, 0xFF, 0xBA, 0xAB, 0xFF, 0xFF, 0x16, 0xFF, 0x02, _END_,
_BEGIN_, 0xA4, 0xC0, 0x4A, 0xE0, _END_,
_BEGIN_, 0xA5, 0x20, 0x12, 0x40, 0x01, 0x00, 0x06, 0x2A, 0x0A, 0x00, _END_,
_BEGIN_, 0xA6, 0x20, 0x12, 0x40, 0x01, 0x00, 0x06, 0x2A, 0x0A, 0x00, _END_,
_BEGIN_, 0xd9, 0x22, _END_,
_BEGIN_, 0x21, _END_,
_BEGIN_, 0x35, 0x00, _END_,
_BEGIN_, 0x36, 0x0C, _END_,
_BEGIN_, 0x3A, 0x05, _END_,
_BEGIN_, 0x11, _END_,
_BEGIN_, REGFLAG_DELAY, 120, _END_,
_BEGIN_, 0x29, _END_,
_BEGIN_, REGFLAG_DELAY, 120, _END_,
//test bist mode
//_BEGIN_, 0XB0, 0XA5, _END_,
//_BEGIN_, 0XCC, 0X40, 0X00, 0X3F, 0X00, 0X0A, 0X0A, 0XEA, 0XEA, 0X03, _END_,
};
/*
** lcd背光控制
** 考虑到手表应用lcd背光控制需�更�活自由，�能需�pwm调光，�时亮�等
** 因此内部��作lcd背光，全部由外部自行控制
*/
static int lcd_qspi_st77903_v1_backlight_ctrl(u8 percent)
{
if (percent) {
} else {
}
return 0;
}
/*
** lcd电�控制
*/
static int lcd_qspi_st77903_v1_power_ctrl(u8 onoff)
{
lcd_en_ctrl(onoff);
return 0;
}
void lcd_test_mode()
{
u8 buf[10];
buf[0] = 0xa5;
lcd_write_cmd(0xb0, buf, 1);
buf[0] = 0x40;
buf[1] = 0x00;
buf[2] = 0x3f;
buf[3] = 0x00;
buf[4] = 0x0a;
buf[5] = 0x0a;
buf[6] = 0xea;
buf[7] = 0xea;
buf[8] = 0x03;
lcd_write_cmd(0xcc, buf, 9);
}
void lcd_read_test()
{
u8 power_mode = 0;
lcd_read_cmd(0x0a, &power_mode, sizeof(power_mode));
printf("power_mode : 0x%x\n", power_mode);
u8 pixel_format ;
pixel_format = 0x06;
lcd_write_cmd(0x3a, &pixel_format, sizeof(pixel_format));
pixel_format = 0;
lcd_read_cmd(0x0c, &pixel_format, sizeof(pixel_format));
printf("pixel_format : 0x%x\n", pixel_format);
pixel_format = 0x05;
lcd_write_cmd(0x3a, &pixel_format, sizeof(pixel_format));
pixel_format = 0;
lcd_read_cmd(0x0c, &pixel_format, sizeof(pixel_format));
printf("pixel_format : 0x%x\n", pixel_format);
}
/*
** 设置lcd进入�眠
*/
static void lcd_qspi_st77903_v1_entersleep(void)
{
printf("enter sleep\n");
#if 0
//lcd_test_mode();
lcd_read_test();
while (1) {
os_time_dly(100);
}
#endif
lcd_write_cmd(0x28, NULL, 0);
lcd_write_cmd(0x10, NULL, 0);
delay_2ms(120 / 2); // delay 120ms
}
/*
** 设置lcd退出��
*/
static void lcd_qspi_st77903_v1_exitsleep(void)
{
lcd_write_cmd(0x11, NULL, 0);
delay_2ms(5); // delay 120ms
lcd_write_cmd(0x29, NULL, 0);
}
struct imd_param lcd_qspi_st77903_v1_param = {
.scr_x = SCR_X,
.scr_y = SCR_Y,
.scr_w = SCR_W,
.scr_h = SCR_H,
.in_width = SCR_W,
.in_height = SCR_H,
.in_format = LCD_FORMAT,
.lcd_width = LCD_W,
.lcd_height = LCD_H,
.lcd_type = LCD_TYPE_SPI,
.buffer_num = BUF_NUM,
.buffer_size = LCD_BLOCK_W * LCD_BLOCK_H * 2,
.fps = 61,//61
.spi = {
.spi_mode = SPI_IF_MODE(LCD_DRIVE_CONFIG),
.pixel_type = PIXEL_TYPE(LCD_DRIVE_CONFIG),
.out_format = OUT_FORMAT(LCD_DRIVE_CONFIG),
.port = SPI_PORTA,
.spi_dat_mode = SPI_MODE_UNIDIR,
.qspi_cmd = {
.write_cmd = 0xde,
.read_cmd = 0xdd,
},
},
.debug_mode_en = false,
.debug_mode_color = 0x00ff00,
};
REGISTER_LCD_DEVICE() = {
.logo = "st77903_v1",
.row_addr_align = 1,
.column_addr_align = 1,
.lcd_cmd = (void *) &lcd_qspi_st77903_v1_cmd_list_poweron,
.cmd_cnt = sizeof(lcd_qspi_st77903_v1_cmd_list_poweron) / sizeof(lcd_qspi_st77903_v1_cmd_list_poweron[0]),
.param = (void *) &lcd_qspi_st77903_v1_param,
.reset = NULL, // 没有特殊的���作，用内部普通��函数��
.backlight_ctrl = NULL, //lcd_qspi_st77903_v1_backlight_ctrl,
.power_ctrl = lcd_qspi_st77903_v1_power_ctrl,
.entersleep = lcd_qspi_st77903_v1_entersleep,
.exitsleep = lcd_qspi_st77903_v1_exitsleep,
};
#endif
loader/update_ui/cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_qspi_st77916_320x386.c
+414
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@@ -0,0 +1,414 @@
/*
** 包含board的头文件，确定baord里面开关的屏驱宏
*/
#include "app_config.h"
#include "clock_cfg.h"
#include "ui/lcd_spi/lcd_drive.h"
#include "dbi.h"
#include "includes.h"
#include "ui/ui_api.h"
// TP 使用CST816D
/*
** 驱动代码的宏开关
*/
#if (TCFG_LCD_SPI_ST77916_ENABLE)
/* #define LCD_DRIVE_CONFIG QSPI_RGB565_SUBMODE0_1T8B */
#define LCD_DRIVE_CONFIG QSPI_RGB565_SUBMODE1_1T2B
/* #define LCD_DRIVE_CONFIG QSPI_RGB565_SUBMODE2_1T2B */
/* #define LCD_DRIVE_CONFIG QSPI_RGB666_SUBMODE0_1T8B */
/* #define LCD_DRIVE_CONFIG QSPI_RGB666_SUBMODE1_1T2B */
/* #define LCD_DRIVE_CONFIG QSPI_RGB666_SUBMODE2_1T2B */
/* #define LCD_DRIVE_CONFIG QSPI_RGB888_SUBMODE0_1T8B */
/* #define LCD_DRIVE_CONFIG QSPI_RGB888_SUBMODE1_1T2B */
/* #define LCD_DRIVE_CONFIG QSPI_RGB888_SUBMODE2_1T2B */
#define SCR_X 0
#define SCR_Y 0
#define SCR_W 320
#define SCR_H 386
#define LCD_W 320
#define LCD_H 386
#define LCD_BLOCK_W 320
#define LCD_BLOCK_H 4
#define BUF_NUM 2
#define LCD_FORMAT OUTPUT_FORMAT_RGB565
struct dbi_param lcd_spi_st77916_param;
/*
** 初始化代码
*/
static const u8 lcd_spi_st77916_cmd_list_poweron[] ALIGNED(4) = {
_BEGIN_, 0xf0, 0x28, _END_,
_BEGIN_, 0xf2, 0x28, _END_,
_BEGIN_, 0x7c, 0xd1, _END_,
_BEGIN_, 0x80, 0x10, _END_,
_BEGIN_, 0x83, 0xe0, _END_,
_BEGIN_, 0x84, 0x61, _END_,
_BEGIN_, 0xf2, 0x82, _END_,
_BEGIN_, 0xf0, 0x00, _END_,
_BEGIN_, 0xf0, 0x01, _END_,
_BEGIN_, 0xf1, 0x01, _END_,
/* #if (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB565) */
/* _BEGIN_, 0x3a, 0x55, _END_, */
/* #elif (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB666) */
/* _BEGIN_, 0x3a, 0x66, _END_, */
/* #elif (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB888) */
/* _BEGIN_, 0x3a, 0x77, _END_, */
/* #endif */
_BEGIN_, 0xb0, 0x56, _END_,
_BEGIN_, 0xb1, 0x4d, _END_,
_BEGIN_, 0xb2, 0x24, _END_,
_BEGIN_, 0xb4, 0x66, _END_,
_BEGIN_, 0xb5, 0x44, _END_,
_BEGIN_, 0xb6, 0x8b, _END_,
_BEGIN_, 0xb7, 0x40, _END_,
_BEGIN_, 0xb8, 0x05, _END_,
_BEGIN_, 0xba, 0x00, _END_,
_BEGIN_, 0xbb, 0x08, _END_,
_BEGIN_, 0xbc, 0x08, _END_,
_BEGIN_, 0xbd, 0x00, _END_,
_BEGIN_, 0xc0, 0x80, _END_,
_BEGIN_, 0xc1, 0x08, _END_,
_BEGIN_, 0xc2, 0x35, _END_,
_BEGIN_, 0xc3, 0x80, _END_,
_BEGIN_, 0xc4, 0x08, _END_,
_BEGIN_, 0xc5, 0x35, _END_,
_BEGIN_, 0xc6, 0xa9, _END_,
_BEGIN_, 0xc7, 0x41, _END_,
_BEGIN_, 0xc8, 0x01, _END_,
_BEGIN_, 0xc9, 0xa9, _END_,
_BEGIN_, 0xca, 0x41, _END_,
_BEGIN_, 0xcb, 0x01, _END_,
_BEGIN_, 0xd0, 0xd1, _END_,
_BEGIN_, 0xd1, 0x40, _END_,
_BEGIN_, 0xd2, 0x81, _END_,
_BEGIN_, 0xf5, 0x00, 0xa5, _END_,
_BEGIN_, 0xdd, 0x49, _END_,
_BEGIN_, 0xde, 0x49, _END_,
_BEGIN_, 0xf1, 0x10, _END_,
_BEGIN_, 0xf0, 0x00, _END_,
_BEGIN_, 0xf0, 0x02, _END_,
_BEGIN_, 0xe0, 0xf0, 0x0a, 0x11, 0x0c, 0x0b, 0x08, 0x3a, 0x54, 0x51, 0x29, 0x16, 0x15, 0x31, 0x34, _END_,
_BEGIN_, 0xe1, 0xf0, 0x0a, 0x11, 0x0b, 0x0a, 0x07, 0x39, 0x43, 0x4e, 0x09, 0x15, 0x15, 0x2e, 0x34, _END_,
_BEGIN_, 0xf0, 0x10, _END_,
_BEGIN_, 0xf3, 0x10, _END_,
_BEGIN_, 0xe0, 0x08, _END_,
_BEGIN_, 0xe1, 0x00, _END_,
_BEGIN_, 0xe2, 0x0b, _END_,
_BEGIN_, 0xe3, 0x00, _END_,
_BEGIN_, 0xe4, 0xe0, _END_,
_BEGIN_, 0xe5, 0x06, _END_,
_BEGIN_, 0xE6, 0x21, _END_,
_BEGIN_, 0xE7, 0x10, _END_,
_BEGIN_, 0xE8, 0x8A, _END_,
_BEGIN_, 0xE9, 0x82, _END_,
_BEGIN_, 0xEA, 0xE4, _END_,
_BEGIN_, 0xEB, 0x00, _END_,
_BEGIN_, 0xEC, 0x00, _END_,
_BEGIN_, 0xED, 0x14, _END_,
_BEGIN_, 0xEE, 0xFF, _END_,
_BEGIN_, 0xEF, 0x00, _END_,
_BEGIN_, 0xF8, 0xFF, _END_,
_BEGIN_, 0xF9, 0x00, _END_,
_BEGIN_, 0xFA, 0x00, _END_,
_BEGIN_, 0xFB, 0x30, _END_,
_BEGIN_, 0xFC, 0x00, _END_,
_BEGIN_, 0xFD, 0x00, _END_,
_BEGIN_, 0xFE, 0x00, _END_,
_BEGIN_, 0xFF, 0x00, _END_,
_BEGIN_, 0x60, 0x50, _END_,
_BEGIN_, 0x61, 0x02, _END_,
_BEGIN_, 0x62, 0x0B, _END_,
_BEGIN_, 0x63, 0x50, _END_,
_BEGIN_, 0x64, 0x04, _END_,
_BEGIN_, 0x65, 0x0B, _END_,
_BEGIN_, 0x66, 0x53, _END_,
_BEGIN_, 0x67, 0x08, _END_,
_BEGIN_, 0x68, 0x0B, _END_,
_BEGIN_, 0x69, 0x53, _END_,
_BEGIN_, 0x6A, 0x0A, _END_,
_BEGIN_, 0x6B, 0x0B, _END_,
_BEGIN_, 0x70, 0x50, _END_,
_BEGIN_, 0x71, 0x01, _END_,
_BEGIN_, 0x72, 0x0B, _END_,
_BEGIN_, 0x73, 0x50, _END_,
_BEGIN_, 0x74, 0x03, _END_,
_BEGIN_, 0x75, 0x0B, _END_,
_BEGIN_, 0x76, 0x53, _END_,
_BEGIN_, 0x77, 0x07, _END_,
_BEGIN_, 0x78, 0x0B, _END_,
_BEGIN_, 0x79, 0x53, _END_,
_BEGIN_, 0x7A, 0x09, _END_,
_BEGIN_, 0x7B, 0x0B, _END_,
_BEGIN_, 0x80, 0x58, _END_,
_BEGIN_, 0x81, 0x00, _END_,
_BEGIN_, 0x82, 0x04, _END_,
_BEGIN_, 0x83, 0x03, _END_,
_BEGIN_, 0x84, 0x0C, _END_,
_BEGIN_, 0x85, 0x00, _END_,
_BEGIN_, 0x86, 0x00, _END_,
_BEGIN_, 0x87, 0x00, _END_,
_BEGIN_, 0x88, 0x58, _END_,
_BEGIN_, 0x89, 0x00, _END_,
_BEGIN_, 0x8A, 0x06, _END_,
_BEGIN_, 0x8B, 0x03, _END_,
_BEGIN_, 0x8C, 0x0E, _END_,
_BEGIN_, 0x8D, 0x00, _END_,
_BEGIN_, 0x8E, 0x00, _END_,
_BEGIN_, 0x8F, 0x00, _END_,
_BEGIN_, 0x90, 0x58, _END_,
_BEGIN_, 0x91, 0x00, _END_,
_BEGIN_, 0x92, 0x08, _END_,
_BEGIN_, 0x93, 0x03, _END_,
_BEGIN_, 0x94, 0x10, _END_,
_BEGIN_, 0x95, 0x00, _END_,
_BEGIN_, 0x96, 0x00, _END_,
_BEGIN_, 0x97, 0x00, _END_,
_BEGIN_, 0x98, 0x58, _END_,
_BEGIN_, 0x99, 0x00, _END_,
_BEGIN_, 0x9A, 0x0A, _END_,
_BEGIN_, 0x9B, 0x03, _END_,
_BEGIN_, 0x9C, 0x12, _END_,
_BEGIN_, 0x9D, 0x00, _END_,
_BEGIN_, 0x9E, 0x00, _END_,
_BEGIN_, 0x9F, 0x00, _END_,
_BEGIN_, 0xA0, 0x58, _END_,
_BEGIN_, 0xA1, 0x00, _END_,
_BEGIN_, 0xA2, 0x03, _END_,
_BEGIN_, 0xA3, 0x03, _END_,
_BEGIN_, 0xA4, 0x0B, _END_,
_BEGIN_, 0xA5, 0x00, _END_,
_BEGIN_, 0xA6, 0x00, _END_,
_BEGIN_, 0xA7, 0x00, _END_,
_BEGIN_, 0xA8, 0x58, _END_,
_BEGIN_, 0xA9, 0x00, _END_,
_BEGIN_, 0xAA, 0x05, _END_,
_BEGIN_, 0xAB, 0x03, _END_,
_BEGIN_, 0xAC, 0x0D, _END_,
_BEGIN_, 0xAD, 0x00, _END_,
_BEGIN_, 0xAE, 0x00, _END_,
_BEGIN_, 0xAF, 0x00, _END_,
_BEGIN_, 0xB0, 0x58, _END_,
_BEGIN_, 0xB1, 0x00, _END_,
_BEGIN_, 0xB2, 0x07, _END_,
_BEGIN_, 0xB3, 0x03, _END_,
_BEGIN_, 0xB4, 0x0F, _END_,
_BEGIN_, 0xB5, 0x00, _END_,
_BEGIN_, 0xB6, 0x00, _END_,
_BEGIN_, 0xB7, 0x00, _END_,
_BEGIN_, 0xB8, 0x58, _END_,
_BEGIN_, 0xB9, 0x00, _END_,
_BEGIN_, 0xBA, 0x09, _END_,
_BEGIN_, 0xBB, 0x03, _END_,
_BEGIN_, 0xBC, 0x11, _END_,
_BEGIN_, 0xBD, 0x00, _END_,
_BEGIN_, 0xBE, 0x00, _END_,
_BEGIN_, 0xBF, 0x00, _END_,
_BEGIN_, 0xC0, 0x03, _END_,
_BEGIN_, 0xC1, 0x12, _END_,
_BEGIN_, 0xC2, 0xAA, _END_,
_BEGIN_, 0xC3, 0x30, _END_,
_BEGIN_, 0xC4, 0x21, _END_,
_BEGIN_, 0xC5, 0xBB, _END_,
_BEGIN_, 0xC6, 0x64, _END_,
_BEGIN_, 0xC7, 0x55, _END_,
_BEGIN_, 0xC8, 0x46, _END_,
_BEGIN_, 0xC9, 0x77, _END_,
_BEGIN_, 0xD0, 0x03, _END_,
_BEGIN_, 0xD1, 0x12, _END_,
_BEGIN_, 0xD2, 0xAA, _END_,
_BEGIN_, 0xD3, 0x30, _END_,
_BEGIN_, 0xD4, 0x21, _END_,
_BEGIN_, 0xD5, 0xBB, _END_,
_BEGIN_, 0xD6, 0x64, _END_,
_BEGIN_, 0xD7, 0x55, _END_,
_BEGIN_, 0xD8, 0x46, _END_,
_BEGIN_, 0xD9, 0x77, _END_,
_BEGIN_, 0xF3, 0x01, _END_,
_BEGIN_, 0xF0, 0x00, _END_,
_BEGIN_, 0x21, 0x00, _END_,
_BEGIN_, 0x35, 0x00, _END_,
_BEGIN_, 0x3A, 0x55, _END_,
/* _BEGIN_, 0x44, 0x00, 0x08, _END_, // TE configure */
_BEGIN_, 0x11, _END_,
_BEGIN_, REGFLAG_DELAY_FLAG, 120, _END_,
_BEGIN_, 0x29, _END_,
_BEGIN_, REGFLAG_DELAY_FLAG, 120, _END_,
/* _BEGIN_, 0x2c, 0x00, 0x00, 0x00, 0x00, _END_, */
/* _BEGIN_, 0x2c, 0x00, 0x00, 0x00, 0x00, _END_, */
/* _BEGIN_, REGFLAG_DELAY, 120, _END_, */
};
extern struct lcd_spi_platform_data *lcd_get_platform_data();
//static void delay_2ms(int cnt)
//{
// if (cnt * 2 > 10) {
// os_time_dly(cnt * 2 / 10 + 1);
// } else {
// mdelay(2 * cnt);
// }
//}
/*
** lcd电源控制
*/
static int lcd_spi_st77916_power_ctrl(u8 onoff)
{
lcd_en_ctrl(onoff);
return 0;
}
#define DEEP_STANDBY 0
//#define APP_IO_DEBUG_0(i,x) {JL_PORT##i->DIR &= ~BIT(x), JL_PORT##i->OUT &= ~BIT(x);}
//#define APP_IO_DEBUG_1(i,x) {JL_PORT##i->DIR &= ~BIT(x), JL_PORT##i->OUT |= BIT(x);}
/*
** 设置lcd进入睡眠
*/
static void lcd_spi_st77916_entersleep(void)
{
lcd_write_cmd(0x28, NULL, 0);
lcd_write_cmd(0x10, NULL, 0);
delay_2ms(120 / 2); // delay 120ms
#if DEEP_STANDBY
u8 dstb = 0x01;
lcd_write_cmd(0x4f, &dstb, sizeof(dstb));
delay_2ms(102 / 2); // delay 120ms
struct lcd_platform_data *lcd_dat = lcd_get_platform_data();
if (lcd_dat && lcd_dat->pin_te != NO_CONFIG_PORT) {
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_te), PORT_HIGHZ);
}
#endif
}
/*
** 设置lcd退出睡眠
*/
static void lcd_spi_st77916_exitsleep(void)
{
#if DEEP_STANDBY
struct lcd_platform_data *lcd_dat = (struct lcd_platform_data *)lcd_get_platform_data();
if (lcd_dat && (lcd_dat->pin_reset != NO_CONFIG_PORT)) {
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_reset), PORT_OUTPUT_LOW);
delay_2ms(4); // delay >5ms
gpio_set_mode(IO_PORT_SPILT(lcd_dat->pin_reset), PORT_OUTPUT_HIGH);
delay_2ms(4); // delay >5ms
}
lcd_write_cmd(0x11, NULL, 0);
delay_2ms(5);
lcd_write_cmd(0x29, NULL, 0);
delay_2ms(5);
lcd_init(&lcd_spi_st77916_param);
#else
lcd_write_cmd(0x11, NULL, 0);
delay_2ms(5); // delay 120ms
lcd_write_cmd(0x29, NULL, 0);
#endif
}
static u32 lcd_spi_st77916_read_id()
{
/* printf("##########################################################%s, %d\n", __FUNCTION__, __LINE__); */
u8 id1, id2, id3;
lcd_read_cmd(0xda, &id1, 1); // Read ID1
lcd_read_cmd(0xdb, &id2, 1); // Read ID2
lcd_read_cmd(0xdc, &id3, 1); // Read ID3
return ((id1 << 16) | (id2 << 8) | id3);
}
struct dbi_param lcd_spi_st77916_param = {
.scr_x = SCR_X,
.scr_y = SCR_Y,
.scr_w = SCR_W,
.scr_h = SCR_H,
.in_width = SCR_W,
.in_height = SCR_H,
.in_format = LCD_FORMAT,
.lcd_width = LCD_W,
.lcd_height = LCD_H,
.lcd_type = LCD_TYPE_SPI,
.buffer_num = BUF_NUM,
.buffer_size = LCD_BLOCK_W * LCD_BLOCK_H * 2,
.fps = 55,
.spi = {
.spi_mode = SPI_IF_MODE(LCD_DRIVE_CONFIG),
.pixel_type = PIXEL_TYPE(LCD_DRIVE_CONFIG),
.out_format = OUT_FORMAT(LCD_DRIVE_CONFIG),
.spi_dat_mode = SPI_MODE_UNIDIR,
},
.debug_mode_en = false,
.debug_mode_color = 0xff0000,
};
REGISTER_LCD_DEVICE(st77916) = {
.logo = "st77916",
.row_addr_align = 2,
.column_addr_align = 2,
.radius = SCR_W / 2,
.fill_argb = 0xffffffff,
.lcd_cmd = (void *) &lcd_spi_st77916_cmd_list_poweron,
.cmd_cnt = sizeof(lcd_spi_st77916_cmd_list_poweron) / sizeof(lcd_spi_st77916_cmd_list_poweron[0]),
.param = (void *) &lcd_spi_st77916_param,
.reset = NULL, // 没有特殊的复位操作，用内部普通复位函数即可
.backlight_ctrl = NULL,// 这款是LCD屏幕，需设置TCFG_BACKLIGHT_PWM_MODE=2调整背光
.power_ctrl = lcd_spi_st77916_power_ctrl,
.entersleep = lcd_spi_st77916_entersleep,
.exitsleep = lcd_spi_st77916_exitsleep,
.read_id = lcd_spi_st77916_read_id,
.lcd_id = 0x000000,
};
#endif
loader/update_ui/cpu/br35/ui_driver/lcd_drive/lcd_spi/lcd_spi_sh8601a_454x454.c
+297
View File
@@ -0,0 +1,297 @@
/*
** 包含board的头文件，确定baord里面开关的屏驱宏
*/
#include "app_config.h"
#include "clock_cfg.h"
#include "ui/lcd_spi/lcd_drive.h"
/*
** 驱动代码的宏开关
*/
//<<<[qspi屏 454x454]>>>//
#if TCFG_LCD_SPI_SH8601A_ENABLE
// #define LCD_DRIVE_CONFIG QSPI_RGB565_SUBMODE0_1T8B
/* #define LCD_DRIVE_CONFIG QSPI_RGB565_SUBMODE1_1T2B */
#define LCD_DRIVE_CONFIG QSPI_RGB565_SUBMODE2_1T2B
/*
** 包含imd头文件，屏驱相关的变量和结构体都定义在imd.h
*/
#include "dbi.h"
#include "includes.h"
#include "ui/ui_api.h"
#if 0
#define SCR_X 120
#define SCR_Y 110
#define SCR_W 240
#define SCR_H 240
#define LCD_W 240
#define LCD_H 240
#define LCD_BLOCK_W 240
#define LCD_BLOCK_H 60
#define BUF_NUM 2
#else
#define SCR_X 0
#define SCR_Y 0
#define SCR_W 454
#define SCR_H 454
#define LCD_W 454
#define LCD_H 454
#define LCD_BLOCK_W 454
#define LCD_BLOCK_H 80
#define BUF_NUM 2
#endif
#define LCD_FORMAT OUTPUT_FORMAT_RGB565
/*
** 初始化代码
*/
static const u8 lcd_spi_sh8601a_cmd_list_poweron[] ALIGNED(4) = {
_BEGIN_, 0xc0, 0x5a, 0x5a, _END_,
_BEGIN_, 0xc1, 0x5a, 0x5a, _END_,
_BEGIN_, 0x11, _END_,
_BEGIN_, REGFLAG_DELAY, 100, _END_,
#if (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB565)
_BEGIN_, 0x3A, 0x55, _END_,
#elif (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB666)
_BEGIN_, 0x3A, 0x66, _END_,
#elif (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB888)
_BEGIN_, 0x3A, 0x77, _END_,
#endif
_BEGIN_, 0x44, 0, 0, _END_,
_BEGIN_, 0x35, 0x00, _END_,
_BEGIN_, 0xb0, 0x16, _END_,
_BEGIN_, 0xb1, 0x01, 0x05, 0x00, 0xa2, 0x00, 0xa7, 0x00, 0xa7, 0x00, _END_,
_BEGIN_, 0x53, 0x28, _END_,
_BEGIN_, 0xc4, 0x80, _END_,
_BEGIN_, REGFLAG_DELAY, 25, _END_,
_BEGIN_, 0x29, _END_,
_BEGIN_, REGFLAG_DELAY, 20, _END_,
_BEGIN_, 0xb1, 0xc0, _END_,
_BEGIN_, 0xc0, 0xa5, 0xa5, _END_,
_BEGIN_, 0xc1, 0xa5, 0xa5, _END_,
};
static const u8 lcd_cmd_list_sleepout[] ALIGNED(4) = {
_BEGIN_, 0xc0, 0x5a, 0x5a, _END_,
_BEGIN_, 0xc1, 0x5a, 0x5a, _END_,
#if (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB565)
_BEGIN_, 0x3A, 0x55, _END_,
#elif (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB666)
_BEGIN_, 0x3A, 0x66, _END_,
#elif (OUT_FORMAT(LCD_DRIVE_CONFIG) == FORMAT_RGB888)
_BEGIN_, 0x3A, 0x77, _END_,
#endif
_BEGIN_, 0x44, 0, 0, _END_,
_BEGIN_, 0x35, 0x00, _END_,
_BEGIN_, 0xb0, 0x16, _END_,
_BEGIN_, 0xb1, 0x01, 0x05, 0x00, 0xa2, 0x00, 0xa7, 0x00, 0xa7, 0x00, _END_,
_BEGIN_, 0x53, 0x28, _END_,
_BEGIN_, 0xc4, 0x80, _END_,
_BEGIN_, 0xb1, 0xc0, _END_,
_BEGIN_, 0xc0, 0xa5, 0xa5, _END_,
_BEGIN_, 0xc1, 0xa5, 0xa5, _END_,
};
extern struct lcd_spi_platform_data *lcd_get_platform_data();
void lcd_send_cmd_enable()
{
u8 para[2];
para[0] = 0x5a;
para[1] = 0x5a;
lcd_write_cmd(0xc0, para, 2);
lcd_write_cmd(0xc1, para, 2);
}
void lcd_send_cmd_disable()
{
u8 para[2];
para[0] = 0xa5;
para[1] = 0xa5;
lcd_write_cmd(0xc0, para, 2);
lcd_write_cmd(0xc1, para, 2);
}
static void lcd_adjust_display_brightness(u8 percent)
{
u16 brightness;
u8 para[2];
brightness = percent * 0x3ff / 100;
para[0] = brightness & 0xff;
para[1] = (brightness >> 8) & 0x3;
lcd_write_cmd(0x51, para, 2);
/* lcd_write_cmd(0x4a, para, 2); //Brightness Value of AOD Mode, 无效果 */
/* lcd_write_cmd(0x63, para, 2); //Brightness Value of HBM Mode, 无效果 */
}
/*
** lcd背光控制
** 考虑到手表应用lcd背光控制需要更灵活自由，可能需要pwm调光，随时亮灭等
** 因此内部不操作lcd背光，全部由外部自行控制
*/
static int lcd_spi_sh8601a_backlight_ctrl(u8 percent)
{
if (percent) {
lcd_write_cmd(0x29, NULL, 0);
if (percent <= 20) {
lcd_adjust_display_brightness(1);
} else if (percent <= 40) {
lcd_adjust_display_brightness(3);
} else if (percent <= 60) {
lcd_adjust_display_brightness(6);
} else if (percent <= 80) {
lcd_adjust_display_brightness(10);
} else if (percent <= 100) {
lcd_adjust_display_brightness(100);
}
/* g_printf("lcd backlight percent:%d",percent); */
} else {
lcd_write_cmd(0x28, NULL, 0);
}
return 0;
}
/*
** lcd电源控制
*/
static int lcd_spi_sh8601a_power_ctrl(u8 onoff)
{
// extern void wdt_clear();
// wdt_clear();
lcd_en_ctrl(onoff);
return 0;
}
#define DEEP_STANDBY 1
/*
** 设置lcd进入睡眠
*/
static void lcd_spi_sh8601a_entersleep(void)
{
u8 dstb = 0x01;
lcd_write_cmd(0x28, NULL, 0);
lcd_write_cmd(0x10, NULL, 0);
delay_2ms(120 / 2); // delay 120ms
#if DEEP_STANDBY
lcd_write_cmd(0x4f, &dstb, sizeof(dstb));
delay_2ms(102 / 2); // delay 120ms
struct lcd_platform_data *lcd_dat = lcd_get_platform_data();
if (lcd_dat->pin_te != NO_CONFIG_PORT) {
gpio_set_pull_up(lcd_dat->pin_te, 0);
gpio_set_pull_down(lcd_dat->pin_te, 0);
gpio_direction_input(lcd_dat->pin_te);
gpio_set_die(lcd_dat->pin_te, 0);
}
#endif
}
/*
** 设置lcd退出睡眠
*/
static void lcd_spi_sh8601a_exitsleep(void)
{
#if DEEP_STANDBY
struct lcd_platform_data *lcd_dat = lcd_get_platform_data();
if (lcd_dat && lcd_dat->pin_reset) {
gpio_direction_output(lcd_dat->pin_reset, 0);
delay_2ms(4); // delay >5ms
gpio_direction_output(lcd_dat->pin_reset, 1);
delay_2ms(4); // delay >5ms
}
lcd_write_cmd(0x11, NULL, 0);
delay_2ms(5);
lcd_write_cmd(0x29, NULL, 0);
delay_2ms(5);
extern struct imd_param lcd_spi_sh8601a_param;
lcd_init(&lcd_spi_sh8601a_param);
lcd_drv_cmd_list(lcd_cmd_list_sleepout, sizeof(lcd_cmd_list_sleepout) / sizeof(lcd_cmd_list_sleepout[0]));
#else
lcd_write_cmd(0x11, NULL, 0);
delay_2ms(5); // delay 120ms
lcd_write_cmd(0x29, NULL, 0);
#endif
}
struct imd_param lcd_spi_sh8601a_param = {
.scr_x = SCR_X,
.scr_y = SCR_Y,
.scr_w = SCR_W,
.scr_h = SCR_H,
.in_width = SCR_W,
.in_height = SCR_H,
.in_format = LCD_FORMAT,
.lcd_width = LCD_W,
.lcd_height = LCD_H,
.lcd_type = LCD_TYPE_SPI,
.buffer_num = BUF_NUM,
.buffer_size = LCD_BLOCK_W * LCD_BLOCK_H * 2,
.fps = 60,
.spi = {
.spi_mode = SPI_IF_MODE(LCD_DRIVE_CONFIG),
.pixel_type = PIXEL_TYPE(LCD_DRIVE_CONFIG),
.out_format = OUT_FORMAT(LCD_DRIVE_CONFIG),
.port = SPI_PORTA,
.spi_dat_mode = SPI_MODE_UNIDIR,
},
.debug_mode_en = false,
.debug_mode_color = 0xff0000,
};
REGISTER_LCD_DEVICE() = {
.logo = "sh8601",
.row_addr_align = 2,
.column_addr_align = 2,
.lcd_cmd = (void *) &lcd_spi_sh8601a_cmd_list_poweron,
.cmd_cnt = sizeof(lcd_spi_sh8601a_cmd_list_poweron) / sizeof(lcd_spi_sh8601a_cmd_list_poweron[0]),
.param = (void *) &lcd_spi_sh8601a_param,
.reset = NULL, // 没有特殊的复位操作，用内部普通复位函数即可
.backlight_ctrl = lcd_spi_sh8601a_backlight_ctrl,
.power_ctrl = lcd_spi_sh8601a_power_ctrl,
.entersleep = lcd_spi_sh8601a_entersleep,
.exitsleep = lcd_spi_sh8601a_exitsleep,
};
#endif
loader/update_ui/cpu/br35/ui_entry.c
+411
View File
@@ -0,0 +1,411 @@
#include "typedef.h"
#include "app_config.h"
#include "ui.h"
#include "generic/gpio.h"
#include "ui/lcd_spi/lcd_drive.h"
#include "update_status.h"
struct _user_api_param_t {
u8 version; //版本号：0
u8 progress_bar; //等待中的循环进度，可用于ui显示
u8 addr[6]; //蓝牙地址
} user_api_param;
extern int _bss_begin[];
extern int _bss_size[];
extern void draw_ring(int center_x, int center_y, int radius, u16 color, int percent);
extern void ui_buffer_init(u8 * buf, u32 len);
ex_api_t *p_ex_api = NULL;
static void (*my_irq_enable)(void) = NULL;
static void (*my_irq_disable)(void) = NULL;
static void (*my_mdelay)(u32) = NULL;
typedef struct _user_api_t {
char magic[8];
void (*ex_api_reg_hdl)(ex_api_t *api);
void (*ui_disp_hdl)(UPDATA_STATUS st, u32 param);
} user_api_t;
struct ui_display {
struct lcd_interface *lcd;
};
static struct ui_display display = {0};
#define __this (&display)
enum ui_devices_type {
LED_7,
LCD_SEG3X9,
TFT_LCD,//²ÊÆÁ
DOT_LCD,//µãÕóÆÁ
};
//°å¼¶ÅäÖÃÊý¾Ý½á¹¹
struct ui_devices_cfg {
enum ui_devices_type type;
void *private_data;
};
LCD_SPI_PLATFORM_DATA_BEGIN(lcd_spi_data)
.pin_reset = TCFG_LCD_PIN_RESET,
.pin_cs = TCFG_LCD_PIN_CS,
.pin_bl = TCFG_LCD_PIN_BL,
.pin_dc = TCFG_LCD_PIN_DC,
.pin_en = TCFG_LCD_PIN_EN,
.pin_en_ex = TCFG_LCD_PIN_EN_EX,
.pin_te = TCFG_LCD_PIN_TE,
LCD_SPI_PLATFORM_DATA_END()
const struct ui_devices_cfg ui_cfg_data = {
.type = TFT_LCD,
.private_data = (void *) &lcd_spi_data,
};
void my_irq_enable_func(void)
{
if (my_irq_enable) {
my_irq_enable();
}
}
void my_irq_disable_func(void)
{
if (my_irq_disable) {
my_irq_disable();
}
}
int printf(const char *format, ...){
#if LOG_DEBUG_ENABLE
if(p_ex_api && p_ex_api->print){
va_list args;
va_start(args, format);
int ret = p_ex_api->print(0,format, args);
va_end(args);
return ret;
}
#endif//LOG_DEBUG_ENABLE
return 0;
}
void put_buf(const u8 *buf, u32 len)
{
int i;
for (i = 0; i < len; i++) {
if (i && (i % 0x10 == 0)) {
printf(" \n");
}
printf("%02x ", buf[i]);
}
printf(" \n");
}
int puts(const char *out){
return 0;
}
int sprintf(char *out, const char *format, ...){
if(p_ex_api && p_ex_api->print){
va_list args;
va_start(args, format);
int ret = p_ex_api->print(&out,format, args);
va_end(args);
return ret;
}
return 0;
}
void delay_2ms(int cnt)
{
int count;
for (int i = 0; i < cnt; i++) {
if (my_mdelay) {
my_mdelay(2);
} else {
count = 110 * 50;
while (count--) {
__asm__ volatile("nop");
__asm__ volatile("nop");
__asm__ volatile("nop");
}
}
}
}
static void delay_nop(int cnt)
{
while (cnt--) {
__asm__ volatile("nop");
}
}
static void ui_flash_handler(void)
{
if (p_ex_api && p_ex_api->printf) {
p_ex_api->printf("@");
}
}
/***************************************************
ÆÁ³õʼ»¯
***************************************************/
void lcd_screen_init(void *arg)
{
printf("%s now!!!\n",__func__);
struct lcd_info info = {0};
//»ñÈ¡lcd²Ù×÷¾ä±ú
__this->lcd = lcd_get_hdl();
ASSERT(__this->lcd);
//ÖØгõʼ»¯ÆÁÄ»
if (__this->lcd->power_ctrl) {
__this->lcd->power_ctrl(true);
}
//³õʼ»¯Ó²¼þ¡¢ÆÁÄ»
if (__this->lcd->init) {
__this->lcd->init(arg);
}
if (__this->lcd->get_screen_info) {
__this->lcd->get_screen_info(&info);
}
//ÇåÆÁÄ»
if (__this->lcd->clear_screen) {
__this->lcd->clear_screen(0x000000,0,info.width-1,0,info.height-1);
}
//µ÷ÁÁ¶È
if (__this->lcd->backlight_ctrl) {
__this->lcd->backlight_ctrl(100);
}
//ÉêÇëÆÁÄ»buf
if (__this->lcd->buffer_malloc) {
u8 *buf = NULL;
u32 len;
__this->lcd->buffer_malloc(&buf, &len);
//Ìí¼Óbuffer¹ÜÀí
ui_buffer_init(buf, len);
}
printf("%s succ!!!\n",__func__);
}
extern u8 update_text_buf[10][20];
#define DRAW_POINT_MAX 10
static void ui_disp(UPDATA_STATUS st, u32 param)
{
printf("[%s] st : %d, param : %d\n", __FUNCTION__, st, param);
struct lcd_info info = {0};
__this->lcd = lcd_get_hdl();
if (__this->lcd && __this->lcd->get_screen_info) {
__this->lcd->get_screen_info(&info);
ASSERT(info.width*info.height);
}
static u8 last_status = 0;
int text_x,text_y,text_width,text_height;
u8 str_buf[32] = {0};
int i = 0;
switch (st) {
case UPDATE_PROCESS:
printf("UPDATE_PROCESS.\n");
draw_ring(info.width/2, info.height/2, info.width/2, 0x07e0, param / 100);
break;
case UPDATE_START:
printf("UPDATE_START.param:%d\n",param);
if(param == 0){
ui_draw_rect(0,0,info.width,info.height,0);
draw_ring(info.width/2, info.height/2, info.width/2, 0x07e0, 0);
}else if(param == 1){
ui_draw_rect(0,0,info.width,info.height,0);
get_text_rect(&update_text_buf[7][0],strlen(&update_text_buf[7][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
text_x = (text_x<0) ? 0:text_x;
text_y = info.height/2 - text_height/2;
ui_draw_text(text_x,text_y,text_width,text_height,0xffff,&update_text_buf[7][0],strlen(&update_text_buf[7][0]));
}else if(param == 2){
ui_draw_rect(0,0,info.width,info.height,0);
get_text_rect(&update_text_buf[8][0],strlen(&update_text_buf[8][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
text_x = (text_x<0) ? 0:text_x;
text_y = info.height/2 - text_height/2;
ui_draw_text(text_x,text_y,text_width,text_height,0xffff,&update_text_buf[8][0],strlen(&update_text_buf[8][0]));
}
break;
case UPDATE_STOP:
printf("UPDATE_STOP.\n");
if (param == UPDATE_ERR_NONE) {
} else {
printf("error code:0x%x\n", param);
}
break;
case EX_API_UPDATE_TIPS_WAIT_CONN:
if((!user_api_param.progress_bar)||(last_status!=st))
{
ui_draw_rect(0,0,info.width,info.height,0);
}
printf("EX_API_UPDATE_TIPS_WAIT_CONN\n");
printf("ADDR:%X:%X:%X:%X:%X:%X",user_api_param.addr[0],user_api_param.addr[1],user_api_param.addr[2],user_api_param.addr[3],user_api_param.addr[4],user_api_param.addr[5]);
memcpy(&user_api_param,param,sizeof(struct _user_api_param_t));
get_text_rect(&update_text_buf[0][0],strlen(&update_text_buf[0][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,100,text_width,text_height,0xffff,&update_text_buf[0][0],strlen(&update_text_buf[0][0]));
memcpy(str_buf, &update_text_buf[4][0],strlen(&update_text_buf[4][0]));
bt_addr_to_str(&str_buf[strlen(str_buf)],user_api_param.addr);
// printf("str_buf[%d]",strlen(str_buf));
// put_buf(str_buf,strlen(str_buf));
get_text_rect(str_buf,strlen(str_buf), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,160,text_width,text_height,0xffff,str_buf,strlen(str_buf));
for(i = 0;i < user_api_param.progress_bar;i++){
get_text_rect(&update_text_buf[6][0],strlen(&update_text_buf[6][0]), &text_width, &text_height);
ui_draw_text(50 + (text_width+5) * i,220,text_width,text_height,0xffff,&update_text_buf[6][0],strlen(&update_text_buf[6][0]));
}
break;
case EX_API_UPDATE_TIPS_WAIT_UPDATE:
if((!user_api_param.progress_bar)||(last_status!=st))
{
ui_draw_rect(0,0,info.width,info.height);
}
printf("EX_API_UPDATE_TIPS_WAIT_UPDATE\n");
memcpy(&user_api_param,param,sizeof(struct _user_api_param_t));
get_text_rect(&update_text_buf[1][0],strlen(&update_text_buf[1][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,100,text_width,text_height,0xffff,&update_text_buf[1][0],strlen(&update_text_buf[1][0]));
memcpy(str_buf, &update_text_buf[4][0],strlen(&update_text_buf[4][0]));
bt_addr_to_str(&str_buf[strlen(str_buf)],user_api_param.addr);
get_text_rect(str_buf,strlen(str_buf), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,160,text_width,text_height,0xffff,str_buf,strlen(str_buf));
for(i = 0;i < user_api_param.progress_bar;i++){
get_text_rect(&update_text_buf[6][0],strlen(&update_text_buf[6][0]), &text_width, &text_height);
ui_draw_text(50 + (text_width+5) * i,220,text_width,text_height,0xffff,&update_text_buf[6][0],strlen(&update_text_buf[6][0]));
}
break;
case EX_API_UPDATE_TIPS_WAIT_START_UPDATE:
if((!user_api_param.progress_bar)||(last_status!=st))
{
ui_draw_rect(0,0,info.width,info.height);
}
printf("EX_API_UPDATE_TIPS_WAIT_START_UPDATE\n");
memcpy(&user_api_param,param,sizeof(struct _user_api_param_t));
get_text_rect(&update_text_buf[2][0],strlen(&update_text_buf[2][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,80,text_width,text_height,0xffff,&update_text_buf[2][0],strlen(&update_text_buf[2][0]));
get_text_rect(&update_text_buf[3][0],strlen(&update_text_buf[3][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,140,text_width,text_height,0xffff,&update_text_buf[3][0],strlen(&update_text_buf[3][0]));
memcpy(str_buf, &update_text_buf[4][0],strlen(&update_text_buf[4][0]));
bt_addr_to_str(&str_buf[strlen(str_buf)],user_api_param.addr);
//put_buf(str_buf,strlen(str_buf));
get_text_rect(str_buf,strlen(str_buf), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,200,text_width,text_height,0xffff,str_buf,strlen(str_buf));
for(i = 0;i < user_api_param.progress_bar;i++){
get_text_rect(&update_text_buf[6][0],strlen(&update_text_buf[6][0]), &text_width, &text_height);
ui_draw_text(50 + (text_width+5) * i,260,text_width,text_height,0xffff,&update_text_buf[6][0],strlen(&update_text_buf[6][0]));
}
break;
case EX_API_UPDATE_TIPS_UPDATEING:
printf("EX_API_UPDATE_TIPS_UPDATEING\n");
memcpy(&user_api_param,param,sizeof(struct _user_api_param_t));
if((last_status!=st))
{
ui_draw_rect(0,0,info.width,info.height,0);
get_text_rect(&update_text_buf[9][0],strlen(&update_text_buf[9][0]), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,100,text_width,text_height,0xffff,&update_text_buf[9][0],strlen(&update_text_buf[9][0]));
memcpy(str_buf, &update_text_buf[4][0],strlen(&update_text_buf[4][0]));
bt_addr_to_str(&str_buf[strlen(str_buf)],user_api_param.addr);
put_buf(str_buf,strlen(str_buf));
get_text_rect(str_buf,strlen(str_buf), &text_width, &text_height);
text_x = info.width/2 - text_width/2;
ui_draw_text(text_x,160,text_width,text_height,0xffff,str_buf,strlen(str_buf));
// get_text_rect(&update_text_buf[6][0],strlen(&update_text_buf[6][0]), &text_width, &text_height);
// for(int point = 0;point<DRAW_POINT_MAX;point++){
// ui_draw_text(100 + (text_width+4) * point,320,text_width,text_height,0xffff,&update_text_buf[6][0],strlen(&update_text_buf[6][0]));
// }
}
//printf("%x %x %x %x",update_text_buf[9][0],update_text_buf[9][1],update_text_buf[9][2],update_text_buf[9][3]);
int count = user_api_param.progress_bar % (2*DRAW_POINT_MAX);
get_text_rect(&update_text_buf[6][0],strlen(&update_text_buf[6][0]), &text_width, &text_height);
if(count%2 == 1){
ui_draw_text(50 + (text_width+5) * count/2,220,text_width,text_height,0xffff,&update_text_buf[6][0],strlen(&update_text_buf[6][0]));
}else{
ui_draw_rect(50 + (text_width+5) * count/2,220,text_width,text_height,0);
}
default:
break;
}
last_status = st;
}
//ÓÉota loaderµ÷Óã¬Íê³É½Ó¿ÚºÍÆÁÄ»³õʼ»¯
static void ex_api_register(ex_api_t *api)
{
p_ex_api = api;
printf("bss_begin :0x%x, bss_size : 0x%x\n", _bss_begin, _bss_size);
//p_ex_api->printf("bss_begin :0x%x, bss_size : 0x%x\n", _bss_begin, _bss_size);
//memset((void *)_bss_begin, 0, (int)_bss_size);
//printf("[%s] 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", __FUNCTION__, api->printf, api->put_buf, api->sys_timer_add, api->sys_timeout_add, api->sys_timer_del, api->irq_disable, api->irq_enable, api->mdelay, api->request_irq_func);
if (api->irq_disable) {
my_irq_disable = api->irq_disable;
}
if (api->irq_enable) {
my_irq_enable = api->irq_enable;
}
if (api->mdelay) {
my_mdelay = api->mdelay;
}
lcd_screen_init(&ui_cfg_data);
//printf("%s %d\n", __func__, __LINE__);
//draw_ring(160, 160, 160, 0x07e0, 100);//²ÎÊý ÊäÈ룺x×ø±ê ¡¢y×ø±ê¡¢°ë¾¶¡¢ÑÕÉ«¡¢°Ù·Ö°Ù(0~100)
//printf("%s %d\n", __func__, __LINE__);
};
__attribute__((section(".api_tab"), used))
static const user_api_t user_api_ins = {
.magic = {'E', 'X', 'A', 'P',},
.ex_api_reg_hdl = ex_api_register,
.ui_disp_hdl = ui_disp,
};
loader/update_ui/include/app_config.h
+109
View File
@@ -0,0 +1,109 @@
#ifndef __APP_CONFIG_H
#define __APP_CONFIG_H
#include "asm/includes.h"
#define NO_CONFIG_PORT (-1)
//*********************************************************************************//
// 配置开始 //
//*********************************************************************************//
#define ENABLE_THIS_MOUDLE 1
#define DISABLE_THIS_MOUDLE 0
#define ENABLE 1
#define DISABLE 0
//*********************************************************************************//
// 公共配置 //
//*********************************************************************************//
#define LOG_DEBUG_ENABLE 1
//*********************************************************************************//
// 屏驱配置 //
//*********************************************************************************//
#define TCFG_SPI_LCD_ENABLE ENABLE_THIS_MOUDLE//总开关
//屏io配置
#define TCFG_LCD_PIN_RESET IO_PORTC_03
#define TCFG_LCD_PIN_CS IO_PORTA_06
#define TCFG_LCD_PIN_BL IO_LCD_PG
#define TCFG_LCD_PIN_DC NO_CONFIG_PORT
#define TCFG_LCD_PIN_EN IO_PORTC_01
#define TCFG_LCD_PIN_EN_EX IO_PORTC_02
#define TCFG_LCD_PIN_TE IO_PORTC_00
//屏驱配置
#define TCFG_LCD_SPI_SH8601A_ENABLE DISABLE
#define TCFG_LCD_QSPI_ST77903_V1_ENABLE DISABLE
#define TCFG_LCD_SPI_ST77916_ENABLE ENABLE
#define TCFG_TFT_LCD_DEV_SPI_HW_NUM 0 //选择spi 0 ：spi0 1：spi1 2：spi2 驱动使用
//多屏驱模式定义
#define LCD_MATCH_BY_LOGO 0 //定义通过屏驱logo匹配
#define LCD_MATCH_BY_ID 1 //定义通过屏幕id匹配
//多屏驱模式配置
#define TCFG_LCD_MATCH_MODE LCD_MATCH_BY_LOGO
#define LCD_LOGO "null"
//根据选择的spi 开启对应于spi项目
//*********************************************************************************//
// 硬件SPI 配置 //
//*********************************************************************************//
#define TCFG_HW_SPI0_ENABLE ENABLE_THIS_MOUDLE
//A组IO: DI: PD2 DO: PD1 CLK: PD0 D2:PB7 D3:PD5
//B组IO: DI: PA14 DO: PD1 CLK: PD0 D2:PA15 D3:PD5
//C组IO: DI: PA6 DO: PA8 CLK: PA3 D2:PA7 D3:PA2
//D组IO: DI: PB8 DO: PB10 CLK: PB5 D2:PB9 D3:PB4
#define TCFG_HW_SPI0_PORT 'C'
#define TCFG_HW_SPI0_BAUD 24000000L
#define TCFG_HW_SPI0_MODE SPI_MODE_BIDIR_1BIT //SPI_MODE_UNIDIR_1BIT//
#define TCFG_HW_SPI0_ROLE SPI_ROLE_MASTER
#define TCFG_HW_SPI1_ENABLE DISABLE_THIS_MOUDLE
//A组IO: DI: PB2 DO: PB1 CLK: PB0
//B组IO: DI: PC3 DO: PC5 CLK: PC4
#define TCFG_HW_SPI1_PORT 'B'
#define TCFG_HW_SPI1_BAUD 24000000L
#define TCFG_HW_SPI1_MODE SPI_MODE_BIDIR_1BIT
#define TCFG_HW_SPI1_ROLE SPI_ROLE_MASTER
#define TCFG_HW_SPI2_ENABLE DISABLE_THIS_MOUDLE
//A组IO: DI: PB8 DO: PB10 CLK: PB9
//B组IO: DI: PA13 DO: DM CLK: DP
#define TCFG_HW_SPI2_PORT 'A'
#define TCFG_HW_SPI2_BAUD 48000000L
#define TCFG_HW_SPI2_MODE SPI_MODE_BIDIR_1BIT
#define TCFG_HW_SPI2_ROLE SPI_ROLE_MASTER
#define SPI0_ENABLE TCFG_HW_SPI0_ENABLE //是否使能SPI0，使能后需定义spi0_p_data
#define SPI1_ENABLE TCFG_HW_SPI1_ENABLE //是否使能SPI1，使能后需定义spi1_p_data
#define SPI2_ENABLE TCFG_HW_SPI2_ENABLE //是否使能SPI2，使能后需定义spi2_p_data
typedef struct _export_api_t {
//debug接口
int (*printf)(const char *format, ...);
int (*print)(char **out, const char *format, va_list args);
void (*put_buf)(const u8 *buf, u32 len);
u16(*sys_timer_add)(void *priv, void (*func)(void *priv), u32 msec);
u16(*sys_timeout_add)(void *priv, void (*func)(void *priv), u32 msec);
void (*sys_timer_del)(u16 t);
void (*irq_disable)(void);
void (*irq_enable)(void);
void (*mdelay)(u32 msec);
void (*request_irq_func)(u8 index, u8 priority, void (*handler)(void), u8 cpu_id);
} ex_api_t;
extern ex_api_t *p_ex_api;
#if LOG_DEBUG_ENABLE
#define LCD_PRINTF if(p_ex_api && p_ex_api->printf ) \
p_ex_api->printf
#else
#define LCD_PRINTF
#endif // LOG_DEBUG_ENABLE
#endif
loader/update_ui/include/ui.h
+6
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@@ -0,0 +1,6 @@
#ifndef __UI_H
#define __UI_H
#endif//__UI_H
loader/update_ui/include/ui/lcd_spi/lcd_drive.h
+306
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@@ -0,0 +1,306 @@
#ifndef __SPI_LCD_DRIVER_H
#define __SPI_LCD_DRIVER_H
//#include "asm/spi.h"
#ifdef Reset
#undef Reset
#endif
#ifndef SPI_LCD_DEBUG_ENABLE
#define SPI_LCD_DEBUG_ENABLE 0
#endif
#if (SPI_LCD_DEBUG_ENABLE == 0)
#define lcd_d(...)
#define lcd_w(...)
#define lcd_e(fmt, ...) printf("[LCD ERROR]: "fmt, ##__VA_ARGS__)
#elif (SPI_LCD_DEBUG_ENABLE == 1)
#define lcd_d(...)
#define lcd_w(fmt, ...) printf("[LCD WARNING]: "fmt, ##__VA_ARGS__)
#define lcd_e(fmt, ...) printf("[LCD ERROR]: "fmt, ##__VA_ARGS__)
#else
#define lcd_d(fmt, ...) printf("[LCD DEBUG]: "fmt, ##__VA_ARGS__)
#define lcd_w(fmt, ...) printf("[LCD WARNING]: "fmt, ##__VA_ARGS__)
#define lcd_e(fmt, ...) printf("[LCD ERROR]: "fmt, ##__VA_ARGS__)
#endif
// 注意：以下配置组合为固定搭配，不可随意更改
// 切换配置使用上面的宏选择
#if defined(CONFIG_CPU_BR28) || defined(CONFIG_CPU_BR35)||1
#include "app_config.h"
#define SPI_SUBMODE(config) (((config)>>16)&0xf0)
#define SPI_WIRE(config) (((config)>>16)&0x0f)
#define PIXEL_nPnT(config) (((config))&0xe0)
#define PIXEL_nTnB(config) (((config))&0x1f)
#define SPI_IF_MODE(config) (((config)>>16)&0xff)
#define OUT_FORMAT(config) (((config)>>8)&0xff)
#define PIXEL_TYPE(config) (((config))&0xff)
#define LCD_CONFIG(mode, format, type) (((mode)<<16) | ((format)<<8) | (type))
/////////////////////////////////////////////spi 3wire///////////////////////////////////////////////
#define SPI_3WIRE_RGB888_1T8B LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T8B)
#define SPI_3WIRE_RGB888_1T24B LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB888, PIXEL_1P1T|PIXEL_1T24B)
#define SPI_3WIRE_RGB666_1T8B LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T8B)
#define SPI_3WIRE_RGB666_1T18B LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB666, PIXEL_1P1T|PIXEL_1T18B)
#define SPI_3WIRE_RGB565_1T8B LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T8B)
#define SPI_3WIRE_RGB565_1T16B LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB565, PIXEL_1P1T|PIXEL_1T16B)
/////////////////////////////////////////////spi 4wire///////////////////////////////////////////////
#define SPI_4WIRE_RGB888_1T8B LCD_CONFIG(SPI_MODE|SPI_WIRE4, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T8B)
#define SPI_4WIRE_RGB888_1T24B LCD_CONFIG(SPI_MODE|SPI_WIRE4, FORMAT_RGB888, PIXEL_1P1T|PIXEL_1T24B)
#define SPI_4WIRE_RGB666_1T8B LCD_CONFIG(SPI_MODE|SPI_WIRE4, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T8B)
#define SPI_4WIRE_RGB666_1T18B LCD_CONFIG(SPI_MODE|SPI_WIRE4, FORMAT_RGB666, PIXEL_1P1T|PIXEL_1T18B)
#define SPI_4WIRE_RGB565_1T8B LCD_CONFIG(SPI_MODE|SPI_WIRE4, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T8B)
#define SPI_4WIRE_RGB565_1T16B LCD_CONFIG(SPI_MODE|SPI_WIRE4, FORMAT_RGB565, PIXEL_1P1T|PIXEL_1T16B)
////////////////////////////////////////////dspi 3wire///////////////////////////////////////////////
#define DSPI_3WIRE_RGB565_1T8B LCD_CONFIG(DSPI_MODE|SPI_WIRE3, FORMAT_RGB565, PIXEL_1P1T|PIXEL_1T8B)
#define DSPI_3WIRE_RGB666_1T9B LCD_CONFIG(DSPI_MODE|SPI_WIRE3, FORMAT_RGB666, PIXEL_1P1T|PIXEL_1T9B)
#define DSPI_3WIRE_RGB666_1T6B LCD_CONFIG(DSPI_MODE|SPI_WIRE3, FORMAT_RGB666, PIXEL_2P3T|PIXEL_1T6B)
#define DSPI_3WIRE_RGB888_1T12B LCD_CONFIG(DSPI_MODE|SPI_WIRE3, FORMAT_RGB888, PIXEL_1P1T|PIXEL_1T12B)
#define DSPI_3WIRE_RGB888_1T8B LCD_CONFIG(DSPI_MODE|SPI_WIRE3, FORMAT_RGB888, PIXEL_2P3T|PIXEL_1T8B)
////////////////////////////////////////////dspi 4wire///////////////////////////////////////////////
#define DSPI_4WIRE_RGB565_1T8B LCD_CONFIG(DSPI_MODE|SPI_WIRE4, FORMAT_RGB565, PIXEL_1P1T|PIXEL_1T8B)
#define DSPI_4WIRE_RGB666_1T9B LCD_CONFIG(DSPI_MODE|SPI_WIRE4, FORMAT_RGB666, PIXEL_1P1T|PIXEL_1T9B)
#define DSPI_4WIRE_RGB666_1T6B LCD_CONFIG(DSPI_MODE|SPI_WIRE4, FORMAT_RGB666, PIXEL_2P3T|PIXEL_1T6B)
#define DSPI_4WIRE_RGB888_1T12B LCD_CONFIG(DSPI_MODE|SPI_WIRE4, FORMAT_RGB888, PIXEL_1P1T|PIXEL_1T12B)
#define DSPI_4WIRE_RGB888_1T8B LCD_CONFIG(DSPI_MODE|SPI_WIRE4, FORMAT_RGB888, PIXEL_2P3T|PIXEL_1T8B)
///////////////////////////////////////////////qspi//////////////////////////////////////////////////
#define QSPI_RGB565_SUBMODE0_1T8B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE0, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T8B)
#define QSPI_RGB666_SUBMODE0_1T8B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE0, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T8B)
#define QSPI_RGB888_SUBMODE0_1T8B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE0, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T8B)
#define QSPI_RGB565_SUBMODE1_1T2B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE1, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T2B)
#define QSPI_RGB666_SUBMODE1_1T2B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE1, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB888_SUBMODE1_1T2B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE1, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB565_SUBMODE2_1T2B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE2, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T2B)
#define QSPI_RGB666_SUBMODE2_1T2B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE2, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB888_SUBMODE2_1T2B LCD_CONFIG(QSPI_MODE|QSPI_SUBMODE2, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB565_ST77903_1T2B LCD_CONFIG(QSPI_MODE|QSPI_ST77903, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T2B)
#define QSPI_RGB666_ST77903_1T2B LCD_CONFIG(QSPI_MODE|QSPI_ST77903, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB888_ST77903_1T2B LCD_CONFIG(QSPI_MODE|QSPI_ST77903, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB565_FT2388_1T2B LCD_CONFIG(QSPI_MODE|QSPI_FT2388, FORMAT_RGB565, PIXEL_1P2T|PIXEL_1T2B)
#define QSPI_RGB666_FT2388_1T2B LCD_CONFIG(QSPI_MODE|QSPI_FT2388, FORMAT_RGB666, PIXEL_1P3T|PIXEL_1T2B)
#define QSPI_RGB888_FT2388_1T2B LCD_CONFIG(QSPI_MODE|QSPI_FT2388, FORMAT_RGB888, PIXEL_1P3T|PIXEL_1T2B)
#define RGB_SPI_3WIRE_RGB565 LCD_CONFIG(SPI_MODE|SPI_WIRE3, FORMAT_RGB565, 0)
#define MCU_8BITS_RGB565 LCD_CONFIG(0, FORMAT_RGB565, 0)
#define MCU_8BITS_RGB666 LCD_CONFIG(0, FORMAT_RGB666, 0)
#define MCU_8BITS_RGB888 LCD_CONFIG(0, FORMAT_RGB888, 0)
#endif // #if defined(CONFIG_CPU_BR28)
//////////////////////////////lcd mode end///////////////////////////
//~~~~~~~~~~~~~~~~~~~~~~~屏驱相关的参数和结构体~~~~~~~~~~~~~~~~~~~~~~~~~~//
//
#ifndef REGFLAG_DELAY
#define REGFLAG_DELAY_FLAG 0xff5aa5ff
#define REGFLAG_DELAY ((REGFLAG_DELAY_FLAG>>24)&0xff),((REGFLAG_DELAY_FLAG>>16)&0xff),((REGFLAG_DELAY_FLAG>>8)&0xff),(REGFLAG_DELAY_FLAG&0xff)
#endif
#ifndef REGFLAG_CONFIRM
#define REGFLAG_CONFIRM_FLAG 0xff5bb5ff
#define REGFLAG_CONFIRM ((REGFLAG_CONFIRM_FLAG>>24)&0xff),((REGFLAG_CONFIRM_FLAG>>16)&0xff),((REGFLAG_CONFIRM_FLAG>>8)&0xff),(REGFLAG_CONFIRM_FLAG&0xff)
#endif
// 区分屏幕初始化代码开始和结束的标志
#define BEGIN_FLAG 0x12345678
#define END_FLAG 0x87654321
#define _BEGIN_ ((BEGIN_FLAG>>24)&0xff),((BEGIN_FLAG>>16)&0xff),((BEGIN_FLAG>>8)&0xff),(BEGIN_FLAG&0xff)
#define _END_ ((END_FLAG>>24)&0xff),((END_FLAG>>16)&0xff),((END_FLAG>>8)&0xff),(END_FLAG&0xff)
// 初始化代码结构体
struct lcd_cmd {
u8 addr; // 地址
u8 param_cnt; // 参数个数
u8 param[64]; // 参数
};
/* 定义初始化数据结构体 */
typedef struct {
u8 cmd; // 地址
u8 cnt; // 数据个数
u8 dat[64]; // 数据
} InitCode;
struct spi_lcd_init {
char *name; // 名称
u8 spi_pending;
u8 soft_spi;
u16 lcd_width;
u16 lcd_height;
u8 color_format;
u8 interface;
u8 column_addr_align;
u8 row_addr_align;
u8 backlight_status;
u8 *dispbuf;
u32 bufsize;
InitCode *initcode; // 初始化代码
u16 initcode_cnt; // 初始化代码条数
void (*Init)(void);
void (*WriteComm)(u16 cmd); // 写命令
void (*WriteData)(u16 dat); // 写数据
void (*WriteMap)(char *map, int size); // 写整个buf
void (*WritePAGE)(char *map, u8 page_star, u8 page_len); // 写page
void (*SetDrawArea)(int, int, int, int);
void (*Reset)(void);
void (*BackLightCtrl)(u8);
void (*EnterSleep)();
void (*ExitSleep)();
};
struct lcd_drive {
char *logo;
u8 column_addr_align;
u8 row_addr_align;
// 初始化寄存器
u8 *lcd_cmd;
int cmd_cnt;
//显存
u8 *lcd_buf;
u8 *lcd_dbuf[2];
u8 lcd_dbuf_index;
u8 lcd_buf_num;
u32 lcd_buf_size;
u8 lcd_busy;
u8 lcd_exit;
u8 lcd_enter;
u8 lcd_switch_mode;
// 显示形状描述
u16 radius; // 圆角半径
u32 fill_argb; // 不显示区域填充色
// 配置参数
void *param;
// 应用层函数
void (*reset)(void); /* 复位函数 */
int (*backlight_ctrl)(u8);
int (*power_ctrl)(u8);
void (*entersleep)(void);
void (*exitsleep)(void);
u32(*read_id)(void);
u32 lcd_id; //屏幕id
};
#define REGISTER_LCD_DEVICE(lcd) \
struct lcd_drive lcd sec(.lcd_device_info) __attribute__((used))
extern struct lcd_drive lcd_device_begin[];
extern struct lcd_drive lcd_device_end[];
struct lcd_platform_data {
u32 pin_reset;
u32 pin_cs;
u32 pin_dc;
u32 pin_en;
u32 pin_en_ex;
u32 pin_bl;
u32 pin_te;
};
// LCD 初始化接口
#define REGISTER_LCD_DRIVE() \
const struct spi_lcd_init dev_drive
enum LCD_COLOR {
LCD_COLOR_RGB888,
LCD_COLOR_RGB565,
LCD_COLOR_MONO,
};
enum LCD_IF {
LCD_SPI,
LCD_MCU,
LCD_RGB,
LCD_EMI,
};
struct lcd_info {
u16 width;
u16 height;
u16 stride;
u16 radius;
u32 fill_argb;
u8 fps;
u8 color_format;
u8 interface;
u8 col_align;
u8 row_align;
u8 buf_num;
u8 bl_status;
u8 *buffer;
int buffer_size;
};
struct lcd_interface {
void (*init)(void *);
void (*get_screen_info)(struct lcd_info *info);
void (*buffer_malloc)(u8 **buf, u32 *size);
void (*buffer_free)(u8 *buf);
void (*draw)(u8 *buf, int xstart, int xend, int ystart, int yend);
void (*draw_continue)(u8 *buf, int xstart, int xend, int ystart, int yend);
void (*set_draw_area)(u16 xs, u16 xe, u16 ys, u16 ye);
void (*clear_screen)(u32 color, int xstart, int xend, int ystart, int yend);
int (*backlight_ctrl)(u8 on);
int (*power_ctrl)(u8 on);
void (*draw_page)(u8 *buf, u8 page_star, u8 page_len);//刷新页(点阵屏)
};
extern struct lcd_interface lcd_interface_begin[];
extern struct lcd_interface lcd_interface_end[];
#define REGISTER_LCD_INTERFACE(lcd) \
static const struct lcd_interface lcd sec(.lcd_if_info) __attribute__((used))
struct lcd_interface *lcd_get_hdl();
#define LCD_SPI_PLATFORM_DATA_BEGIN(data) \
const struct lcd_platform_data data = {
#define LCD_SPI_PLATFORM_DATA_END() \
};
extern struct pwm_platform_data lcd_pwm_p_data;
void lcd_reset_l();
void lcd_reset_h();
void lcd_cs_l();
void lcd_cs_h();
void lcd_rs_l();
void lcd_rs_h();
void lcd_bl_l();
void lcd_bl_h();
u8 lcd_bl_io();
void lcd_bl_ctrl(u8 val);
void lcd_en_ctrl(u8 val);
int lcd_backlight_status();
int lcd_sleep_status();
int lcd_drv_backlight_ctrl(u8 percent);
int lcd_drv_power_ctrl(u8 on);
void lcd_drv_cmd_list(u8 *cmd_list, int cmd_cnt);
// 两毫秒延时
extern void delay_2ms(int cnt);
#endif
loader/update_ui/include/ui/text_matrix.h
+478
View File
@@ -0,0 +1,478 @@
#ifndef TEXT_MATRIX
#define TEXT_MATRIX
#include "typedef.h"
struct matrix {
u16 code;
u8 width;
u8 height;
u16 offset;
};
static const u8 osd_str_matrix[] __attribute__((aligned(64))) = {
// ' '(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '0'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xc0,0x06,0x20,
0x0c,0x30,0x18,0x18,0x18,0x18,0x18,0x08,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x30,0x0c,
0x30,0x0c,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x18,0x08,0x18,0x18,
0x18,0x18,0x0c,0x30,0x06,0x20,0x03,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '1'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x01,0x80,
0x1f,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x03,0xc0,0x1f,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '2'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xe0,0x08,0x38,
0x10,0x18,0x20,0x0c,0x20,0x0c,0x30,0x0c,0x30,0x0c,0x00,0x0c,0x00,0x18,0x00,0x18,
0x00,0x30,0x00,0x60,0x00,0xc0,0x01,0x80,0x03,0x00,0x02,0x00,0x04,0x04,0x08,0x04,
0x10,0x04,0x20,0x0c,0x3f,0xf8,0x3f,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '3'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xc0,0x18,0x60,
0x30,0x30,0x30,0x18,0x30,0x18,0x30,0x18,0x00,0x18,0x00,0x18,0x00,0x30,0x00,0x60,
0x03,0xc0,0x00,0x70,0x00,0x18,0x00,0x08,0x00,0x0c,0x00,0x0c,0x30,0x0c,0x30,0x0c,
0x30,0x08,0x30,0x18,0x18,0x30,0x07,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '4'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,
0x00,0xe0,0x00,0xe0,0x01,0x60,0x01,0x60,0x02,0x60,0x04,0x60,0x04,0x60,0x08,0x60,
0x08,0x60,0x10,0x60,0x30,0x60,0x20,0x60,0x40,0x60,0x7f,0xfc,0x00,0x60,0x00,0x60,
0x00,0x60,0x00,0x60,0x00,0x60,0x03,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '5'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0f,0xfc,0x0f,0xfc,
0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x13,0xe0,0x14,0x30,
0x18,0x18,0x10,0x08,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x30,0x0c,0x30,0x0c,
0x20,0x18,0x20,0x18,0x18,0x30,0x07,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '6'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xe0,0x06,0x18,
0x0c,0x18,0x08,0x18,0x18,0x00,0x10,0x00,0x10,0x00,0x30,0x00,0x33,0xe0,0x36,0x30,
0x38,0x18,0x38,0x08,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x18,0x0c,
0x18,0x08,0x0c,0x18,0x0e,0x30,0x03,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '7'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1f,0xfc,0x1f,0xfc,
0x10,0x08,0x30,0x10,0x20,0x10,0x20,0x20,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,
0x00,0x80,0x00,0x80,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x03,0x00,0x03,0x00,
0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '8'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xe0,0x0c,0x30,
0x18,0x18,0x30,0x0c,0x30,0x0c,0x30,0x0c,0x38,0x0c,0x38,0x08,0x1e,0x18,0x0f,0x20,
0x07,0xc0,0x18,0xf0,0x30,0x78,0x30,0x38,0x60,0x1c,0x60,0x0c,0x60,0x0c,0x60,0x0c,
0x60,0x0c,0x30,0x18,0x18,0x30,0x07,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '9'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xc0,0x18,0x20,
0x30,0x10,0x30,0x18,0x60,0x08,0x60,0x0c,0x60,0x0c,0x60,0x0c,0x60,0x0c,0x60,0x0c,
0x70,0x1c,0x30,0x2c,0x18,0x6c,0x0f,0x8c,0x00,0x0c,0x00,0x18,0x00,0x18,0x00,0x10,
0x30,0x30,0x30,0x60,0x30,0xc0,0x0f,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '%'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x10,0x6c,0x10,
0x44,0x20,0xc6,0x20,0xc6,0x40,0xc6,0x40,0xc6,0x40,0xc6,0x80,0xc6,0x80,0x44,0x80,
0x6d,0x38,0x39,0x6c,0x02,0x44,0x02,0xc6,0x02,0xc6,0x04,0xc6,0x04,0xc6,0x08,0xc6,
0x08,0xc6,0x08,0x44,0x10,0x6c,0x10,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '升'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x84,0x00,0x00,0x03,0xc6,0x00,
0x00,0x0f,0xc6,0x00,0x00,0xf8,0x06,0x00,0x1f,0x10,0x06,0x00,0x00,0x10,0x06,0x00,
0x00,0x10,0x06,0x00,0x00,0x10,0x06,0x00,0x00,0x10,0x06,0x00,0x00,0x10,0x06,0x00,
0x00,0x10,0x06,0x00,0x00,0x10,0x06,0x18,0x3f,0xff,0xff,0xfc,0x00,0x10,0x06,0x00,
0x00,0x10,0x06,0x00,0x00,0x30,0x06,0x00,0x00,0x30,0x06,0x00,0x00,0x30,0x06,0x00,
0x00,0x30,0x06,0x00,0x00,0x20,0x06,0x00,0x00,0x60,0x06,0x00,0x00,0x60,0x06,0x00,
0x00,0xc0,0x06,0x00,0x00,0x80,0x06,0x00,0x01,0x80,0x06,0x00,0x03,0x00,0x06,0x00,
0x04,0x00,0x06,0x00,0x18,0x00,0x06,0x00,0x20,0x00,0x04,0x00,0x00,0x00,0x00,0x00,
// '级'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x01,0xe0,0x00,0x00,
0x01,0x80,0x00,0x40,0x01,0x87,0xff,0xe0,0x03,0x00,0x40,0xe0,0x02,0x00,0x40,0xc0,
0x06,0x08,0x41,0x80,0x04,0x1c,0x41,0x80,0x08,0x18,0xc3,0x00,0x10,0x30,0xc3,0x00,
0x3f,0xe0,0xc6,0x10,0x3c,0x40,0xcf,0xf8,0x00,0xc0,0xc4,0x30,0x01,0x80,0xe0,0x20,
0x03,0x00,0xe0,0x60,0x02,0x00,0xa0,0x60,0x04,0x00,0x90,0x40,0x08,0x79,0x90,0xc0,
0x3f,0x81,0x98,0xc0,0x1c,0x01,0x09,0x80,0x10,0x03,0x0d,0x80,0x00,0x03,0x07,0x00,
0x00,0x32,0x07,0x00,0x01,0xc4,0x0f,0x80,0x1f,0x0c,0x19,0xc0,0x3c,0x18,0x30,0xe0,
0x10,0x20,0x60,0x7c,0x00,0x41,0x80,0x30,0x00,0x86,0x00,0x00,0x00,0x00,0x00,0x00,
// '中'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x08,0x01,0x80,0x20,0x0f,0xff,0xff,0xf0,0x0c,0x01,0x80,0x20,0x0c,0x01,0x80,0x20,
0x0c,0x01,0x80,0x20,0x0c,0x01,0x80,0x20,0x0c,0x01,0x80,0x20,0x0c,0x01,0x80,0x20,
0x0c,0x01,0x80,0x20,0x0c,0x01,0x80,0x20,0x0f,0xff,0xff,0xe0,0x0c,0x01,0x80,0x20,
0x0c,0x01,0x80,0x30,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
// '完'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x03,0x00,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x04,0x00,0x80,0x10,0x07,0xff,0xff,0xf8,
0x0c,0x00,0x00,0x38,0x0c,0x00,0x00,0x20,0x1c,0x00,0x00,0x40,0x00,0x00,0x06,0x00,
0x03,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x60,0x1f,0xff,0xff,0xf0,0x00,0x18,0x60,0x00,0x00,0x18,0x60,0x00,
0x00,0x18,0x60,0x00,0x00,0x10,0x60,0x00,0x00,0x30,0x60,0x08,0x00,0x30,0x60,0x08,
0x00,0x30,0x60,0x08,0x00,0x60,0x60,0x08,0x00,0xc0,0x60,0x08,0x01,0x80,0x20,0x08,
0x03,0x00,0x3f,0xfc,0x0c,0x00,0x1f,0xf8,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '毕'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x03,0x00,0x60,0x00,
0x03,0x00,0x60,0x00,0x03,0x00,0x60,0x60,0x03,0x00,0x60,0xf0,0x03,0x04,0x63,0x80,
0x03,0xfe,0x6e,0x00,0x03,0x00,0x70,0x00,0x03,0x00,0x60,0x00,0x03,0x00,0x60,0x10,
0x03,0x00,0x60,0x10,0x03,0x02,0x60,0x10,0x03,0x1c,0x60,0x10,0x03,0xe0,0x7f,0xf8,
0x07,0x80,0x7f,0xf0,0x03,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x10,
0x00,0x01,0x80,0x38,0x3f,0xff,0xff,0xfc,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
// '进'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x00,0x04,0x01,0xc3,0x80,
0x06,0x01,0x83,0x00,0x03,0x01,0x83,0x00,0x01,0x81,0x83,0x00,0x01,0x01,0x83,0x30,
0x00,0x3f,0xff,0xf8,0x00,0x01,0x83,0x00,0x00,0x01,0x83,0x00,0x00,0x01,0x83,0x00,
0x01,0x01,0x83,0x00,0x7f,0x81,0x83,0x00,0x03,0x01,0x83,0x00,0x03,0x01,0x83,0x18,
0x03,0x3f,0xff,0xfc,0x03,0x01,0x83,0x00,0x03,0x01,0x83,0x00,0x03,0x01,0x83,0x00,
0x03,0x01,0x03,0x00,0x03,0x03,0x03,0x00,0x03,0x02,0x03,0x00,0x03,0x04,0x03,0x00,
0x03,0x08,0x03,0x00,0x04,0x90,0x03,0x00,0x18,0x60,0x02,0x00,0x30,0x38,0x00,0x02,
0x30,0x0f,0xff,0xfc,0x00,0x01,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '度'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0xc0,0x00,
0x00,0x00,0xe0,0x10,0x04,0x00,0x40,0x38,0x07,0xff,0xff,0xfc,0x06,0x04,0x04,0x00,
0x06,0x07,0x07,0x00,0x06,0x06,0x06,0x00,0x06,0x06,0x06,0x30,0x07,0xff,0xff,0xf8,
0x06,0x06,0x06,0x00,0x06,0x06,0x06,0x00,0x06,0x06,0x06,0x00,0x06,0x06,0x06,0x00,
0x06,0x07,0xfe,0x00,0x06,0x06,0x06,0x00,0x04,0x00,0x01,0x00,0x04,0x3f,0xff,0x80,
0x0c,0x04,0x03,0x80,0x0c,0x02,0x07,0x00,0x0c,0x03,0x06,0x00,0x08,0x01,0x0c,0x00,
0x08,0x00,0xd8,0x00,0x18,0x00,0x70,0x00,0x10,0x00,0xf8,0x00,0x10,0x03,0x9e,0x00,
0x20,0x0e,0x07,0xf8,0x20,0x70,0x00,0xf8,0x47,0x80,0x00,0x10,0x00,0x00,0x00,0x00,
// '机'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x80,0x00,0x00,
0x01,0x81,0x01,0x00,0x01,0x81,0xff,0xc0,0x01,0x81,0x81,0x80,0x01,0x81,0x81,0x80,
0x01,0x81,0x81,0x80,0x01,0x91,0x81,0x80,0x3f,0xf9,0x81,0x80,0x01,0x81,0x81,0x80,
0x03,0x81,0x81,0x80,0x03,0x81,0x81,0x80,0x03,0x81,0x81,0x80,0x03,0xf1,0x81,0x80,
0x07,0x99,0x81,0x80,0x05,0x99,0x81,0x80,0x0d,0x89,0x81,0x80,0x09,0x81,0x81,0x80,
0x09,0x81,0x81,0x80,0x11,0x81,0x01,0x80,0x11,0x83,0x01,0x80,0x21,0x83,0x01,0x88,
0x41,0x82,0x01,0x88,0x01,0x86,0x01,0x88,0x01,0x84,0x01,0x8c,0x01,0x88,0x01,0xfe,
0x01,0x90,0x01,0xfc,0x01,0xa0,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '器'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x40,
0x03,0xfe,0x3f,0xe0,0x02,0x0c,0x30,0xc0,0x02,0x0c,0x30,0xc0,0x02,0x0c,0x30,0xc0,
0x02,0x0c,0x30,0xc0,0x03,0xfc,0x3f,0xc0,0x02,0x0c,0x30,0xc0,0x02,0x03,0x0c,0x00,
0x00,0x03,0x07,0x10,0x00,0x06,0x03,0x38,0x3f,0xff,0xff,0xfc,0x00,0x0c,0x20,0x00,
0x00,0x18,0x18,0x00,0x00,0x30,0x0c,0x00,0x00,0x60,0x07,0x00,0x01,0xc0,0x03,0xe0,
0x07,0x04,0x00,0xfc,0x1b,0xfe,0x7f,0xf8,0x63,0x04,0x60,0xc0,0x03,0x04,0x60,0xc0,
0x03,0x04,0x60,0xc0,0x03,0x04,0x60,0xc0,0x03,0x04,0x60,0xc0,0x03,0xfc,0x7f,0xc0,
0x03,0x04,0x60,0xc0,0x02,0x00,0x60,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '即'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x20,0x00,
0x0f,0xfe,0x3f,0xf0,0x0c,0x0c,0x30,0x30,0x0c,0x0c,0x30,0x30,0x0c,0x0c,0x30,0x30,
0x0c,0x0c,0x30,0x30,0x0f,0xfc,0x30,0x30,0x0c,0x0c,0x30,0x30,0x0c,0x0c,0x30,0x30,
0x0c,0x0c,0x30,0x30,0x0c,0x0c,0x30,0x30,0x0c,0x0c,0x30,0x30,0x0f,0xfc,0x30,0x30,
0x0c,0x0c,0x30,0x30,0x0c,0x08,0x30,0x30,0x0c,0x40,0x30,0x30,0x0c,0x20,0x30,0x30,
0x0c,0x18,0x30,0x30,0x0c,0x0c,0x30,0x30,0x0c,0x0e,0x33,0xe0,0x0c,0x3f,0x30,0xe0,
0x0d,0xc3,0x30,0x00,0x0f,0x02,0x30,0x00,0x0c,0x00,0x30,0x00,0x00,0x00,0x30,0x00,
0x00,0x00,0x30,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,
// '将'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0xc0,0x70,0x00,
0x00,0xc0,0x60,0x00,0x00,0xc0,0xc0,0x20,0x00,0xc1,0xff,0xf0,0x00,0xc1,0x00,0x60,
0x30,0xc3,0x00,0xe0,0x18,0xc6,0x80,0xc0,0x1c,0xc4,0xc1,0x80,0x0c,0xc8,0x63,0x00,
0x0c,0xd0,0x46,0x00,0x0c,0xc0,0x18,0x00,0x00,0xc0,0x31,0x80,0x00,0xc0,0xc1,0xc0,
0x00,0xc3,0x01,0x80,0x01,0xcc,0x01,0x80,0x02,0xc0,0x01,0x98,0x06,0xff,0xff,0xfc,
0x0c,0xc0,0x01,0x80,0x18,0xc1,0x01,0x80,0x70,0xc1,0x81,0x80,0x20,0xc0,0xc1,0x80,
0x00,0xc0,0xc1,0x80,0x00,0xc0,0xc1,0x80,0x00,0xc0,0x01,0x80,0x00,0xc0,0x01,0x80,
0x00,0xc0,0x3f,0x80,0x00,0xc0,0x07,0x80,0x00,0x80,0x03,0x00,0x00,0x00,0x00,0x00,
// '重'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x1f,0x80,
0x00,0x1f,0xf8,0x00,0x03,0xe1,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x30,
0x1f,0xff,0xff,0xf8,0x00,0x01,0x80,0x00,0x00,0x01,0x81,0x00,0x01,0xff,0xff,0xc0,
0x01,0x81,0x81,0x80,0x01,0x81,0x81,0x80,0x01,0x81,0x81,0x80,0x01,0xff,0xff,0x80,
0x01,0x81,0x81,0x80,0x01,0x81,0x81,0x80,0x01,0x81,0x81,0x80,0x01,0xff,0xff,0x80,
0x01,0x81,0x81,0x80,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0xc0,
0x07,0xff,0xff,0xe0,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x18,
0x3f,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '启'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x01,0x80,0x00,
0x00,0x00,0xc0,0x00,0x00,0x00,0xc0,0x00,0x01,0x00,0x80,0x40,0x01,0xff,0xff,0xe0,
0x01,0x80,0x00,0x40,0x01,0x80,0x00,0x40,0x01,0x80,0x00,0x40,0x01,0x80,0x00,0x40,
0x01,0x80,0x00,0x40,0x01,0xff,0xff,0xc0,0x01,0x80,0x00,0x40,0x01,0x80,0x00,0x00,
0x01,0x80,0x00,0x00,0x01,0x90,0x00,0x00,0x01,0x1f,0xff,0xe0,0x03,0x18,0x00,0xc0,
0x03,0x18,0x00,0xc0,0x03,0x18,0x00,0xc0,0x03,0x18,0x00,0xc0,0x02,0x18,0x00,0xc0,
0x06,0x18,0x00,0xc0,0x06,0x18,0x00,0xc0,0x04,0x18,0x00,0xc0,0x08,0x1f,0xff,0xc0,
0x18,0x18,0x00,0xc0,0x10,0x18,0x00,0xc0,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '，'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x07,0x00,0x00,0x00,0x0f,0x80,0x00,0x00,0x0f,0x80,0x00,0x00,0x07,0x80,0x00,0x00,
0x01,0x80,0x00,0x00,0x03,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x04,0x00,0x00,0x00,
0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '请'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x08,0x00,0x18,0x00,
0x06,0x00,0x18,0x00,0x07,0x00,0x18,0x10,0x03,0x1f,0xff,0xf8,0x03,0x00,0x18,0x00,
0x00,0x00,0x18,0x60,0x00,0x07,0xff,0xf0,0x00,0x00,0x18,0x00,0x02,0x00,0x18,0x00,
0x7f,0x00,0x18,0x18,0x03,0x3f,0xff,0xfc,0x03,0x00,0x00,0x00,0x03,0x00,0x00,0x40,
0x03,0x03,0xff,0xe0,0x03,0x02,0x00,0x60,0x03,0x02,0x00,0x60,0x03,0x02,0x00,0x60,
0x03,0x03,0xff,0xe0,0x03,0x12,0x00,0x60,0x03,0x22,0x00,0x60,0x03,0x43,0xff,0xe0,
0x03,0xc2,0x00,0x60,0x03,0x82,0x00,0x60,0x07,0x02,0x00,0x60,0x03,0x02,0x00,0x60,
0x00,0x02,0x0f,0xc0,0x00,0x02,0x01,0xc0,0x00,0x02,0x00,0x80,0x00,0x00,0x00,0x00,
// '不'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x38,
0x3f,0xff,0xff,0xfc,0x00,0x00,0xc0,0x00,0x00,0x01,0xc0,0x00,0x00,0x01,0x80,0x00,
0x00,0x03,0x80,0x00,0x00,0x03,0x00,0x00,0x00,0x07,0x80,0x00,0x00,0x07,0xc0,0x00,
0x00,0x0d,0x80,0x00,0x00,0x1d,0x8c,0x00,0x00,0x19,0x82,0x00,0x00,0x31,0x81,0x80,
0x00,0x61,0x80,0xc0,0x00,0xc1,0x80,0x60,0x01,0x81,0x80,0x70,0x03,0x01,0x80,0x38,
0x06,0x01,0x80,0x18,0x0c,0x01,0x80,0x18,0x10,0x01,0x80,0x08,0x20,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
// '要'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x30,
0x1f,0xff,0xff,0xf8,0x00,0x08,0x30,0x00,0x00,0x08,0x30,0x00,0x00,0x08,0x30,0x40,
0x03,0xff,0xff,0xe0,0x02,0x08,0x30,0xc0,0x02,0x08,0x30,0xc0,0x02,0x08,0x30,0xc0,
0x02,0x08,0x30,0xc0,0x02,0x08,0x30,0xc0,0x03,0xff,0xff,0xc0,0x02,0x08,0x00,0xc0,
0x00,0x0e,0x00,0x00,0x00,0x0c,0x00,0x00,0x00,0x18,0x00,0x38,0x3f,0xff,0xff,0xfc,
0x00,0x30,0x0c,0x00,0x00,0x30,0x0c,0x00,0x00,0x60,0x18,0x00,0x00,0xc0,0x30,0x00,
0x00,0x3f,0x70,0x00,0x00,0x01,0xf0,0x00,0x00,0x01,0xff,0x00,0x00,0x07,0x07,0xc0,
0x00,0x3c,0x00,0xe0,0x03,0xe0,0x00,0x70,0x3c,0x00,0x00,0x10,0x00,0x00,0x00,0x00,
// '断'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x10,0x18,0x18,0x00,0x30,
0x1c,0x10,0x01,0xf8,0x18,0x11,0x1e,0x00,0x1a,0x11,0x90,0x00,0x19,0x93,0x10,0x00,
0x18,0x92,0x10,0x00,0x18,0xd2,0x10,0x00,0x18,0x94,0x10,0x00,0x18,0x11,0x90,0x00,
0x1f,0xff,0xd0,0x08,0x18,0x30,0x1f,0xfc,0x18,0x78,0x10,0x60,0x18,0x74,0x10,0x60,
0x18,0x52,0x10,0x60,0x18,0xd3,0x90,0x60,0x18,0x91,0x90,0x60,0x18,0x91,0x90,0x60,
0x19,0x10,0xb0,0x60,0x1a,0x10,0x30,0x60,0x1e,0x10,0x30,0x60,0x18,0x10,0x30,0x60,
0x18,0x10,0x20,0x60,0x18,0x06,0x60,0x60,0x3f,0xff,0x40,0x60,0x08,0x00,0x80,0x60,
0x00,0x01,0x00,0x60,0x00,0x02,0x00,0x60,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
// '电'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x03,0x80,0x00,
0x00,0x03,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x03,0x00,0x00,0x04,0x03,0x00,0x80,
0x07,0xff,0xff,0xc0,0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0xc0,
0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0xc0,0x07,0xff,0xff,0xc0,0x06,0x03,0x00,0xc0,
0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0xc0,
0x06,0x03,0x00,0xc0,0x07,0xff,0xff,0xc0,0x06,0x03,0x00,0xc0,0x06,0x03,0x00,0x08,
0x00,0x03,0x00,0x08,0x00,0x03,0x00,0x08,0x00,0x03,0x00,0x08,0x00,0x03,0x00,0x18,
0x00,0x03,0xff,0xfc,0x00,0x01,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '!'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xc0,0x03,0xc0,
0x03,0xc0,0x03,0xc0,0x03,0xc0,0x03,0xc0,0x01,0xc0,0x01,0x80,0x01,0x80,0x01,0x80,
0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x80,0x03,0xc0,0x03,0xc0,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// ':'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x03,0xc0,0x03,0xc0,
0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x80,0x03,0xc0,0x03,0xc0,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '.'(16x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x18,0x00,0x3c,0x00,0x3c,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '等'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xc0,0x0e,0x00,
0x01,0xc0,0x1c,0x00,0x03,0x83,0x18,0x08,0x03,0xff,0x9f,0xfc,0x06,0x40,0x32,0x00,
0x04,0x20,0x21,0x80,0x0c,0x30,0x41,0x80,0x18,0x30,0x81,0x80,0x20,0x10,0xc0,0x80,
0x40,0x00,0x80,0x40,0x03,0xff,0xff,0xe0,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,
0x00,0x00,0x80,0x08,0x3f,0xff,0xff,0xfc,0x00,0x00,0x04,0x00,0x00,0x00,0x07,0x00,
0x00,0x00,0x06,0x18,0x0f,0xff,0xff,0xfc,0x00,0x20,0x06,0x00,0x00,0x30,0x06,0x00,
0x00,0x18,0x06,0x00,0x00,0x0c,0x06,0x00,0x00,0x0c,0x06,0x00,0x00,0x0c,0x06,0x00,
0x00,0x00,0x7e,0x00,0x00,0x00,0x1e,0x00,0x00,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,
// '待'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x30,0x00,0x00,0xe0,0x38,0x00,
0x01,0xc0,0x30,0x00,0x01,0x80,0x30,0x00,0x03,0x00,0x30,0x40,0x02,0x0f,0xff,0xe0,
0x06,0x00,0x30,0x00,0x0c,0x60,0x30,0x00,0x08,0xe0,0x30,0x00,0x10,0xc0,0x30,0x00,
0x21,0x80,0x30,0x18,0x01,0xbf,0xff,0xfc,0x03,0x00,0x02,0x00,0x03,0x00,0x01,0x80,
0x05,0x00,0x01,0x80,0x09,0x00,0x01,0x98,0x11,0x1f,0xff,0xfc,0x21,0x00,0x01,0x80,
0x01,0x02,0x01,0x80,0x01,0x01,0x81,0x80,0x01,0x00,0xc1,0x80,0x01,0x00,0xc1,0x80,
0x01,0x00,0x41,0x80,0x01,0x00,0x01,0x80,0x01,0x00,0x01,0x80,0x01,0x00,0x01,0x80,
0x01,0x00,0x3f,0x80,0x01,0x00,0x07,0x00,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,
// '连'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x30,0x00,
0x0c,0x00,0x60,0x00,0x06,0x00,0x60,0x00,0x07,0x00,0xc0,0x30,0x03,0x3f,0xff,0xf8,
0x02,0x00,0xc0,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x03,0x1c,0x00,
0x01,0x03,0x18,0x00,0x3f,0x86,0x18,0x00,0x03,0x0e,0x18,0x40,0x03,0x1f,0xff,0xe0,
0x03,0x0c,0x18,0x00,0x03,0x00,0x18,0x00,0x03,0x00,0x18,0x00,0x03,0x00,0x18,0x18,
0x03,0x3f,0xff,0xfc,0x03,0x00,0x18,0x00,0x03,0x00,0x18,0x00,0x03,0x00,0x18,0x00,
0x03,0x00,0x18,0x00,0x0c,0xc0,0x18,0x00,0x18,0x60,0x18,0x00,0x30,0x1e,0x00,0x06,
0x10,0x0f,0xff,0xf8,0x00,0x00,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '接'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x80,0x30,0x00,
0x01,0x00,0x18,0x00,0x01,0x00,0x08,0x00,0x01,0x00,0x08,0x30,0x01,0x07,0xff,0xf8,
0x01,0x11,0x01,0x80,0x3f,0xf8,0x81,0x80,0x01,0x00,0xc3,0x00,0x01,0x00,0x62,0x00,
0x01,0x00,0x42,0x18,0x01,0x1f,0xff,0xfc,0x01,0x00,0x20,0x00,0x01,0x20,0x38,0x00,
0x01,0xc0,0x70,0x00,0x07,0x00,0x60,0x00,0x3d,0x00,0x60,0x08,0x39,0x3f,0xff,0xfc,
0x21,0x00,0xc1,0x80,0x01,0x01,0x81,0x80,0x01,0x01,0x03,0x00,0x01,0x03,0x03,0x00,
0x01,0x01,0xe6,0x00,0x01,0x00,0x1e,0x00,0x01,0x00,0x1b,0x80,0x01,0x00,0x30,0xe0,
0x1f,0x00,0xc0,0x78,0x07,0x07,0x00,0x18,0x00,0x78,0x00,0x08,0x00,0x00,0x00,0x00,
// '尝'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0xc0,0x00,
0x00,0x81,0x81,0x00,0x00,0xc1,0x83,0x80,0x00,0x61,0x83,0x00,0x00,0x71,0x86,0x00,
0x00,0x31,0x8c,0x00,0x04,0x21,0x88,0x08,0x07,0xff,0xff,0xfc,0x0c,0x00,0x00,0x18,
0x1c,0x00,0x00,0x30,0x38,0x00,0x00,0x20,0x10,0x00,0x03,0x00,0x01,0xff,0xff,0x80,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x70,
0x1f,0xff,0xff,0xf8,0x00,0x04,0x00,0x00,0x00,0x0f,0x00,0x00,0x00,0x1c,0x00,0x00,
0x00,0x18,0x08,0x00,0x00,0x20,0x06,0x00,0x00,0x40,0x03,0x00,0x01,0x80,0x01,0x80,
0x03,0xff,0xff,0xc0,0x01,0xf0,0x00,0xc0,0x01,0x00,0x00,0x80,0x00,0x00,0x00,0x00,
// '试'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x07,0xc0,
0x0c,0x00,0x06,0x70,0x06,0x00,0x06,0x30,0x03,0x00,0x06,0x10,0x03,0x00,0x06,0x18,
0x03,0x00,0x06,0x08,0x00,0x3f,0xff,0xfc,0x00,0x00,0x06,0x00,0x00,0x00,0x06,0x00,
0x00,0x00,0x06,0x00,0x01,0x00,0x06,0x00,0x7f,0x80,0x16,0x00,0x03,0x1f,0xfa,0x00,
0x03,0x01,0x82,0x00,0x03,0x01,0x83,0x00,0x03,0x01,0x83,0x00,0x03,0x01,0x83,0x00,
0x03,0x01,0x81,0x00,0x03,0x01,0x81,0x80,0x03,0x09,0x81,0x80,0x03,0x11,0x8c,0xc4,
0x03,0x21,0xf0,0xc4,0x03,0x43,0xc0,0x64,0x03,0xde,0x00,0x74,0x03,0x88,0x00,0x3c,
0x03,0x80,0x00,0x1c,0x01,0x00,0x00,0x0c,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,
// '使'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x10,0x00,0x00,0x60,0x18,0x00,
0x00,0xc0,0x18,0x00,0x00,0xc0,0x18,0x00,0x00,0xc0,0x18,0x18,0x01,0x9f,0xff,0xfc,
0x01,0x80,0x18,0x00,0x03,0x00,0x18,0x00,0x03,0x00,0x18,0x20,0x07,0x87,0xff,0xf0,
0x05,0x04,0x18,0x20,0x0d,0x04,0x18,0x20,0x09,0x04,0x18,0x20,0x11,0x04,0x18,0x20,
0x11,0x04,0x18,0x20,0x21,0x07,0xff,0xe0,0x01,0x04,0x18,0x20,0x01,0x02,0x18,0x00,
0x01,0x01,0x18,0x00,0x01,0x01,0x10,0x00,0x01,0x00,0xb0,0x00,0x01,0x00,0xf0,0x00,
0x01,0x00,0x60,0x00,0x01,0x00,0x70,0x00,0x01,0x00,0xdc,0x00,0x01,0x01,0x87,0x80,
0x01,0x06,0x03,0xfc,0x01,0x18,0x00,0xf8,0x00,0x60,0x00,0x10,0x00,0x00,0x00,0x00,
// '用'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x20,0x03,0xff,0xff,0xf0,
0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,
0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,0x03,0xff,0xff,0xe0,
0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,0x02,0x01,0x80,0x60,
0x06,0x01,0x80,0x60,0x06,0x01,0x80,0x60,0x07,0xff,0xff,0xe0,0x06,0x01,0x80,0x60,
0x06,0x01,0x80,0x60,0x06,0x01,0x80,0x60,0x04,0x01,0x80,0x60,0x04,0x01,0x80,0x60,
0x0c,0x01,0x80,0x60,0x08,0x01,0x80,0x60,0x08,0x01,0x80,0x60,0x10,0x01,0x8e,0xe0,
0x10,0x01,0x83,0xe0,0x20,0x00,0x00,0xc0,0x40,0x00,0x00,0x80,0x00,0x00,0x00,0x00,
// '软'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0xe0,0x1c,0x00,
0x01,0x80,0x18,0x00,0x01,0x80,0x18,0x00,0x01,0x82,0x10,0x00,0x3f,0xff,0x30,0x00,
0x03,0x00,0x20,0x10,0x03,0x00,0x3f,0xf8,0x02,0x00,0x60,0x18,0x06,0x60,0x40,0x30,
0x06,0x60,0x8c,0x20,0x04,0x61,0x0e,0x40,0x0c,0x61,0x0c,0x00,0x0c,0x62,0x0c,0x00,
0x0f,0xff,0x0e,0x00,0x08,0x60,0x0a,0x00,0x00,0x60,0x0a,0x00,0x00,0x60,0x1a,0x00,
0x00,0x66,0x1b,0x00,0x00,0x78,0x19,0x00,0x03,0xe0,0x31,0x00,0x3e,0x60,0x31,0x80,
0x18,0x60,0x20,0x80,0x10,0x60,0x60,0xc0,0x00,0x60,0xc0,0x60,0x00,0x61,0x80,0x70,
0x00,0x63,0x00,0x3c,0x00,0x66,0x00,0x18,0x00,0x48,0x00,0x00,0x00,0x00,0x00,0x00,
// '件'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x08,0x00,0x00,0x70,0x0e,0x00,
0x00,0xe0,0x0c,0x00,0x00,0xc3,0x0c,0x00,0x00,0xc3,0x0c,0x00,0x01,0x83,0x0c,0x00,
0x01,0x82,0x0c,0x00,0x03,0x06,0x0c,0x30,0x03,0x87,0xff,0xf8,0x07,0x84,0x0c,0x00,
0x05,0x0c,0x0c,0x00,0x0d,0x08,0x0c,0x00,0x09,0x08,0x0c,0x00,0x11,0x10,0x0c,0x00,
0x21,0x00,0x0c,0x00,0x21,0x00,0x0c,0x08,0x41,0x3f,0xff,0xfc,0x01,0x00,0x0c,0x00,
0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,
0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,
0x01,0x00,0x0c,0x00,0x01,0x00,0x0c,0x00,0x02,0x00,0x08,0x00,0x00,0x00,0x00,0x00,
// '手'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x0f,0xc0,
0x00,0x01,0xff,0xe0,0x0f,0xff,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0xc0,0x0f,0xff,0xff,0xe0,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x18,0x7f,0xff,0xff,0xfc,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,
0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x01,0x80,0x00,0x00,0x03,0x80,0x00,
0x00,0x3f,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,
// '动'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x0e,0x00,
0x00,0x00,0x0c,0x00,0x00,0x0c,0x0c,0x00,0x1f,0xfe,0x0c,0x00,0x00,0x00,0x0c,0x00,
0x00,0x00,0x0c,0x00,0x00,0x00,0x0c,0x00,0x00,0x00,0xff,0xfc,0x00,0x02,0x0c,0x18,
0x3f,0xff,0x0c,0x18,0x00,0x80,0x0c,0x18,0x01,0xe0,0x0c,0x18,0x01,0x80,0x0c,0x18,
0x03,0x00,0x08,0x18,0x03,0x00,0x08,0x18,0x06,0x10,0x18,0x18,0x04,0x08,0x18,0x18,
0x0c,0x0c,0x10,0x18,0x08,0x06,0x10,0x18,0x10,0x7f,0x30,0x10,0x3f,0x83,0x20,0x10,
0x38,0x02,0x60,0x10,0x00,0x00,0xc0,0x30,0x00,0x01,0x80,0x30,0x00,0x01,0x0c,0x30,
0x00,0x06,0x03,0xe0,0x00,0x08,0x01,0xe0,0x00,0x10,0x00,0x80,0x00,0x00,0x00,0x00,
// '触'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0xc0,0x03,0x00,
0x01,0x80,0x03,0x00,0x03,0x08,0x03,0x00,0x03,0xfc,0x03,0x00,0x02,0x18,0x03,0x00,
0x06,0x10,0x03,0x00,0x0c,0x20,0x03,0x00,0x08,0x24,0x7f,0xf8,0x1f,0xfe,0x63,0x18,
0x2c,0x46,0x63,0x18,0x4c,0x46,0x63,0x18,0x0c,0x46,0x63,0x18,0x0f,0xfe,0x63,0x18,
0x0c,0x46,0x63,0x18,0x0c,0x46,0x63,0x18,0x0c,0x46,0x63,0x18,0x0c,0x46,0x7f,0xf8,
0x0f,0xfe,0x63,0x18,0x0c,0x46,0x03,0x00,0x0c,0x46,0x03,0x00,0x08,0x46,0x03,0x20,
0x08,0x46,0x03,0x10,0x08,0x46,0x03,0x18,0x10,0x46,0x03,0xfc,0x10,0x47,0xff,0x0c,
0x20,0x66,0xe0,0x04,0x20,0x1c,0x80,0x00,0x40,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
// '发'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x06,0x08,0x00,
0x03,0x06,0x06,0x00,0x03,0x04,0x03,0x00,0x03,0x0c,0x03,0x80,0x06,0x0c,0x01,0x80,
0x06,0x0c,0x00,0x80,0x0c,0x0c,0x00,0x18,0x1f,0xff,0xff,0xfc,0x08,0x08,0x00,0x00,
0x00,0x18,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x18,0x00,0x80,0x00,0x3f,0xff,0xc0,
0x00,0x34,0x01,0x80,0x00,0x32,0x03,0x80,0x00,0x62,0x03,0x00,0x00,0x61,0x06,0x00,
0x00,0x41,0x86,0x00,0x00,0xc0,0xcc,0x00,0x00,0x80,0x58,0x00,0x01,0x80,0x70,0x00,
0x03,0x00,0x78,0x00,0x02,0x00,0xfc,0x00,0x04,0x01,0x8f,0x00,0x08,0x07,0x03,0xc0,
0x10,0x0c,0x01,0xfc,0x20,0x70,0x00,0x78,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,
// '地'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x1c,0x00,
0x03,0x00,0x18,0x00,0x03,0x00,0x18,0x00,0x03,0x02,0x18,0x00,0x03,0x03,0x18,0x00,
0x03,0x03,0x18,0x00,0x03,0x03,0x18,0x20,0x03,0x03,0x18,0xf0,0x03,0x03,0x1f,0x60,
0x03,0x23,0x18,0x60,0x3f,0xf3,0xf8,0x60,0x03,0x07,0x18,0x60,0x03,0x1b,0x18,0x60,
0x03,0x23,0x18,0x60,0x03,0x03,0x18,0x60,0x03,0x03,0x18,0x60,0x03,0x03,0x18,0x60,
0x03,0x03,0x18,0x60,0x03,0x03,0x19,0xe0,0x03,0x03,0x18,0xc8,0x03,0x1b,0x18,0x08,
0x03,0xe3,0x18,0x08,0x07,0x83,0x00,0x08,0x3e,0x03,0x00,0x08,0x38,0x03,0x00,0x0c,
0x20,0x03,0xff,0xfc,0x00,0x01,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '址'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x08,0x00,0x03,0x80,0x0e,0x00,
0x03,0x00,0x0c,0x00,0x03,0x00,0x0c,0x00,0x03,0x00,0x0c,0x00,0x03,0x00,0x0c,0x00,
0x03,0x00,0x0c,0x00,0x03,0x00,0x0c,0x00,0x03,0x03,0x0c,0x00,0x03,0x13,0x8c,0x00,
0x3f,0xfb,0x0c,0x00,0x03,0x03,0x0c,0x18,0x03,0x03,0x0f,0xfc,0x03,0x03,0x0c,0x00,
0x03,0x03,0x0c,0x00,0x03,0x03,0x0c,0x00,0x03,0x03,0x0c,0x00,0x03,0x03,0x0c,0x00,
0x03,0x03,0x0c,0x00,0x03,0x03,0x0c,0x00,0x03,0x0b,0x0c,0x00,0x03,0x73,0x0c,0x00,
0x03,0x83,0x0c,0x00,0x1e,0x03,0x0c,0x00,0x38,0x03,0x0c,0x00,0x30,0x03,0x0c,0x18,
0x00,0x7f,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '强'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x20,
0x00,0x21,0xff,0xf0,0x3f,0xf1,0x80,0x60,0x00,0x21,0x80,0x60,0x00,0x21,0x80,0x60,
0x00,0x21,0x80,0x60,0x00,0x21,0xff,0xe0,0x00,0x21,0x88,0x60,0x00,0x21,0x0e,0x00,
0x0f,0xe0,0x0c,0x00,0x08,0x20,0x0c,0x00,0x08,0x02,0x0c,0x10,0x08,0x03,0xff,0xf8,
0x18,0x03,0x0c,0x10,0x18,0x23,0x0c,0x10,0x1f,0xf3,0x0c,0x10,0x10,0x63,0x0c,0x10,
0x00,0x63,0x0c,0x10,0x00,0x63,0xff,0xf0,0x00,0x63,0x0c,0x10,0x00,0x62,0x0c,0x00,
0x00,0x60,0x0c,0x20,0x00,0x40,0x0c,0x30,0x00,0xc0,0x0c,0x18,0x00,0xc0,0x0c,0x7c,
0x0f,0x8f,0xff,0x8c,0x07,0x8f,0x80,0x04,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
// '制'(32x32)
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x10,0x00,0x30,0x00,0x18,
0x00,0x20,0x00,0x10,0x06,0x20,0x00,0x10,0x0c,0x20,0x00,0x10,0x0c,0x21,0x06,0x10,
0x0f,0xff,0x86,0x10,0x08,0x20,0x06,0x10,0x10,0x20,0x06,0x10,0x10,0x20,0x06,0x10,
0x20,0x20,0xc6,0x10,0x3f,0xff,0xe6,0x10,0x00,0x20,0x06,0x10,0x00,0x20,0x06,0x10,
0x00,0x20,0x86,0x10,0x0f,0xff,0xc6,0x10,0x08,0x21,0x86,0x10,0x08,0x21,0x86,0x10,
0x08,0x21,0x86,0x10,0x08,0x21,0x86,0x10,0x08,0x21,0x86,0x10,0x08,0x21,0x80,0x10,
0x08,0x21,0x80,0x10,0x08,0x27,0x80,0x10,0x08,0x23,0x00,0x10,0x00,0x20,0x00,0x10,
0x00,0x20,0x03,0xf0,0x00,0x20,0x00,0x70,0x00,0x20,0x00,0x20,0x00,0x00,0x00,0x00,
};
// 0123456789%升级中完毕进度机器即将重启，请不要断电!:.等待连接尝试使用软件手动触发地址强制
static const struct matrix text_matrix[] = {
{0x0020,0x10,0x20,0x0000},//' '
{0x0030,0x10,0x20,0x0040},//'0'
{0x0031,0x10,0x20,0x0080},//'1'
{0x0032,0x10,0x20,0x00c0},//'2'
{0x0033,0x10,0x20,0x0100},//'3'
{0x0034,0x10,0x20,0x0140},//'4'
{0x0035,0x10,0x20,0x0180},//'5'
{0x0036,0x10,0x20,0x01c0},//'6'
{0x0037,0x10,0x20,0x0200},//'7'
{0x0038,0x10,0x20,0x0240},//'8'
{0x0039,0x10,0x20,0x0280},//'9'
{0x0025,0x10,0x20,0x02c0},//'%'
{0xc9fd,0x20,0x20,0x0300},//'升'
{0xbcb6,0x20,0x20,0x0380},//'级'
{0xd6d0,0x20,0x20,0x0400},//'中'
{0xcdea,0x20,0x20,0x0480},//'完'
{0xb1cf,0x20,0x20,0x0500},//'毕'
{0xbdf8,0x20,0x20,0x0580},//'进'
{0xb6c8,0x20,0x20,0x0600},//'度'
{0xbbfa,0x20,0x20,0x0680},//'机'
{0xc6f7,0x20,0x20,0x0700},//'器'
{0xbcb4,0x20,0x20,0x0780},//'即'
{0xbdab,0x20,0x20,0x0800},//'将'
{0xd6d8,0x20,0x20,0x0880},//'重'
{0xc6f4,0x20,0x20,0x0900},//'启'
{0xa3ac,0x20,0x20,0x0980},//'，'
{0xc7eb,0x20,0x20,0x0a00},//'请'
{0xb2bb,0x20,0x20,0x0a80},//'不'
{0xd2aa,0x20,0x20,0x0b00},//'要'
{0xb6cf,0x20,0x20,0x0b80},//'断'
{0xb5e7,0x20,0x20,0x0c00},//'电'
{0x0021,0x10,0x20,0x0c80},//'!'
{0x003a,0x10,0x20,0x0cc0},//':'
{0x002e,0x10,0x20,0x0d00},//'.'
{0xb5c8,0x20,0x20,0x0d40},//'等'
{0xb4fd,0x20,0x20,0x0dc0},//'待'
{0xc1ac,0x20,0x20,0x0e40},//'连'
{0xbdd3,0x20,0x20,0x0ec0},//'接'
{0xb3a2,0x20,0x20,0x0f40},//'尝'
{0xcad4,0x20,0x20,0x0fc0},//'试'
{0xcab9,0x20,0x20,0x1040},//'使'
{0xd3c3,0x20,0x20,0x10c0},//'用'
{0xc8ed,0x20,0x20,0x1140},//'软'
{0xbcfe,0x20,0x20,0x11c0},//'件'
{0xcad6,0x20,0x20,0x1240},//'手'
{0xb6af,0x20,0x20,0x12c0},//'动'
{0xb4a5,0x20,0x20,0x1340},//'触'
{0xb7a2,0x20,0x20,0x13c0},//'发'
{0xb5d8,0x20,0x20,0x1440},//'地'
{0xd6b7,0x20,0x20,0x14c0},//'址'
{0xc7bf,0x20,0x20,0x1540},//'强'
{0xd6c6,0x20,0x20,0x15c0},//'制'
};
#endif
loader/update_ui/include/ui/ui_api.h
+19
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@@ -0,0 +1,19 @@
#ifndef _UI_API_H_
#define _UI_API_H_
enum ui_devices_type {
LED_7,
LCD_SEG3X9,
TFT_LCD,//彩屏
DOT_LCD,//点阵屏
};
//板级配置数据结构
struct ui_devices_cfg {
enum ui_devices_type type;
void *private_data;
};
#endif
loader/update_ui/include/ui/ui_basic.h
+13
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@@ -0,0 +1,13 @@
#ifndef __BASIC_H__
#define __BASIC_H__
#include "typedef.h"
void _memset(void *dst, u8 v, u32 len);
void _memset_ff(void *dst, u32 len);
void _memset_00(void *dst, u32 len);
#define ALIGN_MASK 0x3
#endif
loader/update_ui/include/ui/ui_draw_arc.h
+85
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@@ -0,0 +1,85 @@
#ifndef __DRAW_ARC_H__
#define __DRAW_ARC_H__
#include "typedef.h"
#include "ui/ui_mask.h"
#include "ui/ui_basic.h"
#define COLOR_16_SWAP 0
typedef union {
struct {
#if COLOR_16_SWAP == 0
u16 blue : 5;
u16 green : 6;
u16 red : 5;
#else
u16 green_h : 3;
u16 red : 5;
u16 blue : 5;
u16 green_l : 3;
#endif
} ch;
u16 full;
} color16_t;
typedef color16_t color_t;
enum {
BORDER_SIDE_NONE = 0x00,
BORDER_SIDE_BOTTOM = 0x01,
BORDER_SIDE_TOP = 0x02,
BORDER_SIDE_LEFT = 0x04,
BORDER_SIDE_RIGHT = 0x08,
BORDER_SIDE_FULL = 0x0F,
BORDER_SIDE_INTERNAL = 0x10,
_BORDER_SIDE_LAST
};
enum {
OPA_TRANSP = 0,
OPA_COVER = 255,
};
#define RADIUS_CIRCLE (0x7FFF)
#define COLOR_BLACK 0x0000
#define SPLIT_RADIUS_LIMIT 10
#define SPLIT_ANGLE_GAP_LIMIT 60
typedef struct {
int radius;
color_t bg_color;
u8 bg_opa;
color_t border_color;
int border_width;
int border_side;
u8 border_opa;
} draw_rect_dsc_t;
typedef struct {
color_t color;
int width;
u8 opa;
u8 round_start : 1;
u8 round_end : 1;
} draw_line_dsc_t;
typedef struct {
int center_x;
int center_y;
int radius;
u16 start_angle;
u16 end_angle;
u16 start_quarter;
u16 end_quarter;
int width;
draw_rect_dsc_t *draw_dsc;
const area_t *draw_area;
const area_t *clip_area;
} quarter_draw_dsc_t;
#endif
loader/update_ui/include/ui/ui_mask.h
+143
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@@ -0,0 +1,143 @@
#ifndef __MASK_H__
#define __MASK_H__
#include "typedef.h"
#include "ui/ui_type.h"
#include "ui/ui_math.h"
typedef u8(*mask_cb)(u8 *mask_buf, int abs_x, int abs_y, int len, void *p);
typedef struct {
void *param;
void *custom_id;
} _mask_saved_t;
#define MASK_ID_INV (-1)
#define _MASK_MAX_NUM 16
typedef _mask_saved_t _mask_saved_arr_t[_MASK_MAX_NUM];
enum {
MASK_TYPE_LINE,
MASK_TYPE_ANGLE,
MASK_TYPE_RADIUS,
MASK_TYPE_FADE,
MASK_TYPE_MAP,
};
enum {
MASK_LINE_SIDE_LEFT = 0,
MASK_LINE_SIDE_RIGHT,
MASK_LINE_SIDE_TOP,
MASK_LINE_SIDE_BOTTOM,
};
enum {
MASK_RES_TRANSP,
MASK_RES_FULL_COVER,
MASK_RES_CHANGED,
MASK_RES_UNKNOWN
};
typedef struct {
mask_cb cb;
u8 type;
} mask_common_dsc_t;
typedef struct {
mask_common_dsc_t dsc;
struct {
area_t rect;
int radius;
u8 outer: 1;
} cfg;
int y_prev;
sqrt_res_t y_prev_x;
} mask_radius_param_t;
typedef struct {
mask_common_dsc_t dsc;
struct {
point_t p1;
point_t p2;
u8 side : 2;
} cfg;
point_t origo;
int xy_steep;
int yx_steep;
int steep;
int spx;
u8 flat : 1;
u8 inv: 1;
} mask_line_param_t;
typedef struct {
mask_common_dsc_t dsc;
struct {
point_t vertex_p;
int start_angle;
int end_angle;
} cfg;
mask_line_param_t start_line;
mask_line_param_t end_line;
u16 delta_deg;
} mask_angle_param_t;
void mask_angle_init(mask_angle_param_t *param, int vertex_x, int vertex_y, int start_angle, int end_angle);
void mask_radius_init(mask_radius_param_t *param, const area_t *rect, int radius, bool inv);
void mask_line_points_init(mask_line_param_t *param, int p1x, int p1y, int p2x, int p2y, u8 side);
void mask_line_angle_init(mask_line_param_t *param, int p1x, int py, int angle, u8 side);
u8 mask_get_cnt(void);
int mask_add(void *param, void *custom_id);
void *mask_remove_id(int id);
u8 mask_apply(u8 *mask_buf, int abs_x, int abs_y, int len);
#define OPA_MIN 2
#define OPA_MAX 253
#define MATH_UDIV255(x) ((u32)((u32) (x) * 0x8081) >> 0x17)
static inline u8 mask_mix(u8 mask_act, u8 mask_new)
{
if (mask_new >= OPA_MAX) {
return mask_act;
}
if (mask_new <= OPA_MIN) {
return 0;
}
return MATH_UDIV255(mask_act * mask_new);// >> 8);
}
static inline void *_memcpy_small(void *dst, const void *src, u32 len)
{
u8 *d8 = (u8 *)dst;
const u8 *s8 = (const u8 *)src;
while (len) {
*d8 = *s8;
d8++;
s8++;
len--;
}
return dst;
}
inline static void area_copy(area_t *dest, const area_t *src)
{
_memcpy_small(dest, src, sizeof(area_t));
}
static inline int area_get_width(const area_t *area_p)
{
return (int)(area_p->x2 - area_p->x1 + 1);
}
static inline int area_get_height(const area_t *area_p)
{
return (int)(area_p->y2 - area_p->y1 + 1);
}
#endif
loader/update_ui/include/ui/ui_math.h
+35
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@@ -0,0 +1,35 @@
#ifndef __MATH_H__
#define __MATH_H__
#include "typedef.h"
typedef struct {
u16 i;
u16 f;
} sqrt_res_t;
#define MATH_MIN(a, b) ((a) < (b) ? (a) : (b))
#define MATH_MAX(a, b) ((a) > (b) ? (a) : (b))
#define MATH_ABS(x) ((x) > 0 ? (x) : (-(x)))
#define TRIGO_SHIFT 15
int _trigo_sin(int angle);
void _sqrt(u32 x, sqrt_res_t *q, u32 mask);
static inline void sqrt_approx(sqrt_res_t *q, sqrt_res_t *ref, u32 x)
{
x = x << 8;
u32 raw = (ref->i << 4) + (ref->f >> 4);
u32 raw2 = raw * raw;
int d = x - raw2;
d = (int)d / (int)(2 * raw) + raw;
q->i = d >> 4;
q->f = (d & 0xF) << 4;
}
#endif
loader/update_ui/include/ui/ui_type.h
+32
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@@ -0,0 +1,32 @@
#ifndef __TYPE_H__
#define __TYPE_H__
#include "typedef.h"
#define INT32_MAX 2147483647
#define INT32_MIN (-INT32_MAX - 1)
struct rect {
int left;
int top;
int width;
int height;
};
typedef struct {
int x1;
int y1;
int x2;
int y2;
} area_t;
typedef struct {
int x;
int y;
} point_t;
#define AT_UI_SIM_RAM //AT(.volatile_ram_code)
#endif
loader/update_ui/include/update_status.h
+53
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@@ -0,0 +1,53 @@
#ifndef __UPDATE_STATUS_H__
#define __UPDATE_STATUS_H__
enum {
UPDATE_ERR_NONE = 0,
UPDATE_ERR_UFW_HEAD_CRC_ERR,
UPDATE_ERR_NOT_FIND_LOADER_FILE,
UPDATE_ERR_NOT_FIND_TARGET_LOADER,
UPDATE_ERR_LOADER_HEAD_CRC_ERR = 4,
UPDATE_ERR_MALLOC_ERR,
UPDATE_ERR_LOADER_WRITE_ERR,
UPDATE_ERR_FILE_HANDLE_ERR,
UPDATE_ERR_LOADER_VERIFY_ERR = 8,
UPDATE_ERR_NOT_FIND_FLASH_BIN,
UPDATE_ERR_FLASH_HEAD_CRC_ERR,
UPDATE_ERR_NOT_FIND_TARGET_FILE,
UPDATE_ERR_KEY_ERR = 12,
UPDATE_ERR_UBOOT_NOT_MATCH,
UPDATE_ERR_READ_REMOTE_FILE_ERR,
UPDATE_ERR_REMOTE_RES_FILE_CRC_ERR,
UPDATE_ERR_CODE_VERIFY_ERR = 16,
UPDATE_ERR_RES0_VERIFY_ERR,
UPDATE_ERR_NOT_FIND_RESERVE_DIR_FILE,
UPDATE_ERR_LOCAL_FILE_HEAD_CRC_ERR,
UPDATE_ERR_LOCAL_FILE_DATA_CRC_ERR = 20,
UPDATE_ERR_PARAM_ERR,
UPDATE_ERR_BT_CFG_UPDATE_ERR,
UPDATE_ERR_TONE_UPDATE_ERR,
UPDATE_ERR_RESERVED_CONFIG_UPDATE_ERR = 24,
UPDATE_ERR_PRODUCT_ID_NOT_MATCH,
UPDATE_ERR_CONN_ERR,
};
typedef enum {
UPDATE_START = 0, //Éý¼¶¿ªÊ¼ param 0:Éý¼¶¿ªÊ¼ 1:½øÈëÉý¼¶ 2:½øÈëÇ¿ÖÆÉý¼¶
UPDATE_STOP, //Éý¼¶½áÊø param update error code
UPDATE_PROCESS, //Éý¼¶ÖÐ param Éý¼¶½ø¶Èpercent = param/100
EX_API_UPDATE_TIPS_WAIT_CONN, //µÈ´ýÀ¶ÑÀÁ¬½Ó param struct _user_api_param_t
EX_API_UPDATE_TIPS_WAIT_UPDATE, //µÈ´ýÉý¼¶ param struct _user_api_param_t
EX_API_UPDATE_TIPS_WAIT_START_UPDATE, //µÈ´ýAPPÊÖ¶¯´¥·¢Éý¼¶ param struct _user_api_param_t
EX_API_UPDATE_TIPS_UPDATEING, //¹ã²¥Éý¼¶Ê¹ÓÃ
EX_API_UPDATE_CUSTOM_INFO = 0xff, //ÓÃÓÚ¿Í»§×Ô¶¨Òå²Ù×÷£¬ÀýÈçÍùuser_api.bin´«Èë²ÎÊý
} UPDATA_STATUS;
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/br35.h
+1615
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File diff suppressed because it is too large Load Diff
loader/update_ui/include_lib/driver/cpu/br35/asm/cache.h
+41
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@@ -0,0 +1,41 @@
#ifndef __Q32DSP_CACHE__
#define __Q32DSP_CACHE__
#include "icache.h"
#include "dcache.h"
//#include "generic/typedef.h"
typedef struct __cache_info {
unsigned int cache_type; // 0:icache; 1:dcache
unsigned int cpu_id;
unsigned int efficiency;
} CACHE_INFO;
#if 0 // 供外界使用的接口,已经在 icache.h 和 rocache.h 中定义
// void flush_dcache(void *ptr, int len);
// void flushinv_dcache(void *ptr, int len);
void IcuEnable(void);
void DcuEnable(void);
void IcuWaitIdle(void);
void DcuWaitIdle(void);
void IcuDisable(void);
void DcuDisable(void);
void IcuFlushinvAll(void);
void IcuUnlockAll(void);
void IcuFlushinvRegion(int *beg, int len);
void IcuUnlockRegion(int *beg, int len);
void IcuLockRegion(int *beg, int len);
void IcuPfetchRegion(int *beg, int len);
void DcuFlushinvAll(void);
void DcuFlushinvRegion(int *beg, int len);
void DcuPfetchRegion(int *beg, int len);
void IcuInitial(void);
void DcuInitial(void);
#endif
#define WAIT_DCACHE_IDLE do {DcuWaitIdle();} while(0);
#define WAIT_ICACHE_IDLE do {IcuWaitIdle();} while(0);
//#define WAIT_DCACHE_IDLE do{asm volatile("csync"); while(!(JL_DCU->CON & BIT(31)));} while(0);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/charge.h
+170
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@@ -0,0 +1,170 @@
#ifndef _CHARGE_H_
#define _CHARGE_H_
#include "typedef.h"
#include "device.h"
/*------充满电电压选择 4.044V-4.634V-------*/
//4.2V电池配置0~15
#define CHARGE_FULL_V_4040_4P2V 0
#define CHARGE_FULL_V_4060_4P2V 1
#define CHARGE_FULL_V_4080_4P2V 2
#define CHARGE_FULL_V_4100_4P2V 3
#define CHARGE_FULL_V_4120_4P2V 4
#define CHARGE_FULL_V_4140_4P2V 5
#define CHARGE_FULL_V_4160_4P2V 6
#define CHARGE_FULL_V_4180_4P2V 7
#define CHARGE_FULL_V_4200_4P2V 8
#define CHARGE_FULL_V_4220_4P2V 9
#define CHARGE_FULL_V_4240_4P2V 10
#define CHARGE_FULL_V_4260_4P2V 11
#define CHARGE_FULL_V_4280_4P2V 12
#define CHARGE_FULL_V_4300_4P2V 13
#define CHARGE_FULL_V_4320_4P2V 14
#define CHARGE_FULL_V_4340_4P2V 15
//4.4V电池配置16~31
#define CHARGE_FULL_V_4240_4P4V 16
#define CHARGE_FULL_V_4260_4P4V 17
#define CHARGE_FULL_V_4280_4P4V 18
#define CHARGE_FULL_V_4300_4P4V 19
#define CHARGE_FULL_V_4320_4P4V 20
#define CHARGE_FULL_V_4340_4P4V 21
#define CHARGE_FULL_V_4360_4P4V 22
#define CHARGE_FULL_V_4380_4P4V 23
#define CHARGE_FULL_V_4400_4P4V 24
#define CHARGE_FULL_V_4420_4P4V 25
#define CHARGE_FULL_V_4440_4P4V 26
#define CHARGE_FULL_V_4460_4P4V 27
#define CHARGE_FULL_V_4480_4P4V 28
#define CHARGE_FULL_V_4500_4P4V 29
#define CHARGE_FULL_V_4520_4P4V 30
#define CHARGE_FULL_V_4540_4P4V 31
//4.5V电池配置32-47
#define CHARGE_FULL_V_4340_4P5V 32
#define CHARGE_FULL_V_4360_4P5V 33
#define CHARGE_FULL_V_4380_4P5V 34
#define CHARGE_FULL_V_4400_4P5V 35
#define CHARGE_FULL_V_4420_4P5V 36
#define CHARGE_FULL_V_4440_4P5V 37
#define CHARGE_FULL_V_4460_4P5V 38
#define CHARGE_FULL_V_4480_4P5V 39
#define CHARGE_FULL_V_4500_4P5V 40
#define CHARGE_FULL_V_4520_4P5V 41
#define CHARGE_FULL_V_4540_4P5V 42
#define CHARGE_FULL_V_4560_4P5V 43
#define CHARGE_FULL_V_4580_4P5V 44
#define CHARGE_FULL_V_4600_4P5V 45
#define CHARGE_FULL_V_4620_4P5V 46
#define CHARGE_FULL_V_4640_4P5V 47
#define CHARGE_FULL_V_MAX 48
/*
充电电流选择
恒流：40-300mA
*/
#define CHARGE_mA_40 0
#define CHARGE_mA_50 1
#define CHARGE_mA_60 2
#define CHARGE_mA_70 3
#define CHARGE_mA_80 4
#define CHARGE_mA_100 5
#define CHARGE_mA_120 6
#define CHARGE_mA_140 7
#define CHARGE_mA_160 8
#define CHARGE_mA_180 9
#define CHARGE_mA_200 10
#define CHARGE_mA_220 11
#define CHARGE_mA_240 12
#define CHARGE_mA_260 13
#define CHARGE_mA_280 14
#define CHARGE_mA_300 15
#define CHARGE_mA_4 (BIT(4)|CHARGE_mA_40)
#define CHARGE_mA_5 (BIT(4)|CHARGE_mA_50)
#define CHARGE_mA_6 (BIT(4)|CHARGE_mA_60)
#define CHARGE_mA_7 (BIT(4)|CHARGE_mA_70)
#define CHARGE_mA_8 (BIT(4)|CHARGE_mA_80)
#define CHARGE_mA_10 (BIT(4)|CHARGE_mA_100)
#define CHARGE_mA_12 (BIT(4)|CHARGE_mA_120)
#define CHARGE_mA_14 (BIT(4)|CHARGE_mA_140)
#define CHARGE_mA_16 (BIT(4)|CHARGE_mA_160)
#define CHARGE_mA_18 (BIT(4)|CHARGE_mA_180)
#define CHARGE_mA_20 (BIT(4)|CHARGE_mA_200)
#define CHARGE_mA_22 (BIT(4)|CHARGE_mA_220)
#define CHARGE_mA_24 (BIT(4)|CHARGE_mA_240)
#define CHARGE_mA_26 (BIT(4)|CHARGE_mA_260)
#define CHARGE_mA_28 (BIT(4)|CHARGE_mA_280)
#define CHARGE_mA_30 (BIT(4)|CHARGE_mA_300)
#define CHARGE_TRICKLE_EN BIT(4)
/* 充电口下拉电阻 50k ~ 200k */
#define CHARGE_PULLDOWN_50K 0
#define CHARGE_PULLDOWN_100K 1
#define CHARGE_PULLDOWN_150K 2
#define CHARGE_PULLDOWN_200K 3
#define CHARGE_CCVOL_V 300 //涓流充电向恒流充电的转换点
#define DEVICE_EVENT_FROM_CHARGE (('C' << 24) | ('H' << 16) | ('G' << 8) | '\0')
struct charge_platform_data {
u8 charge_en; //内置充电使能
u8 charge_poweron_en; //开机充电使能
u8 charge_full_V; //充满电电压大小
u8 charge_full_mA; //充满电电流大小
u16 charge_mA; //恒流充电电流大小
u16 charge_trickle_mA; //涓流充电电流大小
u8 ldo5v_pulldown_en; //下拉使能位
u8 ldo5v_pulldown_lvl; //ldo5v的下拉电阻配置项,若充电舱需要更大的负载才能检测到插入时，请将该变量置为对应阻值
u8 ldo5v_pulldown_keep; //下拉电阻在softoff时是否保持,ldo5v_pulldown_en=1时有效
u16 ldo5v_off_filter; //ldo5v拔出过滤值，过滤时间 = (filter*2 + 20)ms,ldoin<0.6V且时间大于过滤时间才认为拔出,对于充满直接从5V掉到0V的充电仓，该值必须设置成0，对于充满由5V先掉到0V之后再升压到xV的充电仓，需要根据实际情况设置该值大小
u16 ldo5v_on_filter; //ldo5v>vbat插入过滤值,电压的过滤时间 = (filter*2)ms
u16 ldo5v_keep_filter; //1V<ldo5v<vbat维持电压过滤值,过滤时间= (filter*2)ms
u16 charge_full_filter; //充满过滤值,连续检测充满信号恒为1才认为充满,过滤时间 = (filter*2)ms
};
#define CHARGE_PLATFORM_DATA_BEGIN(data) \
struct charge_platform_data data = {
#define CHARGE_PLATFORM_DATA_END() \
};
enum {
CHARGE_EVENT_CHARGE_START,
CHARGE_EVENT_CHARGE_CLOSE,
CHARGE_EVENT_CHARGE_FULL,
CHARGE_EVENT_LDO5V_KEEP,
CHARGE_EVENT_LDO5V_IN,
CHARGE_EVENT_LDO5V_OFF,
};
//使用的电池类型
enum {
BAT_4P2, //4.2V的电池
BAT_4P4,
BAT_4P5,
};
void set_charge_event_flag(u8 flag);
void set_charge_online_flag(u8 flag);
void set_charge_event_flag(u8 flag);
u8 get_charge_online_flag(void);
u8 get_charge_poweron_en(void);
void set_charge_poweron_en(u32 onOff);
void charge_start(void);
void charge_close(void);
u8 get_charge_mA_config(void);
void set_charge_mA(u8 charge_mA);
u8 get_ldo5v_pulldown_en(void);
u8 get_ldo5v_pulldown_res(void);
u8 get_ldo5v_online_hw(void);
u8 get_lvcmp_det(void);
void charge_check_and_set_pinr(u8 mode);
u16 get_charge_full_value(void);
void charge_module_stop(void);
void charge_module_restart(void);
void ldoin_wakeup_isr(void);
int charge_init(const struct charge_platform_data *data);
void charge_set_ldo5v_detect_stop(u8 stop);
u8 check_pinr_shutdown_enable(void);
#endif //_CHARGE_H_
loader/update_ui/include_lib/driver/cpu/br35/asm/chargestore.h
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#ifndef __BR28_CHARGESTORE_H__
#define __BR28_CHARGESTORE_H__
#include "generic/typedef.h"
enum {
CMD_COMPLETE,
CMD_RECVDATA,
};
enum {
MODE_RECVDATA,
MODE_SENDDATA,
};
enum {
TYPE_NORMAL,
TYPE_F95,
};
#define PROTOCAL_DEFAULT 0
#define PROTOCAL_LOADER 1
#define LDOIN_BIND_IO IO_PORTP_00
struct chargestore_platform_data {
u32 baudrate;
u32 io_port;
u8 uart_irq;
void (*init)(const struct chargestore_platform_data *);
void (*open)(u8 mode);
void (*close)(void);
void (*write)(u8 *, u8);
};
struct chargestore_data_handler {
int (*data_cb)(u8 *buf, u8 len);
};
#define CHARGESTORE_HANDLE_REG(name, data_callback) \
const struct chargestore_data_handler chargestore_##name \
SEC_USED(.chargestore_callback_txt) = {data_callback};
extern struct chargestore_data_handler chargestore_handler_begin[];
extern struct chargestore_data_handler chargestore_handler_end[];
#define list_for_each_loop_chargestore(h) \
for (h=chargestore_handler_begin; h<chargestore_handler_end; h++)
#define CHARGESTORE_PLATFORM_DATA_BEGIN(data) \
static const struct chargestore_platform_data data = {
#define CHARGESTORE_PLATFORM_DATA_END() \
.baudrate = 9600, \
.init = chargestore_init, \
.open = chargestore_open, \
.close = chargestore_close, \
.write = chargestore_write, \
};
void chargestore_open(u8 mode);
void chargestore_close(void);
void chargestore_write(u8 *data, u8 len);
void chargestore_init(const struct chargestore_platform_data *);
void chargestore_set_update_ram(void);
u8 chargestore_get_det_level(u8 chip_type);
//app层使用的接口
void chargestore_api_close(void);
int chargestore_api_write(u8 *buf, u8 len);
void chargestore_api_init(const struct chargestore_platform_data *arg);
void chargestore_api_wait_complete(void);
void chargestore_api_set_timeout(u16 timeout);
void chargestore_api_stop(void);
void chargestore_api_restart(void);
u8 chargestore_api_crc8(u8 *ptr, u8 len);
int loader_uart_write(u8 *buf, u8 len);
void chargestore_set_protocal(u8 protocal);
void chargestore_set_loader_update_callback(void (*loader_callback)(void *p, void *buf, u32 len));
void chargestore_ldo5v_fall_deal(void);
void chargestore_set_baudrate(u32 baudrate);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/clock_hal.h
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#ifndef __CLOCK_HAL_H__
#define __CLOCK_HAL_H__
#include "typedef.h"
enum CLK_OUT_SOURCE0 {
CLK_OUT_SRC0_NULL = 0,
CLK_OUT_SRC0_LRC_CLK,
CLK_OUT_SRC0_STD_12M,
CLK_OUT_SRC0_STD_24M,
CLK_OUT_SRC0_STD_48M,
CLK_OUT_SRC0_BTOSC_24M,
CLK_OUT_SRC0_BTOSC_48M,
CLK_OUT_SRC0_HSB_CLK,
CLK_OUT_SRC0_LSB_CLK,
CLK_OUT_SRC0_PLL_96M,
CLK_OUT_SRC0_RC_250K,
CLK_OUT_SRC0_RC_16M,
CLK_OUT_SRC0_LRC_24M,
CLK_OUT_SRC0_ALNK0_CLK,
CLK_OUT_SRC0_RF_CKO_CLK,
CLK_OUT_SRC0_USB_CLK,
};
enum CLK_OUT_SOURCE1 {
CLK_OUT_SRC2_NULL = 0,
CLK_OUT_SRC2_SYS_PLL_D3P5 = 4,
CLK_OUT_SRC2_SYS_PLL_D2P5,
CLK_OUT_SRC2_SYS_PLL_D2P0,
CLK_OUT_SRC2_SYS_PLL_D1P5,
CLK_OUT_SRC2_SYS_PLL_D1P0,
};
void clk_out0(u8 gpio, enum CLK_OUT_SOURCE0 clk);
void clk_out2(u8 gpio, enum CLK_OUT_SOURCE1 clk, u8 div);
//无 clk_out1
void clk_out0_close(u8 gpio);
void clk_out2_close(u8 gpio);
enum CLK_OUT_SOURCE {
//ch0,ch1. no div
CLK_OUT_NULL = 0x0100,
CLK_OUT_LRC_CLK,
CLK_OUT_STD_12M,
CLK_OUT_STD_24M,
CLK_OUT_STD_48M,
CLK_OUT_BTOSC_24M,
CLK_OUT_BTOSC_48M,
CLK_OUT_HSB_CLK,
CLK_OUT_LSB_CLK,
CLK_OUT_PLL_96M,
CLK_OUT_RC_250K,
CLK_OUT_RC_16M,
CLK_OUT_LRC_24M,
CLK_OUT_ALNK0_CLK,
CLK_OUT_RF_CKO_CLK,
CLK_OUT_USB_CLK,
//ch2. div:0~63(div1~div64)
CLK_OUT_NULL_DIV = 0x0400,
CLK_OUT_SYS_PLL_D3P5_DIV = 0x0404,
CLK_OUT_SYS_PLL_D2P5_DIV,
CLK_OUT_SYS_PLL_D2P0_DIV,
CLK_OUT_SYS_PLL_D1P5_DIV,
CLK_OUT_SYS_PLL_D1P0_DIV,
};
#define CLK_OUT_CH_MASK 0b111
#define CLK_OUT_CH0_SEL(clk) SFR(JL_LSBCLK->STD_CON1,0,5,clk)
#define CLK_OUT_CH0_GET_CLK() ((JL_LSBCLK->STD_CON1>>0)&0x01f)
#define CLK_OUT_CH0_DIV(div) //no div
#define CLK_OUT_CH0_EN(en) //no en
#define CLK_OUT0_FIXED_IO_EN(en) //no en
#define IS_CLK_OUT0_FIXED_IO() (0)//no fix
#define CLK_OUT_CH1_SEL(clk) SFR(JL_LSBCLK->STD_CON1,5,5,clk)
#define CLK_OUT_CH1_GET_CLK() ((JL_LSBCLK->STD_CON1>>5)&0x01f)
#define CLK_OUT_CH1_DIV(div) //no div
#define CLK_OUT_CH1_EN(en) //no en
#define CLK_OUT1_FIXED_IO_EN(en) //no en
#define IS_CLK_OUT1_FIXED_IO() (0)//no fix
#define CLK_OUT_CH2_SEL(clk) SFR(JL_LSBCLK->STD_CON1,10,4,clk)
#define CLK_OUT_CH2_GET_CLK() ((JL_LSBCLK->STD_CON1>>10)&0x0f)
#define CLK_OUT_CH2_DIV(div) SFR(JL_LSBCLK->STD_CON1,14,6,div)
#define CLK_OUT_CH2_EN(en) //no en
#define CLK_OUT2_FIXED_IO_EN(en) //no en
#define IS_CLK_OUT2_FIXED_IO() (0)//no fix
#define CLK_OUT_CH3_SEL(clk) //no ch3
#define CLK_OUT_CH3_GET_CLK() (0)//no ch3
#define CLK_OUT_CH3_DIV(div) //no div
#define CLK_OUT_CH3_EN(en) //no en
#define CLK_OUT3_FIXED_IO_EN(en) //no en
#define IS_CLK_OUT3_FIXED_IO() (0)//no fix
#define CLK_OUT_CH4_SEL(clk) //no ch4
#define CLK_OUT_CH4_GET_CLK() (0)//no ch4
#define CLK_OUT_CH4_DIV(div) //no div
#define CLK_OUT_CH4_EN(en) //no en
#define CLK_OUT4_FIXED_IO_EN(en) //no en
#define IS_CLK_OUT4_FIXED_IO() (0)//no fix
u32 clk_out_fixed_io_check(u32 gpio);
//for bt
void clk_set_osc_cap(u8 sel_l, u8 sel_r);
u32 clk_get_osc_cap();
#define BT_CLOCK_IN(x) //SFR(JL_CLOCK->CLK_CON1, 14, 2, x)
//for MACRO - BT_CLOCK_IN
enum {
BT_CLOCK_IN_PLL48M = 0,
BT_CLOCK_IN_HSB,
BT_CLOCK_IN_LSB,
BT_CLOCK_IN_DISABLE,
};
#endif /*CLOCK_HAL_H*/
loader/update_ui/include_lib/driver/cpu/br35/asm/cpu.h
+278
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#ifndef ASM_CPU_H
#define ASM_CPU_H
#include "br35.h"
#include "csfr.h"
#include "cache.h"
#ifndef __ASSEMBLY__
#if ((!defined __cplusplus) && (!defined BOOL_DEFINE_CONFLICT))
typedef unsigned char bool;
#endif
typedef unsigned char u8, BOOL;
typedef char s8;
typedef unsigned short u16;
typedef signed short s16;
typedef unsigned int u32;
typedef signed int s32;
typedef unsigned long long u64;
typedef u32 FOURCC;
typedef long long s64;
typedef unsigned long long u64;
#endif
#define ___trig __asm__ volatile ("trigger")
#ifndef BIG_ENDIAN
#define BIG_ENDIAN 0x3021
#endif
#ifndef LITTLE_ENDIAN
#define LITTLE_ENDIAN 0x4576
#endif
#define CPU_ENDIAN LITTLE_ENDIAN
#define CPU_CORE_NUM 1
#define CONFIG_SPINLOCK_ENABLE 0
#define OS_CORE_AFFINITY_ENABLE CONFIG_OS_AFFINITY_ENABLE //app_cfg.mk中定义, Modify Me: 0: 自由分配, 1: 固定核
extern const int CONFIG_CPU_UNMASK_IRQ_ENABLE;
///屏蔽的优先级, < N的优先级不可以响应
#define CPU_IRQ_IPMASK_LEVEL 6
#define CPU_TASK_CLR(a)
#define CPU_TASK_SW(a) \
do { \
q32DSP(a)->ILAT_SET |= BIT(3-a); \
} while (0)
#define CPU_INT_NESTING 2
#define CORE_IDLE_TICK_TIMER_PERIOD 4000 //10 ~ 16000 ms
#ifndef __ASSEMBLY__
#if CPU_CORE_NUM > 1
__attribute__((always_inline))
static int current_cpu_id()
{
unsigned id;
asm volatile("%0 = cnum" : "=r"(id) ::);
return id ;
}
__attribute__((always_inline))
static int core_num(void)
{
u32 num;
asm volatile("%0 = cnum" : "=r"(num) :);
return num;
}
#else
static inline int current_cpu_id()
{
return 0;
}
static inline int core_num(void)
{
return 0;
}
#endif
static inline int cpu_in_irq()
{
int flag;
__asm__ volatile("%0 = icfg" : "=r"(flag));
return flag & 0xff;
}
extern int __cpu_irq_disabled();
static inline int cpu_irq_disabled()
{
int flag;
int ret;
if (CONFIG_CPU_UNMASK_IRQ_ENABLE) {
return __cpu_irq_disabled();
} else {
__asm__ volatile("%0 = icfg" : "=r"(flag));
ret = ((flag & 0x300) != 0x300);
}
return ret;
}
#if 0
static inline int data_sat_s16(int ind)
{
if (ind > 32767) {
ind = 32767;
} else if (ind < -32768) {
ind = -32768;
}
return ind;
}
#else
static inline int data_sat_s16(int ind)
{
__asm__ volatile(
" %0 = sat16(%0)(s) \t\n"
: "=&r"(ind)
: "0"(ind)
:);
return ind;
}
#endif
static inline u32 reverse_u32(u32 data32)
{
#if 0
u8 *dataptr = (u8 *)(&data32);
data32 = (((u32)dataptr[0] << 24) | ((u32)dataptr[1] << 16) | ((u32)dataptr[2] << 8) | (u32)dataptr[3]);
#else
__asm__ volatile("%0 = rev8(%0) \t\n" : "=&r"(data32) : "0"(data32) :);
#endif
return data32;
}
static inline u32 reverse_u16(u16 data16)
{
u32 retv;
#if 0
u8 *dataptr = (u8 *)(&data16);
retv = (((u32)dataptr[0] << 8) | ((u32)dataptr[1]));
#else
retv = ((u32)data16) << 16;
__asm__ volatile("%0 = rev8(%0) \t\n" : "=&r"(retv) : "0"(retv) :);
#endif
return retv;
}
static inline u32 rand32()
{
return JL_RAND->R64L;
}
#define __asm_sine(s64, precision) \
({ \
u64 ret; \
u8 sel = 0; \
__asm__ volatile ("%0 = copex(%1) (%2)" : "=r"(ret) : "r"(s64), "i"(sel)); \
ret = ret>>32; \
ret;\
})
void p33_soft_reset(void);
static inline void cpu_reset(void)
{
// JL_CLOCK->PWR_CON |= (1 << 4);
p33_soft_reset();
}
#define __asm_csync() \
do { \
asm volatile("csync;"); \
} while (0)
#include "asm/irq.h"
#include "generic/printf.h"
#include "generic/log.h"
#define arch_atomic_read(v) \
({ \
__asm_csync(); \
(*(volatile int *)&(v)->counter); \
})
static inline void q32DSP_testset(u8 volatile *ptr)
{
asm volatile(
" 1: \n\t "
" testset b[%0] \n\t "
" ifeq goto 1b \n\t "
:
: "p"(ptr)
: "memory"
);
}
static inline void q32DSP_testclr(u8 volatile *ptr)
{
asm volatile(
" b[%0] = %1 \n\t "
:
: "p"(ptr), "r"(0)
: "memory"
);
}
#define arch_spin_lock(lock) \
do { \
q32DSP_testset(&lock->rwlock);\
}while(0)
#define arch_spin_unlock(lock) \
do{ \
q32DSP_testclr(&lock->rwlock) ;\
}while(0)
extern void local_irq_disable();
extern void local_irq_enable();
#define CPU_SR_ALLOC() \
// int flags
#define CPU_CRITICAL_ENTER() \
do { \
local_irq_disable(); \
}while(0)
#define CPU_CRITICAL_EXIT() \
do { \
local_irq_enable(); \
}while(0)
extern void cpu_assert_debug();
extern const int config_asser;
#define ASSERT(a,...) \
do { \
if(config_asser){\
if(!(a)){ \
printf("cpu %d file:%s, line:%d",current_cpu_id(), __FILE__, __LINE__); \
printf("ASSERT-FAILD: "#a" "__VA_ARGS__); \
while(1);/*cpu_assert_debug();*/ \
} \
}else {\
if(!(a)){ \
cpu_reset(); \
}\
}\
}while(0);
#endif //__ASSEMBLY__
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/crc16.h
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#ifndef __CPU_CRC16_H__
#define __CPU_CRC16_H__
#include "typedef.h"
u16 CRC16(const void *ptr, u32 len);
/* i_val: CRC校验初值 */
u16 CRC16_with_initval(const void *ptr, u32 len, u16 i_val);
u16 CRC16_with_code(const void *ptr, u32 len, u16 code);
void spi_crc16_set(u16 crc);
u16 spi_crc16_get(void);
void CrcDecode(void *buf, u16 len);
u16 get_page_efuse(u32 page, u32 delay_cnt);
void init_enc_key(u8 cmd);
u32 get_sfc_enc_key(void);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/csfr.h
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//*********************************************************************************//
// Module name : csfr.h //
// Description : q32DSP core sfr define //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
#ifndef __Q32DSP_CSFR__
#define __Q32DSP_CSFR__
#define __RW volatile // read write
#define __RO volatile const // only read
#define __WO volatile // only write
#define __u8 unsigned int // u8 to u32 special for struct
#define __u16 unsigned int // u16 to u32 special for struct
#define __u32 unsigned int
#define csfr_base 0xff0000
//*********************************************************************************
//
// hcore_sfr
//
//*********************************************************************************
//............. 0x0000 - 0x00ff............
typedef struct {
__RW __u32 CON0;
__RW __u32 FTMAX;
} JL_CMNG_TypeDef;
#define JL_CMNG_BASE (csfr_base + map_adr(0x00, 0x00))
#define JL_CMNG ((JL_CMNG_TypeDef *)JL_CMNG_BASE)
//............. 0x0100 - 0x01ff............
//typedef struct {
// __RW __u32 CON;
// __RW __u32 KEY;
//} JL_SDTAP_TypeDef;
//#define JL_SDTAP_BASE (csfr_base + map_adr(0x01, 0x00))
//#define JL_SDTAP ((JL_SDTAP_TypeDef *)JL_SDTAP_BASE)
//............. 0x0200 - 0x02ff............
typedef struct {
__RW __u32 WREN;
__RW __u32 CON0;
__RW __u32 CON1;
__RW __u32 CON2;
__RW __u32 CON3;
__RW __u32 MSG0;
__RW __u32 MSG1;
__RW __u32 MSG2;
__RW __u32 MSG3;
__RO __u32 ID;
} JL_CEMU_TypeDef;
#define JL_CEMU_BASE (csfr_base + map_adr(0x02, 0x00))
#define JL_CEMU ((JL_CEMU_TypeDef *)JL_CEMU_BASE)
//............. 0x0300 - 0x03ff............
#define MPU_INV (1<<31)
#define MPU_PWEN (1<<16)
#define MPU_PREN (1<<8)
#define MPU_PEN (MPU_PWEN | MPU_PREN)
#define MPU_XEN (1<<2)
#define MPU_WEN (1<<1)
#define MPU_REN (1<<0)
#define MPU_IDx_cfg(n, id) (id<<(n*8))
#define MPU_IDx_pen(n, pr, pw) ((pr<<(9+n)) | (pw<<(17+n)))
typedef struct {
__RW __u32 CON[15]; // 0-1 used in br35
__RO __u32 REV0;
__RW __u32 CID[15]; // 0-1 used in br35
__RO __u32 REV1;
__RW __u32 BEG[15]; // 0-1 used in br35
__RO __u32 REV2;
__RW __u32 END[15]; // 0-1 used in br35
__RW __u32 WREN;
} JL_MPU_TypeDef;
#define JL_MPU_BASE (csfr_base + map_adr(0x03, 0x00))
#define JL_MPU ((JL_MPU_TypeDef *)JL_MPU_BASE)
//............. 0x0400 - 0x04ff............
typedef struct {
__RW __u32 CON;
__RW __u32 TLB1_BEG;
__RW __u32 TLB1_END;
} JL_MMU_TypeDef;
#define JL_MMU_BASE (csfr_base + map_adr(0x04, 0x00))
#define JL_MMU ((JL_MMU_TypeDef *)JL_MMU_BASE)
typedef struct {
short page: 14;
short vld: 1;
} JL_MMU_TLB1_TypeDef;
#define JL_MMU_TLB1 ((JL_MMU_TLB1_TypeDef *)(JL_MMU->TLB1_BEG))
//............. 0x0500 - 0x05ff............
//#define JL_TypeDef_L1P JL_TypeDef_q32DSP_ICU
#define JL_TypeDef_L1P JL_TypeDef_q32DSP_DCU
#define JL_L1P_BASE (csfr_base + map_adr(0x05, 0x00))
#define JL_L1P ((JL_TypeDef_L1P *)JL_L1P_BASE)
//............. 0x0600 - 0x06ff............
#define JL_TypeDef_L2I JL_TypeDef_q32DSP_ICU
#define JL_L2I_BASE (csfr_base + map_adr(0x06, 0x00))
#define JL_L2I ((JL_TypeDef_L2I *)JL_L2I_BASE)
//............. 0x0700 - 0x07ff............
#define JL_TypeDef_L2D JL_TypeDef_q32DSP_DCU
#define JL_L2D_BASE (csfr_base + map_adr(0x07, 0x00))
#define JL_L2D ((JL_TypeDef_L2D *)JL_L2D_BASE)
//............. 0x0800 - 0x08ff............
typedef struct {
__RO __u32 CHIP_ID;
__RO __u32 CHIP_VER;
} JL_SYSTEM_TypeDef;
#define JL_SYSTEM_BASE (csfr_base + map_adr(0x08, 0x00))
#define JL_SYSTEM ((JL_SYSTEM_TypeDef *)JL_SYSTEM_BASE)
//............. 0x0900 - 0x09ff............
typedef struct {
__RW __u32 CON;
__RW __u32 BEG;
__RW __u32 END;
__RW __u32 DAT_VLD0;
__RW __u32 DAT_VLD1;
__RW __u32 DAT_VLD2;
__RW __u32 DAT_VLD3;
__RO __u32 ROM_CRC;
__RW __u32 MCFG0_SEL;
__RW __u32 MCFG1_SEL;
__RW __u32 MCFG0_RF1P;
__RW __u32 MCFG0_RF2P;
__RW __u32 MCFG0_RM1P;
__RW __u32 MCFG0_RM2P;
__RW __u32 MCFG0_VROM;
__RW __u32 MCFG1_RM1P;
__RW __u32 MCFG0_CON[2];
__RW __u32 MCFG1_CON[2];
} JL_MBIST_TypeDef;
#define JL_MBIST_BASE (csfr_base + map_adr(0x09, 0x00))
#define JL_MBIST ((JL_MBIST_TypeDef *)JL_MBIST_BASE)
//............. 0x0a00 - 0x0aff............
//typedef struct {
// __RW __u32 CON;
// __RW __u32 CADR;
// __RW __u32 ACC0L;
// __RW __u32 ACC0H;
// __RW __u32 ACC1L;
// __RW __u32 ACC1H;
// __RW __u32 CONST;
// __RW __u32 TEST1;
//} JL_FFT_TypeDef;
//
//#define JL_FFT_BASE (csfr_base + map_adr(0x0a, 0x00))
//#define JL_FFT ((JL_FFT_TypeDef *)JL_FFT_BASE)
//............. 0x0b00 - 0x0bff............
//typedef struct {
///* 00 */ __RW __u32 CON0;
///* 01 */ __RW __u32 LPEN_CON;
///* 02 */ __RW __u32 LSEN_CON;
///* 03 */ __RO __u32 LS_PND;
///* 04 */ __RO __u32 CE_PND;
///* 05 */ __RW __u32 LS_PRD_32K;
///* 06 */ __RW __u32 CE_PRD_32K;
///* 07 */ __RW __u32 LS_PRD_64K;
///* 08 */ __RW __u32 CE_PRD_64K;
///* 09 */ __RW __u32 LS_PRD_ROM;
///* 0a */ __RW __u32 CE_PRD_ROM;
//} JL_ATOLP_TypeDef;
//#define JL_ATOLP_BASE (csfr_base + map_adr(0x0b, 0x00))
//#define JL_ATOLP ((JL_ATOLP_TypeDef *)JL_ATOLP_BASE)
//*********************************************************************************
//
// q32DSP_sfr
//
//*********************************************************************************
//---------------------------------------------//
// q32DSP define
//---------------------------------------------//
#define q32DSP_sfr_offset 0x000800
#define q32DSP_sfr_base (csfr_base + 0xe000)
#define q32DSP_cpu_base (q32DSP_sfr_base + 0x0000)
#define q32DSP_icu_base (q32DSP_sfr_base + 0x0400)
#define q32DSP(n) ((JL_TypeDef_q32DSP *)(q32DSP_sfr_base + q32DSP_sfr_offset*n))
#define q32DSP_icu(n) ((JL_TypeDef_q32DSP_ICU *)(q32DSP_icu_base + q32DSP_sfr_offset*n))
//---------------------------------------------//
// q32DSP core sfr
//---------------------------------------------//
typedef struct {
/* 00 */ __RO __u32 DR00;
/* 01 */ __RO __u32 DR01;
/* 02 */ __RO __u32 DR02;
/* 03 */ __RO __u32 DR03;
/* 04 */ __RO __u32 DR04;
/* 05 */ __RO __u32 DR05;
/* 06 */ __RO __u32 DR06;
/* 07 */ __RO __u32 DR07;
/* 08 */ __RO __u32 DR08;
/* 09 */ __RO __u32 DR09;
/* 0a */ __RO __u32 DR10;
/* 0b */ __RO __u32 DR11;
/* 0c */ __RO __u32 DR12;
/* 0d */ __RO __u32 DR13;
/* 0e */ __RO __u32 DR14;
/* 0f */ __RO __u32 DR15;
/* 10 */ __RO __u32 RETI;
/* 11 */ __RO __u32 RETE;
/* 12 */ __RO __u32 RETX;
/* 13 */ __RO __u32 RETS;
/* 14 */ __RO __u32 SR04;
/* 15 */ __RO __u32 PSR;
/* 16 */ __RO __u32 CNUM;
/* 17 */ __RO __u32 SR07;
/* 18 */ __RO __u32 SR08;
/* 19 */ __RO __u32 SR09;
/* 1a */ __RO __u32 SR10;
/* 1b */ __RO __u32 ICFG;
/* 1c */ __RO __u32 USP;
/* 1d */ __RO __u32 SSP;
/* 1e */ __RO __u32 SP;
/* 1f */ __RO __u32 PCRS;
/* 20 */ __RW __u32 BPCON;
/* 21 */ __RW __u32 BSP;
/* 22 */ __RW __u32 BP0;
/* 23 */ __RW __u32 BP1;
/* 24 */ __RW __u32 BP2;
/* 25 */ __RW __u32 BP3;
/* 26 */ __WO __u32 CMD_PAUSE;
/* 27 */ __RW __u32 BP4;
/* 28 */ __RW __u32 BP5;
/* 29 */ __RW __u32 BP6;
/* 2a */ __RW __u32 BP7;
/* */ __RO __u32 REV2a[0x30 - 0x2a - 1];
/* 30 */ __RW __u32 PMU_CON0;
/* 31 */ __RW __u32 PMU_CON1;
/* 32 */ __RO __u32 RST_ADDR;
/* */ __RO __u32 REV32[0x3b - 0x32 - 1];
/* 3b */ __RW __u8 TTMR_CON;
/* 3c */ __RW __u32 TTMR_CNT;
/* 3d */ __RW __u32 TTMR_PRD;
/* */ __RO __u32 REV3d[0x40 - 0x3d - 1];
/* 40 */ __RW __u32 ICFG00;
/* 41 */ __RW __u32 ICFG01;
/* 42 */ __RW __u32 ICFG02;
/* 43 */ __RW __u32 ICFG03;
/* 44 */ __RW __u32 ICFG04;
/* 45 */ __RW __u32 ICFG05;
/* 46 */ __RW __u32 ICFG06;
/* 47 */ __RW __u32 ICFG07;
/* 48 */ __RW __u32 ICFG08;
/* 49 */ __RW __u32 ICFG09;
/* 4a */ __RW __u32 ICFG10;
/* 4b */ __RW __u32 ICFG11;
/* 4c */ __RW __u32 ICFG12;
/* 4d */ __RW __u32 ICFG13;
/* 4e */ __RW __u32 ICFG14;
/* 4f */ __RW __u32 ICFG15;
/* 50 */ __RW __u32 ICFG16;
/* 51 */ __RW __u32 ICFG17;
/* 52 */ __RW __u32 ICFG18;
/* 53 */ __RW __u32 ICFG19;
/* 54 */ __RW __u32 ICFG20;
/* 55 */ __RW __u32 ICFG21;
/* 56 */ __RW __u32 ICFG22;
/* 57 */ __RW __u32 ICFG23;
/* 58 */ __RW __u32 ICFG24;
/* 59 */ __RW __u32 ICFG25;
/* 5a */ __RW __u32 ICFG26;
/* 5b */ __RW __u32 ICFG27;
/* 5c */ __RW __u32 ICFG28;
/* 5d */ __RW __u32 ICFG29;
/* 5e */ __RW __u32 ICFG30;
/* 5f */ __RW __u32 ICFG31;
/* 60 */ __RO __u32 IPND0;
/* 61 */ __RO __u32 IPND1;
/* 62 */ __RO __u32 IPND2;
/* 63 */ __RO __u32 IPND3;
/* 64 */ __RO __u32 IPND4;
/* 65 */ __RO __u32 IPND5;
/* 66 */ __RO __u32 IPND6;
/* 67 */ __RO __u32 IPND7;
/* 68 */ __WO __u32 ILAT_SET;
/* 69 */ __WO __u32 ILAT_CLR;
/* 6a */ __RW __u32 IPMASK;
/* 6b */ __RW __u32 GIEMASK;
/* 6c */ __RW __u32 IWKUP_NUM;
/* */ __RO __u32 REV6c[0x70 - 0x6c - 1];
/* 70 */ __RW __u32 ETM_CON;
/* 71 */ __RO __u32 ETM_PC0;
/* 72 */ __RO __u32 ETM_PC1;
/* 73 */ __RO __u32 ETM_PC2;
/* 74 */ __RO __u32 ETM_PC3;
/* 75 */ __RW __u32 WP0_ADRH;
/* 76 */ __RW __u32 WP0_ADRL;
/* 77 */ __RW __u32 WP0_DATH;
/* 78 */ __RW __u32 WP0_DATL;
/* 79 */ __RO __u32 WP0_PC;
/* 7a */ __RO __u32 WP0_AMSG;
/* */ __RO __u32 REV7b[0x80 - 0x7a - 1];
/* 80 */ __RW __u32 EMU_CON;
/* 81 */ __RW __u32 EMU_MSG;
/* 82 */ __RW __u32 EMU_SSP_H;
/* 83 */ __RW __u32 EMU_SSP_L;
/* 84 */ __RW __u32 EMU_USP_H;
/* 85 */ __RW __u32 EMU_USP_L;
/* 86 */ __RW __u32 LIM_PC0_H;
/* 87 */ __RW __u32 LIM_PC0_L;
/* 88 */ __RW __u32 LIM_PC1_H;
/* 89 */ __RW __u32 LIM_PC1_L;
/* 8a */ __RW __u32 LIM_PC2_H;
/* 8b */ __RW __u32 LIM_PC2_L;
/* */ __RO __u32 REV8b[0x90 - 0x8b - 1];
/* 90 */ __RW __u32 ESU_CON;
/* 91 */ __RO __u32 CNT_CHIT;
/* 92 */ __RO __u32 CNT_CMIS;
/* 93 */ __RO __u32 CNT_FILL;
/* 94 */ __RO __u32 CNT_IHIT;
/* 95 */ __RO __u32 CNT_IMIS;
/* 96 */ __RO __u32 CNT_RHIT;
/* 97 */ __RO __u32 CNT_RMIS;
/* 98 */ __RO __u32 CNT_WHIT;
/* 99 */ __RO __u32 CNT_WMIS;
} JL_TypeDef_q32DSP;
//---------------------------------------------//
// q32DSP icache sfr
//---------------------------------------------//
typedef struct {
__RW __u32 CON;
__RW __u32 EMU_CON;
__RW __u32 EMU_MSG;
__RW __u32 EMU_ID;
__RW __u32 CMD_CON;
__RW __u32 CMD_BEG;
__RW __u32 CMD_END;
__RW __u32 CNT_RACK;
__RW __u32 CNT_RNAK;
__RW __u32 MBIST_SEL;
__RW __u32 MCFG0_CON[2];
} JL_TypeDef_q32DSP_ICU;
//---------------------------------------------//
// q32DSP dcache sfr
//---------------------------------------------//
typedef struct {
__RW __u32 CON;
__RW __u32 EMU_CON;
__RW __u32 EMU_MSG;
__RW __u32 EMU_ID;
__RW __u32 CNT_WACK;
__RW __u32 CNT_WNAK;
__RW __u32 CNT_RACK;
__RW __u32 CNT_RNAK;
__RW __u32 CMD_CON[4];
__RW __u32 CMD_BEG[4];
__RW __u32 CMD_END[4];
__RW __u32 MBIST_SEL;
__RW __u32 MCFG0_CON[2];
__RO __u32 REV1[0x20 - 0x16 - 1];
__WO __u32 CMO[32];
} JL_TypeDef_q32DSP_DCU;
//*********************************************************************************//
#define TICK_CON (q32DSP(0)->TTMR_CON)
#define TICK_PRD (q32DSP(0)->TTMR_PRD)
#define TICK_CNT (q32DSP(0)->TTMR_CNT)
#define SOFT_CLEAR_PENDING (q32DSP(0)->ILAT_CLR)
#define CPU_MSG (q32DSP(0)->EMU_MSG)
#define CPU_CON (q32DSP(0)->EMU_CON)
#undef __RW
#undef __RO
#undef __WO
#undef __u8
#undef __u16
#undef __u32
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/ctmu.h
+45
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@@ -0,0 +1,45 @@
#ifndef _CTMU_DRV_H_
#define _CTMU_DRV_H_
#include "typedef.h"
#define CTMU_KEY_CH_MAX 3
typedef struct _CTMU_KEY_VAR {
s32 touch_release_buf[CTMU_KEY_CH_MAX]; //按键释放值滤波器buffer
u16 touch_cnt_buf[CTMU_KEY_CH_MAX]; //按键计数值滤波器buffer
s16 FLT1CFG1; //滤波器1配置参数1
s16 FLT1CFG2; //滤波器1配置参数2, 等于(-RELEASECFG0)<<FLT1CFG0
s16 PRESSCFG; //按下判决门限
s16 RELEASECFG0; //释放判决门限0
s16 RELEASECFG1; //释放判决门限1
s8 FLT0CFG; //滤波器0配置参数(0/1/2/3)
s8 FLT1CFG0; //滤波器1配置参数0
u16 touch_key_state; //按键状态标志，随时可能被中断改写，按键处理程序需要将此标志复制出来再行处理
u8 touch_init_cnt[CTMU_KEY_CH_MAX]; //初始化计数器，非0时进行初始化
} sCTMU_KEY_VAR;
struct ctmu_key_port {
u8 port; //触摸按键IO
u8 key_value; //按键返回值
};
struct ctmu_touch_key_platform_data {
u8 num; //触摸按键个数
s16 press_cfg; //按下判决门限
s16 release_cfg0; //释放判决门限0
s16 release_cfg1; //释放判决门限1
const struct ctmu_key_port *port_list;
};
/* =========== ctmu API ============= */
//ctmu 初始化
int ctmu_init(void *_data);
//获取plcnt按键状态
u8 get_ctmu_value(void);
#endif /* #ifndef _CTMU_DRV_H_ */
loader/update_ui/include_lib/driver/cpu/br35/asm/dcache.h
+150
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@@ -0,0 +1,150 @@
#ifndef __Q32DSP_DCACHE__
#define __Q32DSP_DCACHE__
//*********************************************************************************//
// Module name : dcache.h //
// Description : q32DSP dcache control head file //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
#define INCLUDE_DCU_RPT 0
#define INCLUDE_DCU_EMU 0
#define INCLUDE_L1D 0
#define INCLUDE_L2D 0
//------------------------------------------------------//
// peripheral level 1 function
//------------------------------------------------------//
#if (INCLUDE_L1D)
void L1pEnable(void);
void L1pDisable(void);
void L1pInitial(void);
void L1pSetWayNum(unsigned int way);
void L1pInvalidAll(void);
void L1pInvalidRegion(unsigned int *beg, unsigned int len); // note len!=0
void L1pFlushAll(void);
void L1pFlushRegion(unsigned int *beg, unsigned int len); // note len!=0
void L1pFlushinvAll(void);
void L1pFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
void L1pPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
void L1pReportEnable(void);
void L1pReportDisable(void);
void L1pReportClear(void);
void L1pReportPrintf(void);
void L1pEmuEnable(void);
void L1pEmuDisable(void);
void L1pEmuMessage(void);
void L1pWrThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
void L1pRwThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
void L1pPrivateRegion(unsigned int num, unsigned int *beg, unsigned int len);
#else
#define L1pEnable DcuEnable
#define L1pDisable DcuDisable
#define L1pInitial DcuInitial
#define L1pWaitIdle DcuWaitIdle
#define L1pSetWayNum DcuSetWayNum
#define L1pInvalidAll DcuInvalidAll
#define L1pInvalidRegion DcuInvalidRegion
#define L1pFlushAll DcuFlushAll
#define L1pFlushRegion DcuFlushRegion
#define L1pFlushinvAll DcuFlushinvAll
#define L1pFlushinvRegion DcuFlushinvRegion
#define L1pPfetchRegion DcuPfetchRegion
#define L1pReportEnable DcuReportEnable
#define L1pReportDisable DcuReportDisable
#define L1pReportClear DcuReportClear
#define L1pReportPrintf DcuReportPrintf
#define L1pEmuEnable DcuEmuEnable
#define L1pEmuDisable DcuEmuDisable
#define L1pEmuMessage DcuEmuMessage
#define L1pWrThroughRegion DcuWrThroughRegion
#define L1pRwThroughRegion DcuRwThroughRegion
#define L1pPrivateRegion DcuPrivateRegion
#endif
//------------------------------------------------------//
// dcache level 1 function
//------------------------------------------------------//
void DcuEnable(void);
void DcuDisable(void);
void DcuInitial(void);
void DcuWaitIdle(void);
void DcuSetWayNum(unsigned int way);
void DcuInvalidAll(void);
void DcuInvalidRegion(unsigned int *beg, unsigned int len); // note len!=0
void DcuFlushAll(void);
void DcuFlushRegion(unsigned int *beg, unsigned int len); // note len!=0
void DcuFlushinvAll(void);
void DcuFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
void DcuPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
void DcuReportEnable(void);
void DcuReportDisable(void);
void DcuReportClear(void);
void DcuReportPrintf(void);
void DcuEmuEnable(void);
void DcuEmuDisable(void);
void DcuEmuMessage(void);
void DcuWrThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
void DcuRwThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
void DcuPrivateRegion(unsigned int num, unsigned int *beg, unsigned int len);
//------------------------------------------------------//
// dcache level 2 function
//------------------------------------------------------//
#if (INCLUDE_L2D)
void L2dEnable(void);
void L2dDisable(void);
void L2dInitial(void);
void L2dSetWayNum(unsigned int way);
void L2dInvalidAll(void);
void L2dInvalidRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2dFlushAll(void);
void L2dFlushRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2dFlushinvAll(void);
void L2dFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2dPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2dReportEnable(void);
void L2dReportDisable(void);
void L2dReportClear(void);
void L2dReportPrintf(void);
void L2dEmuEnable(void);
void L2dEmuDisable(void);
void L2dEmuMessage(void);
void L2dWrThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
void L2dRwThroughRegion(unsigned int num, unsigned int *beg, unsigned int len);
void L2dPrivateRegion(unsigned int num, unsigned int *beg, unsigned int len);
#endif
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/debug.h
+91
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@@ -0,0 +1,91 @@
#ifndef __DEBUG_H__
#define __DEBUG_H__
typedef enum etm_detect_mode {
CPU_SFR_DETECT_MODE = 1,
CPU_RD_BUS_DETECT_MODE,
CPU_WR_BUS_DETECT_MODE,
CPU_RD_WR_BUS_DETECT_MODE,
} ETM_DETECT_MODE;
#define CDBG_IDx(n, id) ((1<<(n+4)) | (id<<(n*8+8)))
#define CDBG_INV (1<<7)
#define CDBG_PEN (1<<3)
#define CDBG_XEN (1<<2)
#define CDBG_WEN (1<<1)
#define CDBG_REN (1<<0)
void debug_init();
void exception_analyze();
/********************************** DUBUG SFR *****************************************/
u32 get_dev_id(char *name);
/* ---------------------------------------------------------------------------- */
/**
* @brief Memory权限保护设置
*
* @param idx: 保护框索引, 范围: 0 ~ 3, 目前系统默认使用0和3, 用户可用1和2
* @param begin: Memory开始地址
* @param end: Memory结束地址
* @param inv: 0: 保护框内, 1: 保护框外
* @param format: "Cxwr0rw1rw2rw3rw", CPU:外设0:外设1:外设2:外设3,
* @param ...: 外设ID号索引, 如: DBG_EQ, 见debug.h
*/
/* ---------------------------------------------------------------------------- */
void mpu_set(int idx, u32 begin, u32 end, u32 inv, const char *format, ...);
/* ---------------------------------------------------------------------------- */
/**
* @brief 取消指定框的mpu保护
*
* @param idx: 保护框索引号
*/
/* ---------------------------------------------------------------------------- */
void mpu_disable_by_index(u8 idx);
/* ---------------------------------------------------------------------------- */
/**
* @brief :取消所有保护框mpu保护
*/
/* ---------------------------------------------------------------------------- */
void mpu_diasble(void);
/* ---------------------------------------------------------------------------- */
/**
* @brief flash PC范围设置为Flash外区域, 调用该接口后调用flash里的函数将触发异常
*/
/* ---------------------------------------------------------------------------- */
void flash_pc_limit_disable();
/* ---------------------------------------------------------------------------- */
/**
* @brief flash PC范围限制恢复为flash代码区域, 调用该接口后可调用flash里的函数
*/
/* ---------------------------------------------------------------------------- */
void flash_pc_limit_enable();
/* ---------------------------------------------------------------------------- */
/**
* @brief CPU内存监测点设置
*
* @param low_addr: 监测区域起始地址
* @param high_addr: 监测区域结束地址
* @param low_limit_value: 监测内存下限值
* @param high_limit_value: 监测内存上限值
* @param mode: 监测模式(ETM_DETECT_MODE)
* @param limit_range_out: 0(框内触发中断) 1(框外触发中断)
* @param trigger_exception: 0(触发普通中断) 1(触发异常中断)
*/
/* ---------------------------------------------------------------------------- */
void cpu_etm_range_value_limit_detect(void *low_addr, void *high_addr, u32 low_limit_value, u32 high_limit_value, int mode, int limit_range_out, int trigger_exception);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/efuse.h
+45
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#ifndef __EFUSE_H__
#define __EFUSE_H__
u32 get_chip_version();
u32 efuse_get_chip_id();
u16 get_chip_id();
u32 efuse_get_gpadc_vbg_trim();
void efuse_init();
u8 get_en_act();
u8 get_vddio_lvd_en();
u8 efuse_get_lvd_act();
u8 efuse_get_vddio_lvd_lev();
u8 efuse_get_vio_act();
u8 efuse_get_vddio_lev();
u8 efuse_get_mclr_en_dis();
u8 efuse_get_xosc_pin_auto();
u8 efuse_get_xosc_pin_mode();
u8 efuse_get_sfc_fast_boot_dis();
u8 efuse_get_pin_reset_en();
u8 efuse_get_fast_up();
u8 efuse_get_flash_io_select();
u8 efuse_get_vbg_act();
u8 efuse_get_lvd_bg_trim();
u8 efuse_get_mvbg_lev();
u8 efuse_get_en_wvbg_lev();
u8 efuse_get_cp_pass();
u8 efuse_get_ft_pass();
u8 efuse_get_wvdd_level_trim();
u8 efuse_get_vbat_trim_4p2(void);
u8 efuse_get_vbat_trim_4p4(void);
u8 efuse_get_vbat_trim_4p5(void);
u8 efuse_get_charge_cur_trim(void);
u8 efuse_get_io_pu_100k(void);
u8 efuse_get_flash_type_select(void);//1: NOR 0:NAND
u8 efuse_get_apa_vb17_vbg();
u8 efuse_get_xosc_ldo();
u8 efuse_get_xosc_ext_init();
u8 efuse_get_lrc24m_caps();
u8 efuse_get_lrc24m_rs();
#endif /*EFUSE_H*/
loader/update_ui/include_lib/driver/cpu/br35/asm/fm_inside_api.h
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#ifndef __FM_INSIDE_API_H_
#define __FM_INSIDE_API_H_
#include "typedef.h"
enum {
SET_FM_INSIDE_SCAN_ARG1,
SET_FM_INSIDE_SCAN_ARG2,
SET_FM_INSIDE_PRINTF,
SET_FM_INSIDE_SYS_CLK,
};
void fm_inside_io_ctrl(int ctrl, ...);
void fm_inside_default_config(void);
void fm_inside_on(void);
void fm_inside_off(void);
u8 fm_inside_freq_set(u32 freq);
void fm_inside_int_set(u8 mute);
u16 fm_inside_id_read(void);
s32 fm_inside_rssi_read(void); //unit DB
void fm_inside_scan_info_printf(u16 freq_start, u16 freq_end);
//more inside fm api function, see file fm_inside_api.h
//Following function Call is valid Only after fm_inside_on();
void fm_inside_set_stereo(u8 set); //set[0,127], 0 mono, 127 stereo.
void fm_inside_set_abw(u8 set); //audio bandwidth set //set[0,127] <=>2k~16k
void fm_inside_deempasis_set(u8 set);// set[0/1], 0:50us, 1:75us
void set_fm_pcm_out_fun(void *fun);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/gpadc_hw.h
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#ifndef __GPADC_HW_H__
#define __GPADC_HW_H__
//br35专用
#include "generic/typedef.h"
#include "asm/efuse.h"
#include "gpio.h"
#include "jiffies.h"
#include "clock.h"
#define ADC_CH_MASK_TYPE_SEL 0xffff0000
#define ADC_CH_MASK_CH_SEL 0x0000ffff
#define ADC_CH_TYPE_BT (0x0<<16)
#define ADC_CH_TYPE_AUDIO (0x1<<16)
#define ADC_CH_TYPE_PMU (0x2<<16)
#define ADC_CH_TYPE_LRC200K (0x3<<16)
#define ADC_CH_TYPE_LRC24M (0x4<<16)
#define ADC_CH_TYPE_SYSPLL (0x5<<16)
#define ADC_CH_TYPE_LPCTM (0x6<<16)
#define ADC_CH_TYPE_CALSSD (0x7<<16)
#define ADC_CH_TYPE_WAT (0x8<<16)
#define ADC_CH_TYPE_IO (0x10<<16)
#define ADC_CH_TYPE_DIFF (0x11<<16)
#define ADC_CH_BT_ (ADC_CH_TYPE_BT | 0x0)
#define ADC_CH_AUDIO_ (ADC_CH_TYPE_AUDIO | 0x0)
#define ADC_CH_PMU_VBG (ADC_CH_TYPE_PMU | 0x0)//MVBG/WVBG
#define ADC_CH_PMU_VSW (ADC_CH_TYPE_PMU | 0x1)
#define ADC_CH_PMU_PROGI (ADC_CH_TYPE_PMU | 0x2)
#define ADC_CH_PMU_OCP_OUT (ADC_CH_TYPE_PMU | 0x3)
#define ADC_CH_PMU_VTEMP (ADC_CH_TYPE_PMU | 0x4)
#define ADC_CH_PMU_VPWR_4 (ADC_CH_TYPE_PMU | 0x5) //1/4vpwr
#define ADC_CH_PMU_VBAT_4 (ADC_CH_TYPE_PMU | 0x6) //1/4vbat
#define ADC_CH_PMU_VBAT_2 (ADC_CH_TYPE_PMU | 0x7)
#define ADC_CH_PMU_VP17_DCDC (ADC_CH_TYPE_PMU | 0x8)
#define ADC_CH_PMU_PVDD (ADC_CH_TYPE_PMU | 0x9)
#define ADC_CH_PMU_DCVDD (ADC_CH_TYPE_PMU | 0xa)
#define ADC_CH_PMU_DVDD (ADC_CH_TYPE_PMU | 0xb)
#define ADC_CH_PMU_WVDD (ADC_CH_TYPE_PMU | 0xc)
#define ADC_CH_PMU_PADC0 (ADC_CH_TYPE_PMU | 0xd)
#define ADC_CH_PMU_PVD_PORB_11V (ADC_CH_TYPE_PMU | 0xe)
#define ADC_CH_PMU_VIN_4 (ADC_CH_TYPE_PMU | 0xf) //1/4VIN
#define ADC_CH_LRC200K_ (ADC_CH_TYPE_LRC200K | 0x0)
#define ADC_CH_LRC24M_ (ADC_CH_TYPE_LRC24M | 0x0)
#define ADC_CH_SYSPLL_ (ADC_CH_TYPE_SYSPLL | 0x0)
#define ADC_CH_LPCTM_ (ADC_CH_TYPE_LPCTM | 0x0)
#define ADC_CH_CALSSD_ (ADC_CH_TYPE_CALSSD | 0x0)
#define ADC_CH_WAT_ (ADC_CH_TYPE_WAT | 0x0)
#define ADC_CH_IO_PA0 (ADC_CH_TYPE_IO | 0x0)
#define ADC_CH_IO_PA1 (ADC_CH_TYPE_IO | 0x1)
#define ADC_CH_IO_PA5 (ADC_CH_TYPE_IO | 0x2)
#define ADC_CH_IO_PA6 (ADC_CH_TYPE_IO | 0x3)
#define ADC_CH_IO_PA10 (ADC_CH_TYPE_IO | 0x4)
#define ADC_CH_IO_PA11 (ADC_CH_TYPE_IO | 0x5)
#define ADC_CH_IO_PA13 (ADC_CH_TYPE_IO | 0x6)
#define ADC_CH_IO_PB0 (ADC_CH_TYPE_IO | 0x7)
#define ADC_CH_IO_PB1 (ADC_CH_TYPE_IO | 0x8)
#define ADC_CH_IO_PC2 (ADC_CH_TYPE_IO | 0x9)
#define ADC_CH_IO_PC3 (ADC_CH_TYPE_IO | 0xa)
#define ADC_CH_IO_PC10 (ADC_CH_TYPE_IO | 0xb)
#define ADC_CH_IO_PC11 (ADC_CH_TYPE_IO | 0xc)
#define ADC_CH_IO_DP (ADC_CH_TYPE_IO | 0xd)
#define ADC_CH_IO_DM (ADC_CH_TYPE_IO | 0xe)
#define ADC_CH_IO_FSPG (ADC_CH_TYPE_IO | 0xf)
#define ADC_CH_DIFF_ (ADC_CH_TYPE_DIFF | 0x0)
enum AD_CH {
AD_CH_BT = ADC_CH_BT_,
AD_CH_AUDIO = ADC_CH_AUDIO_,
AD_CH_PMU_VBG = ADC_CH_PMU_VBG, //MVBG/WVBG
AD_CH_PMU_VSW,
AD_CH_PMU_PROGI,
AD_CH_PMU_OCP_OUT,
AD_CH_PMU_VTEMP,
AD_CH_PMU_VPWR_4, //1/4vpwr
AD_CH_PMU_VBAT_4, //1/4vbat
AD_CH_PMU_VBAT_2,
AD_CH_PMU_VP17_DCDC,
AD_CH_PMU_PVDD,
AD_CH_PMU_DCVDD,
AD_CH_PMU_DVDD,
AD_CH_PMU_WVDD,
AD_CH_PMU_PADC0,
AD_CH_PMU_PVD_PORB_11V,
AD_CH_PMU_VIN_4, //1/4VIN
AD_CH_LRC200K = ADC_CH_LRC200K_,
AD_CH_LRC24M = ADC_CH_LRC24M_,
AD_CH_SYSPLL = ADC_CH_SYSPLL_,
AD_CH_LPCTM = ADC_CH_LPCTM_,
AD_CH_CALSSD_ = ADC_CH_CALSSD_,
AD_CH_WAT = ADC_CH_WAT_,
AD_CH_IO_PA0 = ADC_CH_IO_PA0,
AD_CH_IO_PA1,
AD_CH_IO_PA5,
AD_CH_IO_PA6,
AD_CH_IO_PA10,
AD_CH_IO_PA11,
AD_CH_IO_PA13,
AD_CH_IO_PB0,
AD_CH_IO_PB1,
AD_CH_IO_PC2,
AD_CH_IO_PC3,
AD_CH_IO_PC10,
AD_CH_IO_PC11,
AD_CH_IO_DP,
AD_CH_IO_DM,
AD_CH_IO_FSPG,
AD_CH_DIFF = ADC_CH_DIFF_,
AD_CH_IOVDD = 0xffffffff,
};
#define AD_CH_IO_CH0 IO_PORTA_00
#define AD_CH_IO_CH1 IO_PORTA_01
#define AD_CH_IO_CH2 IO_PORTA_05
#define AD_CH_IO_CH3 IO_PORTA_06
#define AD_CH_IO_CH4 IO_PORTA_10
#define AD_CH_IO_CH5 IO_PORTA_11
#define AD_CH_IO_CH6 IO_PORTA_13
#define AD_CH_IO_CH7 IO_PORTB_00
#define AD_CH_IO_CH8 IO_PORTB_01
#define AD_CH_IO_CH9 IO_PORTC_02
#define AD_CH_IO_CH10 IO_PORTC_03
#define AD_CH_IO_CH11 IO_PORTC_10
#define AD_CH_IO_CH12 IO_PORTC_11
#define AD_CH_IO_CH13 IO_PORT_DP
#define AD_CH_IO_CH14 IO_PORT_DM
#define AD_CH_IO_CH15 0xff//IO_PORT_FSPG
#define ADC_VBG_CENTER 800
#define ADC_VBG_TRIM_STEP 3
#define ADC_VBG_DATA_WIDTH 4
//防编译报错
#define AD_CH_LDOREF AD_CH_PMU_VBG
#define AD_CH_PMU_VBAT AD_CH_PMU_VBAT_4
#define AD_CH_LPCTMU AD_CH_LPCTM
#define AD_CH_IO_PB7 AD_CH_PMU_PADC0 //仅br35使用
#endif /*GPADC_HW_H*/
loader/update_ui/include_lib/driver/cpu/br35/asm/gpio.h
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#ifndef _GPIO_H
#define _GPIO_H
#define IO_PORT_SPILT(io) ((u32)(io)) / 16, BIT(((u32)(io)) %16)
// PORT引脚输入输出模式
enum gpio_mode {
PORT_OUTPUT_LOW = 0,
PORT_OUTPUT_HIGH = 1,
PORT_HIGHZ = 2, //高阻模式
PORT_INPUT_FLOATING = 0x10, //浮空输入
PORT_INPUT_PULLUP_10K = 0x11,
PORT_INPUT_PULLUP_100K,
PORT_INPUT_PULLUP_1M,
PORT_INPUT_PULLDOWN_10K = 0x21,
PORT_INPUT_PULLDOWN_100K,
PORT_INPUT_PULLDOWN_1M,
PORT_KEEP_STATE = 0x30,
};
enum gpio_drive_strength {
PORT_DRIVE_STRENGT_2p4mA, ///< 最大驱动电流 2.4mA
PORT_DRIVE_STRENGT_8p0mA, ///< 最大驱动电流 8.0mA
PORT_DRIVE_STRENGT_24p0mA, ///< 最大驱动电流 24.0mA
PORT_DRIVE_STRENGT_64p0mA, ///< 最大驱动电流 64.0mA
};
enum gpio_pullup_mode {
GPIO_PULLUP_DISABLE,
GPIO_PULLUP_10K,
GPIO_PULLUP_100K,
GPIO_PULLUP_1M,
};
enum gpio_pulldown_mode {
GPIO_PULLDOWN_DISABLE,
GPIO_PULLDOWN_10K,
GPIO_PULLDOWN_100K,
GPIO_PULLDOWN_1M,
};
#define PORT_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
#define PORT_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
#define PORT_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
#define PORT_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
#define PORT_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
#define PORT_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
#define PORT_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
#define PORT_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
#define PORT_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
#define PORT_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
#define PORT_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
#define PORT_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
#define PORT_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
#define PORT_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
#define PORT_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
#define PORT_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
#define PORT_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
#define PORT_PIN_MASK (0x0000FFFFu) /* PIN mask for assert test */
#include "asm/gpio_hw.h"
struct gpio_config {
u32 pin;
enum gpio_mode mode;
enum gpio_drive_strength hd;
};
//配置同组多个io模式及强驱. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
int gpio_init(enum gpio_port port, const struct gpio_config *config);
//恢复同组多个io为高阻态. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
int gpio_deinit(enum gpio_port port, u32 pin);
//配置同组多个io模式. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
//return:<0:error
int gpio_set_mode(enum gpio_port port, u32 pin, enum gpio_mode mode);
int gpio_keep_mode_at_sleep(enum gpio_port port, u32 pin);
enum gpio_mode gpio_get_mode(enum gpio_port port, u32 pin);
// 读取单个io输入值. gpio:IO_PORTA_00
int gpio_read(u32 gpio);
//读取同组多个io值. 形参详见枚举; pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
int gpio_read_port(enum gpio_port port, u32 pin);
// 设置单个io输出电平(需先配置为输出). gpio:IO_PORTA_00; value:0:out 0, 1:out 1
int gpio_write(u32 gpio, u32 value);
// 设置同组多个io输出电平(需先配置为输出).
// pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
// out_state:0:out 0, 1:out 1
int gpio_write_port(enum gpio_port port, u32 pin, int out_state);
//翻转同组多个io输出电平(需先配置为输出). pin:PORT_PIN_0 or PORT_PIN_0 | PORT_PIN_2等
//return:<0:error
int gpio_toggle_port(enum gpio_port port, u32 pin);
// 获取同组多个io输出电平
int gpio_get_out_level(enum gpio_port port, u32 pin);
// 设置同组多个io强驱
int gpio_set_drive_strength(enum gpio_port port, u32 pin, enum gpio_drive_strength drive);
// 获取单个io输出强度 pin:只能带入1个io
enum gpio_drive_strength gpio_get_drive_strength(enum gpio_port port, u32 pin);
//打印芯片全部gpio寄存器,crossbar信息
void gpio_dump();
//打印芯片指定io寄存器,crossbar信息
void gpio_appoint_dump(enum gpio_port port, u32 pin);
// ----------------------------------------
// PORT中断
enum gpio_irq_edge {
PORT_IRQ_DISABLE = 0, ///< Disable PORT interrupt
PORT_IRQ_EDGE_RISE = 1, ///< PORT interrupt type : rising edge
PORT_IRQ_EDGE_FALL = 2, ///< PORT interrupt type : falling edge
PORT_IRQ_ANYEDGE = 3, ///< PORT interrupt type : both rising and falling edge
};
typedef void (*gpio_irq_callback_p)(enum gpio_port port, u32 pin, enum gpio_irq_edge edge);
struct gpio_irq_config_st {
u32 pin;
enum gpio_irq_edge irq_edge;
gpio_irq_callback_p callback;
u8 irq_priority;//中断优先级
};
//配置中断(已使能)
//禁止同一个io同一边沿多次注册
//单边沿与双边沿切换: 请先注销(PORT_IRQ_DISABLE)再注册
int gpio_irq_config(enum gpio_port port, const struct gpio_irq_config_st *config);//pa,pb,pc,pp0,usb
//修改中断回调函数
int gpio_irq_set_callback(enum gpio_port port, u32 pin, gpio_irq_callback_p callback);
//快速切换使能同组多个io中断响应
int gpio_irq_enable(enum gpio_port port, u32 pin);
//快速切换暂停同组多个io中断响应
int gpio_irq_disable(enum gpio_port port, u32 pin);
//只有注册单边沿触发才能调用该函数切换边沿
//单边沿与双边沿切换: 请先注销再注册
int gpio_irq_set_edge(enum gpio_port port, u32 pin, enum gpio_irq_edge irq_edge);
// 获取单个io触发边沿 pin:只能带入1个io
enum gpio_irq_edge gpio_irq_get_edge(enum gpio_port port, u32 pin);
// ----------------------------------------
// PORT 功能配置
// 配置单个io为特殊功能. pin:只能带入1个io
//return:<0:error
int gpio_set_function(enum gpio_port port, u32 pin, enum gpio_function fn);
// 注销单个io的特殊功能. pin:只能带入1个io
//return:<0:error
int gpio_disable_function(enum gpio_port port, u32 pin, enum gpio_function fn);
/* 示例：
gpio_set_function(PORTA, PORT_PIN_0, PORT_FUNC_UART0_TX);
gpio_set_function(PORTA, PORT_PIN_1, PORT_FUNC_UART0_RX);
gpio_set_function(PORTA, PORT_PIN_2, PORT_FUNC_UART0_CTS);
gpio_set_function(PORTA, PORT_PIN_3, PORT_FUNC_UART0_RTS);
*/
// io复用时，io资源申请
int gpio_request_function(enum gpio_port port, u32 pin, enum gpio_function fn, u32 timeout);
// io复用时，io资源释放
int gpio_release_function(enum gpio_port port, u32 pin, enum gpio_function fn);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/gpio_hw.h
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#ifndef __GPIO_HW_H__
#define __GPIO_HW_H__
#include "typedef.h"
#include "asm/power_interface.h"
#define IO_GROUP_NUM 16
#define IO_PORTA_00 (IO_GROUP_NUM * 0 + 0)
#define IO_PORTA_01 (IO_GROUP_NUM * 0 + 1)
#define IO_PORTA_02 (IO_GROUP_NUM * 0 + 2)
#define IO_PORTA_03 (IO_GROUP_NUM * 0 + 3)
#define IO_PORTA_04 (IO_GROUP_NUM * 0 + 4)
#define IO_PORTA_05 (IO_GROUP_NUM * 0 + 5)
#define IO_PORTA_06 (IO_GROUP_NUM * 0 + 6)
#define IO_PORTA_07 (IO_GROUP_NUM * 0 + 7)
#define IO_PORTA_08 (IO_GROUP_NUM * 0 + 8)
#define IO_PORTA_09 (IO_GROUP_NUM * 0 + 9)
#define IO_PORTA_10 (IO_GROUP_NUM * 0 + 10)
#define IO_PORTA_11 (IO_GROUP_NUM * 0 + 11)
#define IO_PORTA_12 (IO_GROUP_NUM * 0 + 12)
#define IO_PORTA_13 (IO_GROUP_NUM * 0 + 13)
#define IO_PORT_PA_MASK 0x3fff
#define IO_PORTB_00 (IO_GROUP_NUM * 1 + 0)
#define IO_PORTB_01 (IO_GROUP_NUM * 1 + 1)
#define IO_PORTB_02 (IO_GROUP_NUM * 1 + 2)
#define IO_PORTB_03 (IO_GROUP_NUM * 1 + 3)
#define IO_PORTB_04 (IO_GROUP_NUM * 1 + 4)
#define IO_PORTB_05 (IO_GROUP_NUM * 1 + 5)
#define IO_PORTB_06 (IO_GROUP_NUM * 1 + 6)
#define IO_PORTB_07 (IO_GROUP_NUM * 1 + 7)
#define IO_PORTB_08 (IO_GROUP_NUM * 1 + 8)
#define IO_PORT_PB_MASK 0x01ff
#define IO_PORTC_00 (IO_GROUP_NUM * 2 + 0)
#define IO_PORTC_01 (IO_GROUP_NUM * 2 + 1)
#define IO_PORTC_02 (IO_GROUP_NUM * 2 + 2)
#define IO_PORTC_03 (IO_GROUP_NUM * 2 + 3)
#define IO_PORTC_04 (IO_GROUP_NUM * 2 + 4)
#define IO_PORTC_05 (IO_GROUP_NUM * 2 + 5)
#define IO_PORTC_06 (IO_GROUP_NUM * 2 + 6)
#define IO_PORTC_07 (IO_GROUP_NUM * 2 + 7)
#define IO_PORTC_08 (IO_GROUP_NUM * 2 + 8)
#define IO_PORTC_09 (IO_GROUP_NUM * 2 + 9)
#define IO_PORTC_10 (IO_GROUP_NUM * 2 + 10)
#define IO_PORTC_11 (IO_GROUP_NUM * 2 + 11)
#define IO_PORT_PC_MASK 0x0fff
#define IO_PORTD_00 (IO_GROUP_NUM * 3 + 0)
#define IO_PORTD_01 (IO_GROUP_NUM * 3 + 1)
#define IO_PORTD_02 (IO_GROUP_NUM * 3 + 2)
#define IO_PORTD_03 (IO_GROUP_NUM * 3 + 3)
// #define IO_PORTD_04 (IO_GROUP_NUM * 3 + 4)
// #define IO_PORTD_05 (IO_GROUP_NUM * 3 + 5)
// #define IO_PORTD_06 (IO_GROUP_NUM * 3 + 6)
// #define IO_PORTD_07 (IO_GROUP_NUM * 3 + 7)
// #define IO_PORTD_08 (IO_GROUP_NUM * 3 + 8)
#define IO_PORTD_09 (IO_GROUP_NUM * 3 + 9)
#define IO_PORT_PD_MASK 0x0000
#define IO_PORTF_00 (IO_GROUP_NUM * 5 + 0)
#define IO_PORTF_01 (IO_GROUP_NUM * 5 + 1)
#define IO_PORTF_02 (IO_GROUP_NUM * 5 + 2)
#define IO_PORTF_03 (IO_GROUP_NUM * 5 + 3)
#define IO_PORTF_04 (IO_GROUP_NUM * 5 + 4)
#define IO_PORTF_05 (IO_GROUP_NUM * 5 + 5)
#define IO_PORT_PF_MASK 0x003f
#define IO_PORTP_00 (IO_GROUP_NUM * 13 + 0)
#define IO_PORT_PP_MASK 0x0001
#define IO_PORT_LDOIN IO_PORTP_00
#define IO_MAX_NUM (IO_PORTP_00 + 1)
#define IO_PORT_DP (IO_GROUP_NUM * 14 + 0)
#define IO_PORT_DM (IO_GROUP_NUM * 14 + 1)
#define IO_PORT_USB_MASK 0x03
#define IS_PORT_USB(x) (x <= IO_PORT_DM)//无usb赋0
//br35无pr
// #define IO_PORT_PR_00 (IO_GROUP_NUM * 15 + 0)//pr固定15
// #define IO_PORT_PR_01 (IO_GROUP_NUM * 15 + 1)
// #define IO_PORT_PR_MASK 0x03
#define IO_PORT_MAX (IO_PORT_DM + 1)
#define P33_IO_OFFSET 0
#define IO_CHGFL_DET (IO_PORT_MAX + P33_IO_OFFSET + 0)
#define IO_VBGOK_DET (IO_PORT_MAX + P33_IO_OFFSET + 1)
#define IO_VBTCH_DET (IO_PORT_MAX + P33_IO_OFFSET + 2)
#define IO_LDOIN_DET (IO_PORT_MAX + P33_IO_OFFSET + 3)
#define IO_VBATDT_DET (IO_PORT_MAX + P33_IO_OFFSET + 4)
#define PG_IO_OFFSET 5
#define IO_LCD_PG (IO_PORT_MAX + PG_IO_OFFSET + 0)
#define IO_MT_PG (IO_PORT_MAX + PG_IO_OFFSET + 1)
#define GPIOA (IO_GROUP_NUM * 0)
#define GPIOB (IO_GROUP_NUM * 1)
#define GPIOC (IO_GROUP_NUM * 2)
// #define GPIOD (IO_GROUP_NUM * 3)//br35无PDx_OUT/IN
// #define GPIOE (IO_GROUP_NUM * 4)//无
#define GPIOF (IO_GROUP_NUM * 5)
#define GPIOP (IO_GROUP_NUM * 13)
#define GPIOUSB (IO_GROUP_NUM * 14)
// #define GPIOR (IO_GROUP_NUM * 15) //br35 no pr
#define GPIOP33 (IO_PORT_MAX + P33_IO_OFFSET)
enum gpio_port {
PORTA = 0,
PORTB = 1,
PORTC = 2,
PORTF = 5,
PORTP = 13,
PORTUSB = 14,
// PORTR = 15, //br35 无pr
};
#define IS_PORT_ALL_PERIPH(PORT) (((PORT) == PORTA) || \
((PORT) == PORTB) || \
((PORT) == PORTC) || \
((PORT) == PORTF) || \
((PORT) == PORTP) || \
((PORT) == PORTUSB))
enum port_op_mode {
PORT_SET = 1,
PORT_AND,
PORT_OR,
PORT_XOR,
};
struct port_reg {
volatile unsigned int in;
volatile unsigned int out;
volatile unsigned int dir;
volatile unsigned int die;
volatile unsigned int dieh;
volatile unsigned int pu0;
volatile unsigned int pu1;
volatile unsigned int pd0;
volatile unsigned int pd1;
volatile unsigned int hd0;
volatile unsigned int hd1;
volatile unsigned int spl;
volatile unsigned int con;
volatile unsigned int out_bsr;
volatile unsigned int dir_bsr;
volatile unsigned int die_bsr;
volatile unsigned int dieh_bsr;
volatile unsigned int pu0_bsr;
volatile unsigned int pu1_bsr;
volatile unsigned int pd0_bsr;
volatile unsigned int pd1_bsr;
volatile unsigned int hd0_bsr;
volatile unsigned int hd1_bsr;
volatile unsigned int spl_bsr;
volatile unsigned int con_bsr;
};
#define GPIO_PX_PU_REG_NUM 2
#define GPIO_PX_PD_REG_NUM 2
#define GPIO_PX_HD_REG_NUM 2
#define GPIO_PX_DIEH_REG_NUM 1
#define GPIO_PX_SPL_REG_NUM 1
#define GPIO_PX_BSR_REG_NUM 1
#define usb_reg port_reg
#define GPIO_USB_PU_REG_NUM 1
#define GPIO_USB_PD_REG_NUM 1
#define GPIO_USB_HD_REG_NUM 0
#define GPIO_USB_DIEH_REG_NUM 1
#define GPIO_USB_SPL_REG_NUM 1
#define GPIO_USB_BSR_REG_NUM 1
//无PR
// struct port_pr_reg {
// volatile unsigned int in;
// volatile unsigned int out;
// volatile unsigned int dir;
// volatile unsigned int die;
// volatile unsigned int pu0;
// // volatile unsigned int pu1;
// volatile unsigned int pd0;
// // volatile unsigned int pd1;
// volatile unsigned int hd0;
// // volatile unsigned int hd1;
// };
// #define GPIO_PR_PU_REG_NUM 0
// #define GPIO_PR_PD_REG_NUM 0
// #define GPIO_PR_HD_REG_NUM 0
// #define GPIO_PR_DIEH_REG_NUM 0
// #define GPIO_PR_SPL_REG_NUM 0
#define GPIO_PU_REG_NUM 2 //max_num
#define GPIO_PD_REG_NUM 2 //max_num
#define GPIO_HD_REG_NUM 2 //max_num
//===================================================//
// BR35 Crossbar API
//===================================================//
enum PFI_TABLE {
PFI_GP_ICH0 = ((u32)(&(JL_IMAP->FI_GP_ICH0))),
PFI_GP_ICH1 = ((u32)(&(JL_IMAP->FI_GP_ICH1))),
PFI_GP_ICH2 = ((u32)(&(JL_IMAP->FI_GP_ICH2))),
PFI_GP_ICH3 = ((u32)(&(JL_IMAP->FI_GP_ICH3))),
PFI_GP_ICH4 = ((u32)(&(JL_IMAP->FI_GP_ICH4))),
PFI_GP_ICH5 = ((u32)(&(JL_IMAP->FI_GP_ICH5))),
// PFI_SPI0_CLK = ((u32)(&(JL_IMAP->FI_SPI0_CLK))),
// PFI_SPI0_DA0 = ((u32)(&(JL_IMAP->FI_SPI0_DA0))),
// PFI_SPI0_DA1 = ((u32)(&(JL_IMAP->FI_SPI0_DA1))),
// PFI_SPI0_DA2 = ((u32)(&(JL_IMAP->FI_SPI0_DA2))),
// PFI_SPI0_DA3 = ((u32)(&(JL_IMAP->FI_SPI0_DA3))),
PFI_SPI1_CLK = ((u32)(&(JL_IMAP->FI_SPI1_CLK))),
PFI_SPI1_DA0 = ((u32)(&(JL_IMAP->FI_SPI1_DA0))),
PFI_SPI1_DA1 = ((u32)(&(JL_IMAP->FI_SPI1_DA1))),
PFI_SPI1_DA2 = ((u32)(&(JL_IMAP->FI_SPI1_DA2))),
PFI_SPI1_DA3 = ((u32)(&(JL_IMAP->FI_SPI1_DA3))),
PFI_SPI2_CLK = ((u32)(&(JL_IMAP->FI_SPI2_CLK))),
PFI_SPI2_DA0 = ((u32)(&(JL_IMAP->FI_SPI2_DA0))),
PFI_SPI2_DA1 = ((u32)(&(JL_IMAP->FI_SPI2_DA1))),
PFI_SPI2_DA2 = ((u32)(&(JL_IMAP->FI_SPI2_DA2))),
PFI_SPI2_DA3 = ((u32)(&(JL_IMAP->FI_SPI2_DA3))),
PFI_SD0_CMD = ((u32)(&(JL_IMAP->FI_SD0_CMD))),
PFI_SD0_DA0 = ((u32)(&(JL_IMAP->FI_SD0_DA0))),
PFI_SD0_DA1 = ((u32)(&(JL_IMAP->FI_SD0_DA1))),
PFI_SD0_DA2 = ((u32)(&(JL_IMAP->FI_SD0_DA2))),
PFI_SD0_DA3 = ((u32)(&(JL_IMAP->FI_SD0_DA3))),
PFI_IIC0_SCL = ((u32)(&(JL_IMAP->FI_IIC0_SCL))),
PFI_IIC0_SDA = ((u32)(&(JL_IMAP->FI_IIC0_SDA))),
PFI_UART0_RX = ((u32)(&(JL_IMAP->FI_UART0_RX))),
PFI_UART1_RX = ((u32)(&(JL_IMAP->FI_UART1_RX))),
// PFI_UART1_CTS = ((u32)(&(JL_IMAP->FI_UART1_CTS))),
PFI_UART2_RX = ((u32)(&(JL_IMAP->FI_UART2_RX))),
// PFI_TDM_S_WCK = ((u32)(&(JL_IMAP->FI_TDM_S_WCK))),
// PFI_TDM_S_BCK = ((u32)(&(JL_IMAP->FI_TDM_S_BCK))),
// PFI_TDM_M_DA = ((u32)(&(JL_IMAP->FI_TDM_M_DA))),
// PFI_RDEC0_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC0_DAT0))),
// PFI_RDEC0_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC0_DAT1))),
// PFI_RDEC1_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC1_DAT0))),
// PFI_RDEC1_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC1_DAT1))),
// PFI_RDEC2_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC2_DAT0))),
// PFI_RDEC2_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC2_DAT1))),
// PFI_ALNK0_MCLK = ((u32)(&(JL_IMAP->FI_ALNK0_MCLK))),
// PFI_ALNK0_LRCK = ((u32)(&(JL_IMAP->FI_ALNK0_LRCK))),
// PFI_ALNK0_SCLK = ((u32)(&(JL_IMAP->FI_ALNK0_SCLK))),
// PFI_ALNK0_DAT0 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT0))),
// PFI_ALNK0_DAT1 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT1))),
// PFI_ALNK0_DAT2 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT2))),
// PFI_ALNK0_DAT3 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT3))),
// PFI_PLNK_DAT0 = ((u32)(&(JL_IMAP->FI_PLNK_DAT0))),
// PFI_PLNK_DAT1 = ((u32)(&(JL_IMAP->FI_PLNK_DAT1))),
// PFI_SPDIF_DIA = ((u32)(&(JL_IMAP->FI_SPDIF_DIA))),
// PFI_SPDIF_DIB = ((u32)(&(JL_IMAP->FI_SPDIF_DIB))),
// PFI_SPDIF_DIC = ((u32)(&(JL_IMAP->FI_SPDIF_DIC))),
// PFI_SPDIF_DID = ((u32)(&(JL_IMAP->FI_SPDIF_DID))),
// PFI_CAN_RX = ((u32)(&(JL_IMAP->FI_CAN_RX))),
PFI_QDEC0_A = ((u32)(&(JL_IMAP->FI_QDEC0_A))),
PFI_QDEC0_B = ((u32)(&(JL_IMAP->FI_QDEC0_B))),
PFI_CHAIN_IN0 = ((u32)(&(JL_IMAP->FI_CHAIN_IN0))),
PFI_CHAIN_IN1 = ((u32)(&(JL_IMAP->FI_CHAIN_IN1))),
PFI_CHAIN_IN2 = ((u32)(&(JL_IMAP->FI_CHAIN_IN2))),
PFI_CHAIN_IN3 = ((u32)(&(JL_IMAP->FI_CHAIN_IN3))),
PFI_CHAIN_RST = ((u32)(&(JL_IMAP->FI_CHAIN_RST))),
PFI_TOTAl = ((u32)(&(JL_IMAP->FI_TOTAL))),
};
#define INPUT_GP_ICH_MAX 6
#define OUTPUT_GP_OCH_MAX 8
enum OUTPUT_CH_SIGNAL {
OUTPUT_CH_SIGNAL_TIMER0_PWM,//8
OUTPUT_CH_SIGNAL_TIMER1_PWM,
OUTPUT_CH_SIGNAL_TIMER2_PWM,
OUTPUT_CH_SIGNAL_TIMER3_PWM,
// OUTPUT_CH_SIGNAL_TIMER4_PWM,
// OUTPUT_CH_SIGNAL_TIMER5_PWM,
OUTPUT_CH_SIGNAL_GP_ICH0,
OUTPUT_CH_SIGNAL_GP_ICH1,
OUTPUT_CH_SIGNAL_UART1_RTS,
OUTPUT_CH_SIGNAL_PLNK_CLK,
OUTPUT_CH_SIGNAL_WL_AMPE,
OUTPUT_CH_SIGNAL_WL_LNAE,
OUTPUT_CH_SIGNAL_WLC_INT_ACTIVE,
OUTPUT_CH_SIGNAL_WLC_INT_STATUS,
OUTPUT_CH_SIGNAL_WLC_INT_FREQ,
OUTPUT_CH_SIGNAL_AUD_DBG_CLKO,
OUTPUT_CH_SIGNAL_AUD_DBG_DATO0,
OUTPUT_CH_SIGNAL_AUD_DBG_DATO1,
OUTPUT_CH_SIGNAL_AUD_DBG_DATO2,
OUTPUT_CH_SIGNAL_AUD_DBG_DATO3,
OUTPUT_CH_SIGNAL_AUD_DBG_DATO4,
OUTPUT_CH_SIGNAL_CLOCK_OUT0,
OUTPUT_CH_SIGNAL_CLOCK_OUT1,
OUTPUT_CH_SIGNAL_CLOCK_OUT2,
OUTPUT_CH_SIGNAL_P33_CLK_DBG,
OUTPUT_CH_SIGNAL_P33_SIG_DBG0,
OUTPUT_CH_SIGNAL_P33_SIG_DBG1,
OUTPUT_CH_SIGNAL_USB_DBG_OUT,
OUTPUT_CH_SIGNAL_P11_DBG_OUT,
OUTPUT_CH_SIGNAL_WL_DBG_PORTx,//fix wl0~7对应och0~7
// OUTPUT_CH_SIGNAL_MCPWM0_H,
// OUTPUT_CH_SIGNAL_MCPWM0_L,
// OUTPUT_CH_SIGNAL_MCPWM1_H,
// OUTPUT_CH_SIGNAL_MCPWM1_L,
// OUTPUT_CH_SIGNAL_LEDC0_OUT,
// OUTPUT_CH_SIGNAL_LEDC1_OUT,
};
enum INPUT_CH_TYPE {
INPUT_CH_TYPE_GP_ICH = 0,
INPUT_CH_TYPE_TIME2_PWM = 6,
INPUT_CH_TYPE_TIME3_PWM,
INPUT_CH_TYPE_WL_AMPE,
INPUT_CH_TYPE_WL_LNAE,
INPUT_CH_TYPE_MAX,
};
enum INPUT_CH_SIGNAL {
//ICH_CON0
INPUT_CH_SIGNAL_TIMER0_CIN = 0,//5
INPUT_CH_SIGNAL_TIMER1_CIN,
INPUT_CH_SIGNAL_TIMER2_CIN,
INPUT_CH_SIGNAL_TIMER3_CIN,
// INPUT_CH_SIGNAL_TIMER4_CIN,
// INPUT_CH_SIGNAL_TIMER5_CIN,
INPUT_CH_SIGNAL_TIMER0_CAPTURE,
INPUT_CH_SIGNAL_TIMER1_CAPTURE,
//ICH_CON1
INPUT_CH_SIGNAL_TIMER2_CAPTURE,
INPUT_CH_SIGNAL_TIMER3_CAPTURE,
// INPUT_CH_SIGNAL_TIMER4_CAPTURE,
// INPUT_CH_SIGNAL_TIMER5_CAPTURE,
INPUT_CH_SIGNAL_MCPWM0_CK,
INPUT_CH_SIGNAL_MCPWM1_CK,
INPUT_CH_SIGNAL_MCPWM0_FP,
INPUT_CH_SIGNAL_MCPWM1_FP,
//ICH_CON2
INPUT_CH_SIGNAL_UART1_CTS,
INPUT_CH_SIGNAL_PLNK_IDAT0,
INPUT_CH_SIGNAL_PLNK_IDAT1,
INPUT_CH_SIGNAL_CAP,//CAP_MUX_OUT
INPUT_CH_SIGNAL_CLK_PIN, //CLK_MUX_IN
INPUT_CH_SIGNAL_EXT_CLK, //EXT_CLK_P
// INPUT_CH_SIGNAL_IRFLT,
//ICH_CON3
INPUT_CH_SIGNAL_IMD_TE,
INPUT_CH_SIGNAL_WLC_EXT_ACT,
INPUT_CH_SIGNAL_AUD_DBG_DATI,
INPUT_CH_SIGNAL_SPI1_CS,
INPUT_CH_SIGNAL_SPI2_CS,
INPUT_CH_SIGNAL_RESERVE0,
//ICH_CON4
// INPUT_CH_SIGNAL_QDEC_SIN0,
// INPUT_CH_SIGNAL_QDEC_SIN1,
};
enum gpio_function {
PORT_FUNC_NULL, //null
//uart
PORT_FUNC_UART0_TX, //out
PORT_FUNC_UART0_RX,//in
PORT_FUNC_UART1_TX, //out
PORT_FUNC_UART1_RX,//in
PORT_FUNC_UART2_TX, //out
PORT_FUNC_UART2_RX,//in
PORT_FUNC_UART1_RTS,//out
PORT_FUNC_UART1_CTS,//in
//spi
// PORT_FUNC_SPI0_CLK,
// PORT_FUNC_SPI0_DA0,
// PORT_FUNC_SPI0_DA1,
// PORT_FUNC_SPI0_DA2,
// PORT_FUNC_SPI0_DA3,
PORT_FUNC_SPI1_CS,//ich slave
PORT_FUNC_SPI1_CLK,
PORT_FUNC_SPI1_DA0,
PORT_FUNC_SPI1_DA1,
PORT_FUNC_SPI1_DA2,
PORT_FUNC_SPI1_DA3,
PORT_FUNC_SPI2_CS,//ich slave
PORT_FUNC_SPI2_CLK,
PORT_FUNC_SPI2_DA0,
PORT_FUNC_SPI2_DA1,
PORT_FUNC_SPI2_DA2,
PORT_FUNC_SPI2_DA3,
//iic
PORT_FUNC_IIC_SCL,
PORT_FUNC_IIC_SDA,
//sd
PORT_FUNC_SD0_CLK,//out
PORT_FUNC_SD0_CMD,
PORT_FUNC_SD0_DA0,
PORT_FUNC_SD0_DA1,
PORT_FUNC_SD0_DA2,
PORT_FUNC_SD0_DA3,
//timer
PORT_FUNC_TIMER0_PWM,
PORT_FUNC_TIMER1_PWM,
PORT_FUNC_TIMER2_PWM,
PORT_FUNC_TIMER3_PWM,
// PORT_FUNC_TIMER4_PWM,
// PORT_FUNC_TIMER5_PWM,
PORT_FUNC_TIMER0_CAPTURE,
PORT_FUNC_TIMER1_CAPTURE,
PORT_FUNC_TIMER2_CAPTURE,
PORT_FUNC_TIMER3_CAPTURE,
// PORT_FUNC_TIMER4_CAPTURE,
// PORT_FUNC_TIMER5_CAPTURE,
//mcpwm
PORT_FUNC_MCPWM0_H,
PORT_FUNC_MCPWM0_L,
PORT_FUNC_MCPWM1_H,
PORT_FUNC_MCPWM1_L,
PORT_FUNC_MCPWM0_FP,
PORT_FUNC_MCPWM1_FP,
PORT_FUNC_MCPWM0_CK,
PORT_FUNC_MCPWM1_CK,
//clk_out
PORT_FUNC_OCH_CLOCK_OUT0,
PORT_FUNC_OCH_CLOCK_OUT1,//PORT_FUNC_OCH_RESERVED0,//不连续
PORT_FUNC_OCH_CLOCK_OUT2,
// PORT_FUNC_OCH_CLOCK_OUT3,
//other
PORT_FUNC_IRFLT_0, //实际只有1个IRFLT
PORT_FUNC_IRFLT_1,
PORT_FUNC_IRFLT_2,
PORT_FUNC_IRFLT_3,
PORT_FUNC_CLK_PIN,//CLK_MUX_IN
// PORT_FUNC_PORT_WKUP,
PORT_FUNC_GPADC, //in
PORT_FUNC_PWM_LED,
//plnk
// PORT_FUNC_PLNK_SCLK,//out
// PORT_FUNC_PLNK_DAT0,//in
// PORT_FUNC_PLNK_DAT1,//in
//ledc
// PORT_FUNC_LEDC0_OUT,
// PORT_FUNC_LEDC1_OUT,
//rdec
// PORT_FUNC_RDEC0_PORT0,
// PORT_FUNC_RDEC0_PORT1,
//qdec
PORT_FUNC_RDEC0_PORTA,
PORT_FUNC_RDEC0_PORTB,
//chain
};
/**************************************************/
#define __struct(x) (struct x##_reg *)
#define _struct(x) __struct(x)
#ifdef GPIOA
#define __PORTPA ((struct port_reg *)JL_PORTA)
#endif
#ifdef GPIOB
#define __PORTPB ((struct port_reg *)JL_PORTB)
#endif
#ifdef GPIOC
#define __PORTPC ((struct port_reg *)JL_PORTC)
#endif
#ifdef GPIOD
#define __PORTPD ((struct port_reg *)JL_PORTD)
#endif
#ifdef GPIOE
#define __PORTPE ((struct port_reg *)JL_PORTE)
#endif
#ifdef GPIOF
#define __PORTPF ((struct port_reg *)JL_PORTF)
#endif
#ifdef GPIOG
#define __PORTPG ((struct port_reg *)JL_PORTG)
#endif
#ifdef GPIOH
#define __PORTPH ((struct port_reg *)JL_PORTH)
#endif
#ifdef GPIOP
#define __PORTPP ((struct port_reg *)JL_PORTP)
#endif
#ifdef GPIOR
#define __PORTPR ((struct port_pr_reg *)R3_PR_IO_P)
#endif
#ifdef GPIOUSB
#define __PORTPU ((struct usb_reg *)JL_PORTUSB)
#endif
#define __portx(x,y) __PORT##x->y
#define _portx(x,y) __portx(x,y)
#define __toggle_port(x,y) __PORT##x->out ^= y;
#define _toggle_port(port,pin) __toggle_port(port,pin)
//log:
#define GPIO_LOG_FORMAT "0x%04x 0x%04x 0x%04x 0x%04x 0x%04x,0x%04x 0x%04x,0x%04x 0x%04x,0x%04x 0x%04x"
#define GPIO_NO_SUPPORT_FUN "------"
#define GPIO_LOG_PORT(x,y) JL_PORT##x->OUT&y,JL_PORT##x->DIR&y,JL_PORT##x->DIE&y,JL_PORT##x->DIEH&y,JL_PORT##x->PU0&y,JL_PORT##x->PU1&y,JL_PORT##x->PD0&y,JL_PORT##x->PD1&y,JL_PORT##x->HD0&y,JL_PORT##x->HD1&y,JL_PORT##x->SPL&y
#ifdef GPIOP //no use
#define GPIO_LOG_PORTP JL_PORTP->OUT,JL_PORTP->DIR,JL_PORTP->DIE,JL_PORTP->DIEH,JL_PORTP->PU0,JL_PORTP->PU1,JL_PORTP->PD0,JL_PORTP->PD1,JL_PORTP->HD0,JL_PORTP->HD1
#endif
#ifdef GPIOR
#define GPIO_LOG_FORMAT_R "0x%04x 0x%04x 0x%04x %s 0x%04x,0x%04x 0x%04x,0x%04x 0x%04x,0x%04x %s"
#define GPIO_LOG_PORTR R3_PR_OUT,R3_PR_DIR,R3_PR_DIE,GPIO_NO_SUPPORT_FUN,R3_PR_PU0,R3_PR_PU1,R3_PR_PD0,R3_PR_PD1,R3_PR_HD0,R3_PR_HD1,GPIO_NO_SUPPORT_FUN
#endif
#ifdef GPIOUSB
#define GPIO_LOG_FORMAT_U "0x%04x 0x%04x 0x%04x 0x%04x 0x%04x,%s 0x%04x,%s %s,%s 0x%04x"
#define GPIO_LOG_PORTU _portx(PU,out),_portx(PU,dir),_portx(PU,die),_portx(PU,dieh),_portx(PU,pu0),GPIO_NO_SUPPORT_FUN,_portx(PU,pd0),GPIO_NO_SUPPORT_FUN,GPIO_NO_SUPPORT_FUN,GPIO_NO_SUPPORT_FUN,_portx(PU,spl)
#endif
/*************************function*************************/
struct port_reg *gpio2reg(u32 gpio);
void usb_iomode(const u32 enable);
int gpio_hw_write(const u32 gpio, const u32 value);//return <0:error
int gpio_hw_read(const u32 gpio);//return <0:error
int get_gpio(const char *p);//return <0:error
/**************************************************************/
/*********************multi pin interface***************************/
//多io同一模式
int gpio_hw_port_pin_judge(const enum gpio_port port, u32 pin);
int gpio_hw_set_direction(const enum gpio_port port, u32 pin, const u32 value);
int gpio_hw_direction_input(const enum gpio_port port, u32 pin);
int gpio_hw_direction_output(const enum gpio_port port, u32 pin, const int value);/////////
int gpio_hw_write_port(const enum gpio_port port, u32 pin, const u32 value);
int gpio_hw_set_output_value(const enum gpio_port port, u32 pin, const u32 value);
int gpio_hw_set_pull_up(const enum gpio_port port, u32 pin, const enum gpio_pullup_mode value);
int gpio_hw_set_pull_down(const enum gpio_port port, u32 pin, const enum gpio_pulldown_mode value);//portabcdpr:pd0,pd1,usb:pd0
int gpio_hw_set_drive_strength(const enum gpio_port port, u32 pin, const enum gpio_drive_strength value);
int gpio_hw_set_die(const enum gpio_port port, u32 pin, const int value);
int gpio_hw_set_dieh(const enum gpio_port port, u32 pin, const u32 value);
int gpio_hw_set_spl(const enum gpio_port port, u32 pin, const u32 value);
//read
int gpio_hw_read_port(const enum gpio_port port, u32 pin);
int gpio_hw_read_out_level(const enum gpio_port port, u32 pin);
u32 gpio_hw_read_drive_strength(const enum gpio_port port, u32 pin);//return hd1:高16位, hd0:低16位
//多io不同模式
int gpio_hw_op_dir(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_out(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_die(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_dieh(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_pu0(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_pu1(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_pd0(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
int gpio_hw_op_pd1(const enum gpio_port port, u32 pin, u32 value, const enum port_op_mode op);
//=================================================================================//
//@brief: CrossBar 获取某IO的输出映射寄存器
//=================================================================================//
u32 *gpio2crossbar_outreg(u32 gpio);
u32 gpio2crossbar_inport(u32 gpio);
int gpio_set_fun_output_port(u32 gpio, u32 fun_index, u8 dir_ctl, u8 data_ctl);
int gpio_disable_fun_output_port(u32 gpio);
int gpio_set_fun_input_port(u32 gpio, enum PFI_TABLE pfun);
int gpio_disable_fun_input_port(enum PFI_TABLE pfun);
//=================================================================================//
//@brief: Output/input Channel输出设置 API, 将指定IO口设置为某个外设的输出
//=================================================================================//
int gpio_och_sel_output_signal(u32 gpio, enum OUTPUT_CH_SIGNAL signal);
int gpio_och_disable_output_signal(u32 gpio, enum OUTPUT_CH_SIGNAL signal);
int gpio_ich_sel_input_signal(u32 gpio, enum INPUT_CH_SIGNAL signal, enum INPUT_CH_TYPE type);
int gpio_ich_disable_input_signal(u32 gpio, enum INPUT_CH_SIGNAL signal, enum INPUT_CH_TYPE type);
u32 gpio_get_ich_use_flag();
//获取空闲的gp_ich
//return: 0xff:error
u8 gpio_get_unoccupied_gp_ich();
//value:gp_ich号
void gpio_release_gp_ich(u8 value);
u32 get_sfc_port(void);
//打印指定组别指定pin的crossbar信息
void gpio_crossbar_fo_dump(char px_name[], u8 max_px_out_num, u16 px_mask, u32 *omap_ptr);
void gpio_crossbar_fi_dump(char px_name[], u8 max_px_in_num, u16 px_mask, u8 px_in);
#endif /*GPIO_H*/
loader/update_ui/include_lib/driver/cpu/br35/asm/gptimer_hw.h
+95
View File
@@ -0,0 +1,95 @@
#ifndef __GPTIMER_HW_H__
#define __GPTIMER_HW_H__
//BR35
#include "cpu.h"
#include "gpio.h"
#include "gptimer_hw_v5.h"
typedef JL_TIMER_TypeDef GPTIMER;
#define GPTIMER0 JL_TIMER0
#define GPTIMER1 JL_TIMER1
#define GPTIMER2 JL_TIMER2
#define GPTIMER3 JL_TIMER3
#define TIMER_MAX_NUM 4
#define TIMER_BASE_ADDR GPTIMER0
#define TIMER_OFFSET (GPTIMER1 - GPTIMER0)
#define TIMER_CNT_SIZE 0xFFFF
#define TIMER_PRD_SIZE 0xFFFF
#define TIMER_PWM_SIZE 0xFFFF
#define IRQ_TIMEx_IDX_LIST IRQ_TIME0_IDX, \
IRQ_TIME1_IDX, \
IRQ_TIME2_IDX, \
IRQ_TIME3_IDX, \
#define IRFLT_SRC_TABLE_LIST \
0, /* lsb_clk */ \
0, /* lsb_clk */ \
12, /* std_12m */ \
24, /* std_24m */ \
typedef enum gptimerx : u8 {
TIMER0 = 0,
TIMER1,
TIMER2,
TIMER3,
TIMERx, //传入此参数时,内部自动分配一个空闲TIMER
} timer_dev;
//以下宏定义给系统 timer 驱动使用
#define GPTIMER_PND_CLR (0b1<<14)
#define GPTIMER_CLK_SRC_LSB (0b0001<<10)
#define GPTIMER_CLK_SRC_RC250K (0b0010<<10)
#define GPTIMER_CLK_SRC_RC16M (0b0011<<10)
#define GPTIMER_CLK_SRC_LRC (0b0100<<10)
#define GPTIMER_CLK_SRC_STD12M (0b0101<<10)
#define GPTIMER_CLK_SRC_STD24M (0b0110<<10)
#define GPTIMER_CLK_SRC_STD48M (0b0111<<10)
#define GPTIMER_CLK_SRC_CLKOUT2 (0b1000<<10)
#define GPTIMER_CLK_SRC_PATCLK (0b1001<<10)
#define GPTIMER_CLK_SRC_HSB (0b1010<<10)
#define GPTIMER_CLK_SRC_WATCLK (0b1011<<10)
#define GPTIMER_CLK_DIV_1 (0b0000<<4)
#define GPTIMER_CLK_DIV_4 (0b0001<<4)
#define GPTIMER_CLK_DIV_16 (0b0010<<4)
#define GPTIMER_CLK_DIV_64 (0b0011<<4)
#define GPTIMER_CLK_DIV_2 (0b0100<<4)
#define GPTIMER_CLK_DIV_8 (0b0101<<4)
#define GPTIMER_CLK_DIV_32 (0b0110<<4)
#define GPTIMER_CLK_DIV_128 (0b0111<<4)
#define GPTIMER_CLK_DIV_256 (0b1000<<4)
#define GPTIMER_CLK_DIV_1024 (0b1001<<4)
#define GPTIMER_CLK_DIV_4096 (0b1010<<4)
#define GPTIMER_CLK_DIV_16384 (0b1011<<4)
#define GPTIMER_CLK_DIV_512 (0b1100<<4)
#define GPTIMER_CLK_DIV_2048 (0b1101<<4)
#define GPTIMER_CLK_DIV_8192 (0b1110<<4)
#define GPTIMER_CLK_DIV_32768 (0b1111<<4)
#define GPTIMER_TIMER_MODE (0b1<<0)
#define GPTIMER_SYS GPTIMER3
#define GPTIMER_SYS_IRQ_INDEX IRQ_TIME3_IDX
#define GPTIMER_SYS_START() GPTIMER_SYS->CON |= GPTIMER_TIMER_MODE
#define GPTIMER_SYS_PAUSE() GPTIMER_SYS->CON &= ~GPTIMER_TIMER_MODE
#define GPTIMER_SYS_EN_CHECK() GPTIMER_SYS->CON & GPTIMER_TIMER_MODE
#define GPTIMER_SYS_CLR_PND() GPTIMER_SYS->CON |= GPTIMER_PND_CLR
#define GPTIMER_SYS_INIT() do{GPTIMER_SYS->CON = GPTIMER_PND_CLR|GPTIMER_CLK_SRC_STD12M|GPTIMER_CLK_DIV_4; \
GPTIMER_SYS->PRD = 0; \
GPTIMER_SYS->CNT = 0;}while(0) \
#define GPTIMER_SYS_GET_CNT GPTIMER_SYS->CNT
#define GPTIMER_SYS_SET_CNT(x) GPTIMER_SYS->CNT = (x)
#define GPTIMER_SYS_GET_PRD GPTIMER_SYS->PRD
#define GPTIMER_SYS_SET_PRD(x) GPTIMER_SYS->PRD = (x)-1
#define GPTIMER_SYS_CLK_SRC 12 //MHz单位
#define GPTIMER_SYS_CLK_DIV 2 // 右移两位 等效于 除以4
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/hwi.h
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#ifndef __HWI_H__
#define __HWI_H__
//=================================================
#define IRQ_EMUEXCPT_IDX 0
#define IRQ_EXCEPTION_IDX 1
#define IRQ_SYSCALL_IDX 2
#define IRQ_TICK_TMR_IDX 3
#define IRQ_TIME0_IDX 4
#define IRQ_TIME1_IDX 5
#define IRQ_TIME2_IDX 6
#define IRQ_UART0_IDX 7
#define IRQ_UART1_IDX 8
#define IRQ_SPI1_IDX 10
#define IRQ_IIC0_IDX 11
#define IRQ_PORT_IDX 12
#define IRQ_GPADC_IDX 13
#define IRQ_UART2_IDX 14
#define IRQ_LRCT_IDX 15
#define IRQ_GPCNT0_IDX 16
#define IRQ_QDEC0_IDX 17
#define IRQ_SD0_IDX 18
#define IRQ_USB_SOF_IDX 19
#define IRQ_USB_CTRL_IDX 20
#define IRQ_TIME3_IDX 22
#define IRQ_LED_IDX 23
#define IRQ_SD0_BRK_IDX 24
#define IRQ_MCPWM_TMR_IDX 25
#define IRQ_MCPWM_CHX_IDX 26
#define IRQ_PMU_TMR0_IDX 27
#define IRQ_PMU_TMR1_IDX 28
#define IRQ_SPI2_IDX 31
#define IRQ_P33_IDX 33
#define IRQ_PINR_IDX 34
#define IRQ_PMU_SOFT0_IDX 35
#define IRQ_PMU_SOFT1_IDX 36
#define IRQ_PMU_SOFT2_IDX 37
#define IRQ_PMU_SOFT3_IDX 38
#define IRQ_PMU_TMR2_IDX 40
#define IRQ_PMU_TMR3_IDX 41
#define IRQ_SRC0_IDX 66
#define IRQ_SPI0_IDX 68
#define IRQ_DCP_IDX 70
#define IRQ_DBI_IDX 72
#define IRQ_JPG_IDX 73
#define IRQ_GPU_IDX 74
#define IRQ_ADC_IDX 88
#define IRQ_AUDIO_IDX 89
#define IRQ_BT_TIMEBASE_IDX 100
#define IRQ_BLE_RX_IDX 101
#define IRQ_BLE_EVENT_IDX 102
#define IRQ_BT_CLKN_IDX 103
#define IRQ_BREDR_IDX 104
#define IRQ_BT_RXMCH 105
#define IRQ_SYNC_IDX 106
#define IRQ_SOFT0_IDX 120
#define IRQ_SOFT1_IDX 121
#define IRQ_SOFT2_IDX 122
#define IRQ_SOFT3_IDX 123
#define IRQ_SOFT4_IDX 124
#define IRQ_SOFT5_IDX 125
#define IRQ_SOFT6_IDX 126
#define IRQ_SOFT7_IDX 127
#define MAX_IRQ_ENTRY_NUM 128
//=================================================
//=================================================
void interrupt_init();
/* --------------------------------------------------------------------------*/
/**
* @brief 中断注册函数
*
* @param index 中断号
* @param priority 优先级，范围0-6可用
* @param handler 中断服务函数
* @param cpu_id 相应中断服务函数的CPU
*/
/* ----------------------------------------------------------------------------*/
void request_irq(u8 index, u8 priority, void (*handler)(void), u8 cpu_id);
void unrequest_irq(u8 index);
void reg_set_ip(unsigned char index, unsigned char priority, u8 cpu_id);
/* --------------------------------------------------------------------------*/
/**
* @brief 设置不可屏蔽中断（不可屏蔽中断不区分优先级）
* cpu多核同步默认使用0，其他使用1。
*
* @param index 中断号
* @param priority 不可屏蔽优先级，范围 0、1 （CPU_IRQ_IPMASK_LEVEL == 6）
* @param cpu_id 相应中断服务函数的CPU
*/
/* ----------------------------------------------------------------------------*/
void irq_unmask_set(u8 index, u8 priority, u8 cpu_id);
/* --------------------------------------------------------------------------*/
/**
* @brief 取消不可屏蔽中断
* cpu多核同步默认使用0，其他使用1。
*
* @param index 中断号
* @param priority 不可屏蔽优先级，范围 0、1、2、3、4、5
* @param cpu_id 相应中断服务函数的CPU
*/
/* ----------------------------------------------------------------------------*/
void irq_unmask_unset(u8 index, u8 priority, u8 cpu_id);
void bit_clr_ie(unsigned char index);
void bit_set_ie(unsigned char index);
bool irq_read(u32 index);
#define irq_disable(x) bit_clr_ie(x)
#define irq_enable(x) bit_set_ie(x)
void unmask_enter_critical(void);
void unmask_exit_critical(void);
//---------------------------------------------//
// low power waiting
//---------------------------------------------//
__attribute__((always_inline))
static inline void lp_waiting(int *ptr, int pnd, int cpd, char inum)
{
#if 0
q32DSP(core_num())->IWKUP_NUM = inum;
while (!(*ptr & pnd)) {
asm volatile("idle");
}
*ptr |= cpd;
#else
int con;
q32DSP(core_num())->IWKUP_NUM = inum;
asm volatile(
" goto 2f \n\t"
" 1: \n\t"
" idle \n\t"
" 2: \n\t"
" %0 = [%1] \n\t"
" rep 1 { \n\t" // disable_bpu
" if((%0 & %2)==0) goto 1b \n\t"
" } \n\t"
:"=&r"(con)
:"r"(ptr), "r"(pnd), "0"(con)
:
);
*ptr = con | cpd;
#endif
}
//---------------------------------------------//
// interrupt cli/sti
//---------------------------------------------//
static inline int int_cli(void)
{
int msg;
asm volatile("cli %0" : "=r"(msg) :);
return msg;
}
static inline void int_sti(int msg)
{
asm volatile("sti %0" :: "r"(msg));
}
#ifdef IRQ_TIME_COUNT_EN
void irq_handler_enter(int irq);
void irq_handler_exit(int irq);
void irq_handler_times_dump();
#else
#define irq_handler_enter(irq) do { }while(0)
#define irq_handler_exit(irq) do { }while(0)
#define irq_handler_times_dump() do { }while(0)
#endif
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/icache.h
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#ifndef __Q32DSP_ICACHE__
#define __Q32DSP_ICACHE__
//*********************************************************************************//
// Module name : icache.h //
// Description : q32DSP icache control head file //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
// ------ ------ ------ ------ ------ ------
// | c0 | | c1 | | c0 | | c1 | | c0 | | c1 |
// ------ ------ ------ ------ ------ ------
// | | | | | |
// ------ ------ ------ ------ ------ ------
// | L1 | | L1 | | L1 | | L1 | | L1 | | L1 |
// ------ ------ ------ ------ ------ ------
// |_______| |_______| |_______|
// | | |
// --------- --------- ---------
// | flash | | L2i | | L2c |
// --------- --------- ---------
// | |
// --------- ---------
// | flash | | flash |
// --------- ---------
//
// INCLUDE_L2I==0 INCLUDE_L2I==1 INCLUDE_L2I==0
// INCLUDE_L2C==0 INCLUDE_L2C==0 INCLUDE_L2C==1
#define INCLUDE_ICU_RPT 0
#define INCLUDE_ICU_EMU 0
#define INCLUDE_L2I 0 // L2i & L2d separate
#define INCLUDE_L2C 0 // L2i & L2d together
//------------------------------------------------------//
// icache level 1 function
//------------------------------------------------------//
void IcuEnable(void);
void IcuDisable(void);
void IcuInitial(void);
void IcuWaitIdle(void);
void IcuSetWayNum(unsigned int way);
void IcuFlushinvAll(void);
void IcuFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
void IcuUnlockAll(void);
void IcuUnlockRegion(unsigned int *beg, unsigned int len); // note len!=0
void IcuLockRegion(unsigned int *beg, unsigned int len); // note len!=0
void IcuPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
void IcuReportEnable(void);
void IcuReportDisable(void);
void IcuReportPrintf(void);
void IcuReportClear(void);
void IcuEmuEnable(void);
void IcuEmuDisable(void);
void IcuEmuMessage(void);
//------------------------------------------------------//
// icache level 2 function
//------------------------------------------------------//
#if (INCLUDE_L2I)
void L2iEnable(void);
void L2iDisable(void);
void L2iInitial(void);
void L2iSetWayNum(unsigned int way);
void L2iFlushinvAll(void);
void L2iFlushinvRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2iUnlockAll(void);
void L2iUnlockRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2iLockRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2iPfetchRegion(unsigned int *beg, unsigned int len); // note len!=0
void L2iReportEnable(void);
void L2iReportDisable(void);
void L2iReportPrintf(void);
void L2iReportClear(void);
void L2iEmuEnable(void);
void L2iEmuDisable(void);
void L2iEmuMessage(void);
#endif
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/iic_hw.h
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#ifndef __IIC_HW_H__
#define __IIC_HW_H__
#define MAX_HW_IIC_NUM 2
#define P11_HW_IIC_NUM 1 //p11 iic使能,及锁使能
// typedef enum {
// HW_IIC_0,
// // HW_IIC_1,
// } hw_iic_dev;
enum {
HW_IIC_0,
#if defined(P11_HW_IIC_NUM)&&P11_HW_IIC_NUM
HW_P11_IIC_0,//p11 init,pb
#endif
// HW_IIC_1,
};
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/includes.h
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#ifndef ASM_INCLUDES_H
#define ASM_INCLUDES_H
#include "asm/cpu.h"
#include "asm/crc16.h"
//#include "clock.h"
#include "uart.h"
#include "gpio.h"
#include "asm/spiflash.h"
#include "asm/csfr.h"
#include "asm/power_interface.h"
#include "asm/efuse.h"
#include "asm/debug.h"
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/io_imap.h
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//===============================================================================//
//
// input IO define
//
//===============================================================================//
#define PA0_IN 1
#define PA1_IN 2
#define PA2_IN 3
#define PA3_IN 4
#define PA4_IN 5
#define PA5_IN 6
#define PA6_IN 7
#define PA7_IN 8
#define PA8_IN 9
#define PA9_IN 10
#define PA10_IN 11
#define PA11_IN 12
#define PA12_IN 13
#define PA13_IN 14
#define PB0_IN 15
#define PB1_IN 16
#define PB2_IN 17
#define PB3_IN 18
#define PB4_IN 19
#define PB5_IN 20
#define PB6_IN 21
#define PB7_IN 22
#define PB8_IN 23
#define PC0_IN 24
#define PC1_IN 25
#define PC2_IN 26
#define PC3_IN 27
#define PC4_IN 28
#define PC5_IN 29
#define PC6_IN 30
#define PC7_IN 31
#define PC8_IN 32
#define PC9_IN 33
#define PC10_IN 34
#define PC11_IN 35
#define USBDP_IN 36
#define USBDM_IN 37
#define PP0_IN 38
//===============================================================================//
//
// function input select sfr
//
//===============================================================================//
typedef struct {
__RW __u8 FI_GP_ICH0;
__RW __u8 FI_GP_ICH1;
__RW __u8 FI_GP_ICH2;
__RW __u8 FI_GP_ICH3;
__RW __u8 FI_GP_ICH4;
__RW __u8 FI_GP_ICH5;
__RW __u8 FI_SD0_CMD;
__RW __u8 FI_SD0_DA0;
__RW __u8 FI_SD0_DA1;
__RW __u8 FI_SD0_DA2;
__RW __u8 FI_SD0_DA3;
__RW __u8 FI_SPI1_CLK;
__RW __u8 FI_SPI1_DA0;
__RW __u8 FI_SPI1_DA1;
__RW __u8 FI_SPI1_DA2;
__RW __u8 FI_SPI1_DA3;
__RW __u8 FI_SPI2_CLK;
__RW __u8 FI_SPI2_DA0;
__RW __u8 FI_SPI2_DA1;
__RW __u8 FI_SPI2_DA2;
__RW __u8 FI_SPI2_DA3;
__RW __u8 FI_IIC0_SCL;
__RW __u8 FI_IIC0_SDA;
__RW __u8 FI_UART0_RX;
__RW __u8 FI_UART1_RX;
__RW __u8 FI_UART2_RX;
__RW __u8 FI_QDEC0_A;
__RW __u8 FI_QDEC0_B;
__RW __u8 FI_CHAIN_IN0;
__RW __u8 FI_CHAIN_IN1;
__RW __u8 FI_CHAIN_IN2;
__RW __u8 FI_CHAIN_IN3;
__RW __u8 FI_CHAIN_RST;
__RW __u8 FI_TOTAL;
} JL_IMAP_TypeDef;
#define JL_IMAP_BASE (ls_base + map_adr(0x3a, 0x00))
#define JL_IMAP ((JL_IMAP_TypeDef *)JL_IMAP_BASE)
loader/update_ui/include_lib/driver/cpu/br35/asm/io_omap.h
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//===============================================================================//
//
// output function define
//
//===============================================================================//
#define FO_GP_OCH0 ((0 << 2)|BIT(1))
#define FO_GP_OCH1 ((1 << 2)|BIT(1))
#define FO_GP_OCH2 ((2 << 2)|BIT(1))
#define FO_GP_OCH3 ((3 << 2)|BIT(1))
#define FO_GP_OCH4 ((4 << 2)|BIT(1))
#define FO_GP_OCH5 ((5 << 2)|BIT(1))
#define FO_GP_OCH6 ((6 << 2)|BIT(1))
#define FO_GP_OCH7 ((7 << 2)|BIT(1))
#define FO_SD0_CLK ((8 << 2)|BIT(1)|BIT(0))
#define FO_SD0_CMD ((9 << 2)|BIT(1)|BIT(0))
#define FO_SD0_DA0 ((10 << 2)|BIT(1)|BIT(0))
#define FO_SD0_DA1 ((11 << 2)|BIT(1)|BIT(0))
#define FO_SD0_DA2 ((12 << 2)|BIT(1)|BIT(0))
#define FO_SD0_DA3 ((13 << 2)|BIT(1)|BIT(0))
#define FO_SPI1_CLK ((14 << 2)|BIT(1)|BIT(0))
#define FO_SPI1_DA0 ((15 << 2)|BIT(1)|BIT(0))
#define FO_SPI1_DA1 ((16 << 2)|BIT(1)|BIT(0))
#define FO_SPI1_DA2 ((17 << 2)|BIT(1)|BIT(0))
#define FO_SPI1_DA3 ((18 << 2)|BIT(1)|BIT(0))
#define FO_SPI2_CLK ((19 << 2)|BIT(1)|BIT(0))
#define FO_SPI2_DA0 ((20 << 2)|BIT(1)|BIT(0))
#define FO_SPI2_DA1 ((21 << 2)|BIT(1)|BIT(0))
#define FO_SPI2_DA2 ((22 << 2)|BIT(1)|BIT(0))
#define FO_SPI2_DA3 ((23 << 2)|BIT(1)|BIT(0))
#define FO_IIC0_SCL ((24 << 2)|BIT(1)|BIT(0))
#define FO_IIC0_SDA ((25 << 2)|BIT(1)|BIT(0))
#define FO_UART0_TX ((26 << 2)|BIT(1)|BIT(0))
#define FO_UART1_TX ((27 << 2)|BIT(1)|BIT(0))
#define FO_UART2_TX ((28 << 2)|BIT(1)|BIT(0))
#define FO_MCPWM0_H ((29 << 2)|BIT(1)|BIT(0))
#define FO_MCPWM1_H ((30 << 2)|BIT(1)|BIT(0))
#define FO_MCPWM0_L ((31 << 2)|BIT(1)|BIT(0))
#define FO_MCPWM1_L ((32 << 2)|BIT(1)|BIT(0))
#define FO_CHAIN_OUT0 ((33 << 2)|BIT(1)|BIT(0))
#define FO_CHAIN_OUT1 ((34 << 2)|BIT(1)|BIT(0))
#define FO_CHAIN_OUT2 ((35 << 2)|BIT(1)|BIT(0))
#define FO_CHAIN_OUT3 ((36 << 2)|BIT(1)|BIT(0))
//===============================================================================//
//
// IO output select sfr
//
//===============================================================================//
typedef struct {
__RW __u8 PA0_OUT;
__RW __u8 PA1_OUT;
__RW __u8 PA2_OUT;
__RW __u8 PA3_OUT;
__RW __u8 PA4_OUT;
__RW __u8 PA5_OUT;
__RW __u8 PA6_OUT;
__RW __u8 PA7_OUT;
__RW __u8 PA8_OUT;
__RW __u8 PA9_OUT;
__RW __u8 PA10_OUT;
__RW __u8 PA11_OUT;
__RW __u8 PA12_OUT;
__RW __u8 PA13_OUT;
__RW __u8 PB0_OUT;
__RW __u8 PB1_OUT;
__RW __u8 PB2_OUT;
__RW __u8 PB3_OUT;
__RW __u8 PB4_OUT;
__RW __u8 PB5_OUT;
__RW __u8 PB6_OUT;
__RW __u8 PB7_OUT;
__RW __u8 PB8_OUT;
__RW __u8 PC0_OUT;
__RW __u8 PC1_OUT;
__RW __u8 PC2_OUT;
__RW __u8 PC3_OUT;
__RW __u8 PC4_OUT;
__RW __u8 PC5_OUT;
__RW __u8 PC6_OUT;
__RW __u8 PC7_OUT;
__RW __u8 PC8_OUT;
__RW __u8 PC9_OUT;
__RW __u8 PC10_OUT;
__RW __u8 PC11_OUT;
__RW __u8 USBDP_OUT;
__RW __u8 USBDM_OUT;
__RW __u8 PP0_OUT;
} JL_OMAP_TypeDef;
#define JL_OMAP_BASE (ls_base + map_adr(0x36, 0x00))
#define JL_OMAP ((JL_OMAP_TypeDef *)JL_OMAP_BASE)
loader/update_ui/include_lib/driver/cpu/br35/asm/irflt.h
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#ifndef __KEY_DRV_IR_H__
#define __KEY_DRV_IR_H__
#define IR_PORTA(x) (0x00 + x)
#define IR_PORTB(x) (0x10 + x)
#define IR_PORTC(x) (0x20 + x)
#define IR_PORTD(x) (0x30 + x)
#define IR_USBDP (0x3d)
#define IR_USBDM (0x3e)
#define IR_IO IR_PORTA(9)
/*ir key define*/
#define IR_00 0
#define IR_01 1
#define IR_02 2
#define IR_03 3
#define IR_04 4
#define IR_05 5
#define IR_06 6
#define IR_07 7
#define IR_08 8
#define IR_09 9
#define IR_10 10
#define IR_11 11
#define IR_12 12
#define IR_13 13
#define IR_14 14
#define IR_15 15
#define IR_16 16
#define IR_17 17
#define IR_18 18
#define IR_19 19
#define IR_20 20
#define IR_21 21
#define IR_22 22
//////////////////////////////////
#define NKEY_00 0xff
#define NKEY_01 0xff
#define NKEY_02 0xff
#define NKEY_03 0xff
#define NKEY_04 0xff
#define NKEY_05 0xff
#define NKEY_06 0xff
#define NKEY_07 0xff
#define NKEY_08 0xff
#define NKEY_09 0xff
#define NKEY_0A 0xff
#define NKEY_0B 0xff
#define NKEY_0C 0xff
#define NKEY_0D 0xff
#define NKEY_0E 0xff
#define NKEY_0F 0xff
#define NKEY_10 0xff
#define NKEY_11 0xff
#define NKEY_12 0xff
#define NKEY_13 0xff
#define NKEY_14 0xff
#define NKEY_15 0xff
#define NKEY_16 0xff
#define NKEY_17 0xff
#define NKEY_18 0xff
#define NKEY_19 0xff
#define NKEY_1A 0xff
#define NKEY_1B 0xff
#define NKEY_1C 0xff
#define NKEY_1D 0xff
#define NKEY_1E 0xff
#define NKEY_1F 0xff
#define NKEY_20 0xff
#define NKEY_21 0xff
#define NKEY_22 0xff
#define NKEY_23 0xff
#define NKEY_24 0xff
#define NKEY_25 0xff
#define NKEY_26 0xff
#define NKEY_27 0xff
#define NKEY_28 0xff
#define NKEY_29 0xff
#define NKEY_2A 0xff
#define NKEY_2B 0xff
#define NKEY_2C 0xff
#define NKEY_2D 0xff
#define NKEY_2E 0xff
#define NKEY_2F 0xff
#define NKEY_30 0xff
#define NKEY_31 0xff
#define NKEY_32 0xff
#define NKEY_33 0xff
#define NKEY_34 0xff
#define NKEY_35 0xff
#define NKEY_36 0xff
#define NKEY_37 0xff
#define NKEY_38 0xff
#define NKEY_39 0xff
#define NKEY_3A 0xff
#define NKEY_3B 0xff
#define NKEY_3C 0xff
#define NKEY_3D 0xff
#define NKEY_3E 0xff
#define NKEY_3F 0xff
#define NKEY_40 0xff
#define NKEY_41 0xff
#define NKEY_42 0xff
#define NKEY_43 0xff
#define NKEY_44 0xff
#define NKEY_45 0xff
#define NKEY_46 0xff
#define NKEY_47 0xff
#define NKEY_48 0xff
#define NKEY_49 0xff
#define NKEY_4A 0xff
#define NKEY_4B 0xff
#define NKEY_4C 0xff
#define NKEY_4D 0xff
#define NKEY_4E 0xff
#define NKEY_4F 0xff
#define NKEY_50 0xff
#define NKEY_51 0xff
#define NKEY_52 0xff
#define NKEY_53 0xff
#define NKEY_54 0xff
#define NKEY_55 0xff
#define NKEY_56 0xff
#define NKEY_57 0xff
#define NKEY_58 0xff
#define NKEY_59 0xff
#define NKEY_5A 0xff
#define NKEY_5B 0xff
#define NKEY_5C 0xff
#define NKEY_5D 0xff
#define NKEY_5E 0xff
#define NKEY_5F 0xff
#define NKEY_60 0xff
#define NKEY_61 0xff
#define NKEY_62 0xff
#define NKEY_63 0xff
#define NKEY_64 0xff
#define NKEY_65 0xff
#define NKEY_66 0xff
#define NKEY_67 0xff
#define NKEY_68 0xff
#define NKEY_69 0xff
#define NKEY_6A 0xff
#define NKEY_6B 0xff
#define NKEY_6C 0xff
#define NKEY_6D 0xff
#define NKEY_6E 0xff
#define NKEY_6F 0xff
#define NKEY_70 0xff
#define NKEY_71 0xff
#define NKEY_72 0xff
#define NKEY_73 0xff
#define NKEY_74 0xff
#define NKEY_75 0xff
#define NKEY_76 0xff
#define NKEY_77 0xff
#define NKEY_78 0xff
#define NKEY_79 0xff
#define NKEY_7A 0xff
#define NKEY_7B 0xff
#define NKEY_7C 0xff
#define NKEY_7D 0xff
#define NKEY_7E 0xff
#define NKEY_7F 0xff
#define NKEY_80 0xff
#define NKEY_81 0xff
#define NKEY_82 0xff
#define NKEY_83 0xff
#define NKEY_84 0xff
#define NKEY_85 0xff
#define NKEY_86 0xff
#define NKEY_87 0xff
#define NKEY_88 0xff
#define NKEY_89 0xff
#define NKEY_8A 0xff
#define NKEY_8B 0xff
#define NKEY_8C 0xff
#define NKEY_8D 0xff
#define NKEY_8E 0xff
#define NKEY_8F 0xff
#define NKEY_90 0xff
#define NKEY_91 0xff
#define NKEY_92 0xff
#define NKEY_93 0xff
#define NKEY_94 0xff
#define NKEY_95 0xff
typedef struct _IR_CODE {
u16 wData; //<键值
u16 wUserCode; //<用户码
u16 timer_pad;
u8 bState; //<接收状态
u8 boverflow; //<红外信号超时
} IR_CODE;
enum timer_sel {
TIMER0,
TIMER1,
TIMER2,
TIMER3,
TIMER4,
TIMER5,
};
struct irflt_platform_data {
u8 irflt_io;
u8 timer;
};
#define IRFLT_PLATFORM_DATA_BEGIN(data) \
static const struct irflt_platform_data data = {
#define IRFLT_PLATFORM_DATA_END() \
};
extern const struct device_operations irflt_dev_ops;
void set_ir_clk(void);
void ir_input_io_sel(u8 port);
void ir_output_timer_sel();
void ir_timeout_set(void);
void irflt_config();
void log_irflt_info();
u8 get_irflt_value(void);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/irq.h
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#ifndef CPU_IRQ_H
#define CPU_IRQ_H
#include "asm/hwi.h"
#define ___interrupt __attribute__((interrupt("")))
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/lp_touch_key_api.h
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#ifndef _LP_TOUCH_KEY_API_
#define _LP_TOUCH_KEY_API_
#include "typedef.h"
#include "asm/lpctmu_hw.h"
enum CTMU_P2M_EVENT {
CTMU_P2M_CH0_RES_EVENT = 0x50,
CTMU_P2M_CH0_SHORT_KEY_EVENT,
CTMU_P2M_CH0_LONG_KEY_EVENT,
CTMU_P2M_CH0_HOLD_KEY_EVENT,
CTMU_P2M_CH0_FALLING_EVENT,
CTMU_P2M_CH0_RAISING_EVENT,
CTMU_P2M_CH1_RES_EVENT = 0x58,
CTMU_P2M_CH1_SHORT_KEY_EVENT,
CTMU_P2M_CH1_LONG_KEY_EVENT,
CTMU_P2M_CH1_HOLD_KEY_EVENT,
CTMU_P2M_CH1_FALLING_EVENT,
CTMU_P2M_CH1_RAISING_EVENT,
CTMU_P2M_CH2_RES_EVENT = 0x60,
CTMU_P2M_CH2_SHORT_KEY_EVENT,
CTMU_P2M_CH2_LONG_KEY_EVENT,
CTMU_P2M_CH2_HOLD_KEY_EVENT,
CTMU_P2M_CH2_FALLING_EVENT,
CTMU_P2M_CH2_RAISING_EVENT,
CTMU_P2M_CH3_RES_EVENT = 0x68,
CTMU_P2M_CH3_SHORT_KEY_EVENT,
CTMU_P2M_CH3_LONG_KEY_EVENT,
CTMU_P2M_CH3_HOLD_KEY_EVENT,
CTMU_P2M_CH3_FALLING_EVENT,
CTMU_P2M_CH3_RAISING_EVENT,
CTMU_P2M_CH4_RES_EVENT = 0x70,
CTMU_P2M_CH4_SHORT_KEY_EVENT,
CTMU_P2M_CH4_LONG_KEY_EVENT,
CTMU_P2M_CH4_HOLD_KEY_EVENT,
CTMU_P2M_CH4_FALLING_EVENT,
CTMU_P2M_CH4_RAISING_EVENT,
CTMU_P2M_EARTCH_IN_EVENT = 0x78,
CTMU_P2M_EARTCH_OUT_EVENT,
};
enum LP_TOUCH_SOFTOFF_MODE {
LP_TOUCH_SOFTOFF_MODE_LEGACY = 0, //普通关机
LP_TOUCH_SOFTOFF_MODE_ADVANCE = 1, //带触摸关机
};
enum touch_key_type {
TOUCH_KEY_NULL,
TOUCH_KEY_SHORT_CLICK,
TOUCH_KEY_LONG_CLICK,
TOUCH_KEY_HOLD_CLICK,
};
enum {
TOUCH_KEY_EVENT_SLIDE_UP,
TOUCH_KEY_EVENT_SLIDE_DOWN,
TOUCH_KEY_EVENT_SLIDE_LEFT,
TOUCH_KEY_EVENT_SLIDE_RIGHT,
TOUCH_KEY_EVENT_MAX,
};
struct lp_touch_key_cfg {
u8 enable;
u8 wakeup_en;
u8 key_value;
u8 range_sensity;
u16 algo_range_min;
u16 algo_range_max;
u16 algo_cfg0;
u16 algo_cfg1;
u16 algo_cfg2;
};
struct lp_touch_key_platform_data {
u8 eartch_en;
u8 eartch_ch;
u8 eartch_ref_ch;
u8 eartch_inear_ok;
u8 eartch_last_state;
u8 eartch_trim_flag;
u16 eartch_trim_value;
u16 eartch_soft_inear_val;
u16 eartch_soft_outear_val;
u8 slide_mode_en;
u8 slide_mode_key_value;
u8 ldo_wkp_reset;
u8 charge_online_reset;
u8 charge_mode_keep_touch;
u8 charge_enter_algo_reset;
u8 charge_exit_algo_reset;
u8 click_cnt[LPCTMU_CHANNEL_SIZE];
u8 last_key[LPCTMU_CHANNEL_SIZE];
u8 key_ch_msg_lock;
u16 key_ch_msg_lock_timer;
u16 short_timer[LPCTMU_CHANNEL_SIZE];
u16 long_timer[LPCTMU_CHANNEL_SIZE];
u16 hold_timer[LPCTMU_CHANNEL_SIZE];
u16 short_click_check_time;
u16 long_click_check_time;
u16 hold_click_check_time;
u8 long_press_reset_enable;
u16 long_press_reset_time;
u16 softoff_wakeup_time;
struct lp_touch_key_cfg key[LPCTMU_CHANNEL_SIZE];
struct lpctmu_platform_data *lpctmu_cfg;
};
u32 lp_touch_key_power_on_status();
u32 lp_touch_key_alog_range_display(u8 *display_buf);
void lp_touch_key_init(struct lp_touch_key_platform_data *config);
void lp_touch_key_disable(void);
void lp_touch_key_enable(void);
void lp_touch_key_charge_mode_enter();
void lp_touch_key_charge_mode_exit();
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/lp_touch_key_range_algo.h
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#ifndef __LP_TOUCH_KEY_RANGE_ALGO_H__
#define __LP_TOUCH_KEY_RANGE_ALGO_H__
#include "typedef.h"
void TouchRangeAlgo_Init(u8 ch, u16 min, u16 max);
void TouchRangeAlgo_Update(u8 ch, u16 x);
void TouchRangeAlgo_Reset(u8 ch, u16 min, u16 max);
u16 TouchRangeAlgo_GetRange(u8 ch, u8 *valid);
void TouchRangeAlgo_SetRange(u8 ch, u16 range);
s32 TouchRangeAlgo_GetSigma(u8 ch);
void TouchRangeAlgo_SetSigma(u8 ch, s32 sigma);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/lp_touch_key_tool.h
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#ifndef __LP_TOUCH_KEY_TOOL__
#define __LP_TOUCH_KEY_TOOL__
#include "typedef.h"
//spp
int lp_touch_key_online_debug_init(void);
int lp_touch_key_online_debug_send(u8 ch, u16 val);
int lp_touch_key_online_debug_key_event_handle(u8 ch_index, void *e);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/lpctmu_hw.h
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#ifndef _LPCTMU_HW_H_
#define _LPCTMU_HW_H_
#include "typedef.h"
#define LPCTMU_CHANNEL_SIZE 5
enum CTMU_M2P_CMD {
REQUEST_LPCTMU_IRQ = 0x50,
REQUEST_LPTMR_IRQ,
RESET_IDENTIFY_ALGO,
};
enum bt_arb_wl2ext_act {
RF_PLL_EN = 1,
RF_PLL_RN,
RF_RX_LDO,
RF_RX_EN,
RF_TX_LDO,
RF_TX_EN,
EF_RX_TX_EN_XOR,
};
enum lpctmu_ext_stop_sel {
BT_SIG_ACT0,
BT_SIG_ACT1,
BT_SIG_ACT0_ACT1_XOR,
BT_SIG_ACT0_ACT1_AND,
};
struct lpctmu_ch_cfg {
u8 enable;
u8 wakeup_en;
};
struct lpctmu_platform_data {
u8 ext_stop_ch_en;
u8 ext_stop_sel;
u8 sample_window_time; //采样窗口时间 ms
u8 sample_scan_time; //多久采样一次 ms
u8 lowpower_sample_scan_time; //软关机下多久采样一次 ms
u16 aim_vol_delta;
u16 aim_charge_khz;
struct lpctmu_ch_cfg ch[LPCTMU_CHANNEL_SIZE];
};
#define LPCTMU_PLATFORM_DATA_BEGIN(data) \
static struct lpctmu_platform_data data = {
#define LPCTMU_PLATFORM_DATA_END() \
};
void lpctmu_send_m2p_cmd(enum CTMU_M2P_CMD cmd);
void lpctmu_set_ana_hv_level(u8 level);
u8 lpctmu_get_ana_hv_level(void);
void lpctmu_set_ana_cur_level(u8 ch, u8 cur_level);
u8 lpctmu_get_ana_cur_level(u8 ch);
void lpctmu_init(struct lpctmu_platform_data *pdata);
void lpctmu_disable(void);
void lpctmu_enable(void);
u8 lpctmu_is_sf_keep(void);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/mcpwm.h
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#ifndef _MCPWM_H_
#define _MCPWM_H_
#include "typedef.h"
#define MCPWM_NUM_MAX 8
#define MCPWM_CH_MAX 2
#define MCPWM_TMR_BASE_ADDR (&JL_MCPWM->TMR0_CON)
#define MCPWM_TMR_OFFSET (&JL_MCPWM->TMR1_CON - &JL_MCPWM->TMR0_CON)
#define MCPWM_CH_BASE_ADDR (&JL_MCPWM->CH0_CON0)
#define MCPWM_CH_OFFSET (&JL_MCPWM->CH1_CON0 - &JL_MCPWM->CH0_CON0)
//TMRx_CON reg
#define MCPWM_TMR_INCF 15
// #define MCPWM_TMR_RESERVE 14
#define MCPWM_TMR_UFPND 13
#define MCPWM_TMR_OFPN 12
#define MCPWM_TMR_UFCLR 11
#define MCPWM_TMR_OFCLR 10
#define MCPWM_TMR_UFIE 9
#define MCPWM_TMR_OFTE 8
#define MCPWM_TMR_CKSRC 7
#define MCPWM_TMR_CKPS 3 //4bit
// #define MCPWM_TMR_RESERVE 2
#define MCPWM_TMR_MODE 0 //2bit
//CHx_CON0 reg
#define MCPWM_CH_DTCKPS 12 //4bit
#define MCPWM_CH_DTPR 7 //5bit
#define MCPWM_CH_DTEN 6
#define MCPWM_CH_L_INV 5
#define MCPWM_CH_H_INV 4
#define MCPWM_CH_L_EN 3
#define MCPWM_CH_H_EN 2
#define MCPWM_CH_CMP_LD 0 //2bit
//CHx_CON1 reg
#define MCPWM_CH_FPND 15
#define MCPWM_CH_FCLR 14
// #define MCPWM_CH_RESERVE 12 //2bit
#define MCPWM_CH_INTEN 11
#define MCPWM_CH_TMRSEL 8 //3bit
// #define MCPWM_CH_reserve 5 //3bit
#define MCPWM_CH_FPINEN 4
#define MCPWM_CH_FPINAUTO 3
#define MCPWM_CH_FPINSEL 0 //3bit
//FPIN_CON reg
#define MCPWM_FPIN_EDGE 16 //8bit
#define MCPWM_FPIN_FLT_EN 8 //8bit
// #define MCPWM_CH_reserve 6 //2bit
#define MCPWM_FPIN_FLT_PR 8 //5bit
//MCPWM_CON reg
#define MCPWM_CON_CLK_EN 16
#define MCPWM_CON_TMR_EN 8 //8bit
#define MCPWM_CON_PWM_EN 0 //8bit2
/* pwm通道选择 */
typedef enum {
MCPWM_CH0 = 0,
MCPWM_CH1,
} mcpwm_ch_type;
/* 对齐方式选择 */
typedef enum {
MCPWM_EDGE_ALIGNED, ///< 边沿对齐模式
MCPWM_CENTER_ALIGNED, ///< 中心对齐模式
} mcpwm_aligned_mode_type;
/* 故障保护触发边沿 */
typedef enum {
MCPWM_EDGE_FAILL = 0, //下降沿触发
MCPWM_EDGE_RISE, //上升沿触发
MCPWM_EDGE_DEFAULT = 0xff, //默认会忽略
} mcpwm_edge;
/* MCPWM通道寄存器 */
typedef struct _mcpwm_ch_reg {
volatile u32 ch_con0;
volatile u32 ch_con1;
volatile u32 ch_cmph;
volatile u32 ch_cmpl;
} MCPWM_CHx_REG;
/* MCPWM TIMER寄存器 */
typedef struct _mcpwm_timer_reg {
volatile u32 tmr_con;
volatile u32 tmr_cnt;
volatile u32 tmr_pr;
} MCPWM_TIMERx_REG;
/* 初始化要用的参数结构体 */
typedef void (*mcpwm_detect_irq_callback)(u32 ch); //回调函数
struct mcpwm_config {
mcpwm_ch_type ch; ///< 选择pwm通道号
mcpwm_aligned_mode_type aligned_mode; ///< PWM对齐方式选择
u32 frequency; ///< 初始共同频率，CH0, CH, CH2,,,,,,
u16 duty; ///< 初始占空比，0~10000 对应 0%~100% 。每个通道可以有不同的占空比。互补模式的占空比体现在高引脚的波形上。
u16 h_pin; ///< 一个通道的H引脚。
u16 l_pin; ///< 一个通道的L引脚，不需要则填-1
u8 complementary_en; ///< 该通道的两个引脚输出的波形。0: 同步， 1: 互补，互补波形的占空比体现在H引脚上
u16 detect_port;
mcpwm_edge edge;
mcpwm_detect_irq_callback irq_cb;
u16 irq_priority; //默认值优先级1
};
struct mcpwm_info_t {
MCPWM_CHx_REG *ch_reg;
MCPWM_TIMERx_REG *timer_reg;
struct mcpwm_config cfg;
};
int mcpwm_init(struct mcpwm_config *mcpwm_cfg);
void mcpwm_deinit(int mcpwm_cfg_id);
void mcpwm_start(int mcpwm_cfg_id);
void mcpwm_pause(int mcpwm_cfg_id);
void mcpwm_resume(int mcpwm_cfg_id);
void mcpwm_set_frequency(int mcpwm_cfg_id, mcpwm_aligned_mode_type align, u32 frequency);
void mcpwm_set_duty(int mcpwm_cfg_id, u16 duty);
void mcpwm_fpnd_clr(u32 ch);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/plcnt.h
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#ifndef _PLCNT_DRV_H_
#define _PLCNT_DRV_H_
#define PLCNT_KEY_CH_MAX 3
struct touch_key_port {
u16 press_delta; //按下判决的阈值
u8 port; //触摸按键IO
u8 key_value; //按键返回值
};
struct touch_key_platform_data {
u8 num; //触摸按键个数
const struct touch_key_port *port_list;
};
/* =========== pclcnt API ============= */
//plcnt 初始化
int plcnt_init(void *_data);
//获取plcnt按键状态
u8 get_plcnt_value(void);
#endif /* _PLCNT_DRV_H_ */
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/ipc_spin_lock.h
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#ifndef _IPC_SPIN_LOCK_H_
#define _IPC_SPIN_LOCK_H_
#include "typedef.h"
#include "gpio.h"
enum ipc_spin_lock_event {
IPC_SPIN_LOCK_EVENT_USER0 = 0,//自定义事件名
IPC_SPIN_LOCK_EVENT_USER1,
IPC_SPIN_LOCK_EVENT_USER2,
IPC_SPIN_LOCK_EVENT_USER3,
IPC_SPIN_LOCK_EVENT_USER4,
IPC_SPIN_LOCK_EVENT_USER5,
IPC_SPIN_LOCK_EVENT_USER6,
IPC_SPIN_LOCK_EVENT_USER7,
IPC_SPIN_LOCK_EVENT_USER8,
IPC_SPIN_LOCK_EVENT_USER9,
IPC_SPIN_LOCK_EVENT_USER10,
IPC_SPIN_LOCK_EVENT_USER11,
IPC_SPIN_LOCK_EVENT_CBUF, //12
IPC_SPIN_LOCK_EVENT_UART, //13
IPC_SPIN_LOCK_EVENT_PMU, //14
IPC_SPIN_LOCK_EVENT_P11_IIC,//15
IPC_SPIN_LOCK_EVENT_MAX,
};
void ipc_spin_lock_init();
void ipc_spin_lock(enum ipc_spin_lock_event event);//0~15
void ipc_spin_unlock(enum ipc_spin_lock_event event);//0~15
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/lp_ipc.h
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#ifndef __LP_IPC_H__
#define __LP_IPC_H__
//=================================消息格式========================================
//消息buf大小
#define MAX_POOL 512
//消息类型
enum {
MSG_ACK = 0,
MSG_TEST = 1,
MSG_COMMOM = 2,
MSG_CTMU = 3,
MSG_SENSOR = 4,
MSG_VAD = 5,
MSG_RTC = 6,
MSG_APP = 7,
};
//消息函数返回值
enum {
MSG_NO_ERROR = 0, //读取/发送消息成功
MSG_NO_MSG = -1, //未读取到消息
MSG_BUF_ERROR = -2, //读/写消息格式不对
MSG_BUF_READ_OVER = -3, //读消息溢出，传的参数长度不对
MSG_BUF_WRITE_OVER = -4, //写消息会溢出
};
//消息头格式
#define MSG_HEADER_BYTE_LEN 4
#define MSG_HEADER_BIT_LEN (MSG_HEADER_BYTE_LEN*8)
#define MSG_HEADER_ALL_BIT ((1L<<MSG_HEADER_BIT_LEN) - 1)
#define MSG_INDEX_BIT 15
#define MSG_ACK_BIT 1
#define MSG_TYPE_BIT_LEN 8
#define MSG_PARAM_BIT_LEN (MSG_HEADER_BYTE_LEN*8-MSG_TYPE_BIT_LEN-MSG_INDEX_BIT-MSG_ACK_BIT)
struct lp_msg_head {
u32 type :
MSG_TYPE_BIT_LEN;
u32 ack :
MSG_ACK_BIT;
u32 index :
MSG_INDEX_BIT;
u32 len :
MSG_PARAM_BIT_LEN;
} __attribute__((packed));
//消息队列
typedef struct LP_Q {
u16 in; //写位置
u16 out; //读位置
u16 count; //有效数据
u16 size; //buf大小
u32 start; //buf起址
u32 ack_flag; //应答标记
} LP_Q;
enum {
LP_BUF_NO_ERR = 0,
LP_BUF_READ_NOT_ENOUGH_DATA = -1, //buf里数据不够读
LP_BUF_READ_NO_DATA = -2, //buf里面没有数据
LP_BUF_WRITE_OVER = -3, //写数据超过了buf大小
};
//用户消息对应处理
struct lp_msg_handler {
void (*handler)(void *, u8 *, u32);
void *priv;
u8 type;
} __attribute__((packed));
//===========================================================================//
// P2M MESSAGE TABLE //
//===========================================================================//
#define P11_RAM_ACCESS(x) (*(volatile u8 *)(x))
#define M2P_MESSAGE_ACCESS(x) P11_RAM_ACCESS(M2P_MESSAGE_RAM_BEGIN + x)
#define P2M_MESSAGE_ACCESS(x) P11_RAM_ACCESS(P2M_MESSAGE_RAM_BEGIN + x)
//==================power=============================
#define P2M_WKUP_SRC P2M_MESSAGE_ACCESS(0)
#define P2M_WKUP_P_PND P2M_MESSAGE_ACCESS(1)
#define P2M_WKUP_N_PND P2M_MESSAGE_ACCESS(2)
#define P2M_AWKUP_P_PND P2M_MESSAGE_ACCESS(3)
#define P2M_AWKUP_N_PND P2M_MESSAGE_ACCESS(4)
#define P2M_WKUP_RTC P2M_MESSAGE_ACCESS(5)
//==================system===========================
#define P2M_MESSAGE_BANK_ADR_L P2M_MESSAGE_ACCESS(15)
#define P2M_MESSAGE_BANK_ADR_H P2M_MESSAGE_ACCESS(16)
#define P2M_MESSAGE_BANK_INDEX P2M_MESSAGE_ACCESS(17)
#define P2M_MESSAGE_BANK_ACK P2M_MESSAGE_ACCESS(18)
#define P2M_P11_HEAP_BEGIN_ADDR_L P2M_MESSAGE_ACCESS(19)
#define P2M_P11_HEAP_BEGIN_ADDR_H P2M_MESSAGE_ACCESS(20)
#define P2M_P11_HEAP_SIZE_L P2M_MESSAGE_ACCESS(21)
#define P2M_P11_HEAP_SIZE_H P2M_MESSAGE_ACCESS(22)
#define P2M_REPLY_SYNC_CMD P2M_MESSAGE_ACCESS(23)
#define P2M_CBUF_ADDR0 P2M_MESSAGE_ACCESS(24)
#define P2M_CBUF_ADDR1 P2M_MESSAGE_ACCESS(25)
#define P2M_CBUF_ADDR2 P2M_MESSAGE_ACCESS(26)
#define P2M_CBUF_ADDR3 P2M_MESSAGE_ACCESS(27)
#define P2M_CBUF1_ADDR0 P2M_MESSAGE_ACCESS(28)
#define P2M_CBUF1_ADDR1 P2M_MESSAGE_ACCESS(29)
#define P2M_CBUF1_ADDR2 P2M_MESSAGE_ACCESS(30)
#define P2M_CBUF1_ADDR3 P2M_MESSAGE_ACCESS(31)
//==================clock===========================
#define P2M_BTOSC_OK P2M_MESSAGE_ACCESS(35)
//==================lpctmu===========================
#define P2M_CTMU_CMD_ACK P2M_MESSAGE_ACCESS(39)
#define P2M_CTMU_KEY_EVENT P2M_MESSAGE_ACCESS(40)
#define P2M_CTMU_KEY_CNT P2M_MESSAGE_ACCESS(41)
#define P2M_CTMU_KEY_STATE P2M_MESSAGE_ACCESS(42)
#define P2M_CTMU_EARTCH_EVENT P2M_MESSAGE_ACCESS(43)
#define P2M_MASSAGE_CTMU_CH0_L_RES 44
#define P2M_MASSAGE_CTMU_CH0_H_RES 45
#define P2M_CTMU_CH0_L_RES P2M_MESSAGE_ACCESS(44)
#define P2M_CTMU_CH0_H_RES P2M_MESSAGE_ACCESS(45)
#define P2M_CTMU_CH1_L_RES P2M_MESSAGE_ACCESS(46)
#define P2M_CTMU_CH1_H_RES P2M_MESSAGE_ACCESS(47)
#define P2M_CTMU_CH2_L_RES P2M_MESSAGE_ACCESS(48)
#define P2M_CTMU_CH2_H_RES P2M_MESSAGE_ACCESS(49)
#define P2M_CTMU_CH3_L_RES P2M_MESSAGE_ACCESS(50)
#define P2M_CTMU_CH3_H_RES P2M_MESSAGE_ACCESS(51)
#define P2M_CTMU_CH4_L_RES P2M_MESSAGE_ACCESS(52)
#define P2M_CTMU_CH4_H_RES P2M_MESSAGE_ACCESS(53)
#define P2M_CTMU_EARTCH_L_IIR_VALUE P2M_MESSAGE_ACCESS(54)
#define P2M_CTMU_EARTCH_H_IIR_VALUE P2M_MESSAGE_ACCESS(55)
#define P2M_CTMU_EARTCH_L_DIFF_VALUE P2M_MESSAGE_ACCESS(56)
#define P2M_CTMU_EARTCH_H_DIFF_VALUE P2M_MESSAGE_ACCESS(57)
//===========================================================================//
// M2P MESSAGE TABLE //
//===========================================================================//
//==================power=============================
#define M2P_LRC_PRD M2P_MESSAGE_ACCESS(0)
#define M2P_WDVDD M2P_MESSAGE_ACCESS(1)
#define M2P_LRC_FEQ0 M2P_MESSAGE_ACCESS(2)
#define M2P_LRC_FEQ1 M2P_MESSAGE_ACCESS(3)
#define M2P_LRC_FEQ2 M2P_MESSAGE_ACCESS(4)
#define M2P_LRC_FEQ3 M2P_MESSAGE_ACCESS(5)
#define M2P_VDDIO_KEEP M2P_MESSAGE_ACCESS(6)
#define M2P_LRC_KEEP M2P_MESSAGE_ACCESS(7)
#define M2P_RCH_FEQ_L M2P_MESSAGE_ACCESS(8)
#define M2P_RCH_FEQ_H M2P_MESSAGE_ACCESS(9)
#define M2P_MEM_CONTROL M2P_MESSAGE_ACCESS(10)
#define M2P_BTOSC_KEEP M2P_MESSAGE_ACCESS(11)
#define M2P_CTMU_KEEP M2P_MESSAGE_ACCESS(12)
#define M2P_RTC_KEEP M2P_MESSAGE_ACCESS(13)
#define M2P_SF_MODE M2P_MESSAGE_ACCESS(14)
#define M2P_DCV_MODE M2P_MESSAGE_ACCESS(15)
#define M2P_LIGHT_PDOWN_DVDD_VOL M2P_MESSAGE_ACCESS(16)
#define M2P_LRC24M_MODE M2P_MESSAGE_ACCESS(17)
//==================system===========================
#define M2P_SYNC_CMD M2P_MESSAGE_ACCESS(25)
#define M2P_WDT_SYNC M2P_MESSAGE_ACCESS(26)
//==================clock===========================
#define M2P_LRC24M_CFG0 M2P_MESSAGE_ACCESS(35)
#define M2P_LRC24M_CFG1 M2P_MESSAGE_ACCESS(36)
#define M2P_BTOSC_CFG0 M2P_MESSAGE_ACCESS(37)
#define M2P_BTOSC_CFG1 M2P_MESSAGE_ACCESS(38)
#define M2P_LRC24M_FEQ0 M2P_MESSAGE_ACCESS(39)
#define M2P_LRC24M_FEQ1 M2P_MESSAGE_ACCESS(40)
#define M2P_LRC24M_FEQ2 M2P_MESSAGE_ACCESS(41)
#define M2P_LRC24M_FEQ3 M2P_MESSAGE_ACCESS(42)
//==================lpctmu===========================
/*触摸所有通道配置*/
#define M2P_CTMU_CMD M2P_MESSAGE_ACCESS(50)
#define M2P_CTMU_CH_ENABLE M2P_MESSAGE_ACCESS(51)
#define M2P_CTMU_CH_WAKEUP_EN M2P_MESSAGE_ACCESS(52)
#define M2P_CTMU_CH_DEBUG M2P_MESSAGE_ACCESS(53)
#define M2P_CTMU_CH_CFG M2P_MESSAGE_ACCESS(54)
#define M2P_CTMU_EARTCH_CH M2P_MESSAGE_ACCESS(55)
#define M2P_CTMU_SCAN_TIME M2P_MESSAGE_ACCESS(56)
#define M2P_CTMU_LOWPOER_SCAN_TIME M2P_MESSAGE_ACCESS(57)
#define M2P_CTMU_LONG_KEY_EVENT_TIMEL M2P_MESSAGE_ACCESS(58)
#define M2P_CTMU_LONG_KEY_EVENT_TIMEH M2P_MESSAGE_ACCESS(59)
#define M2P_CTMU_HOLD_KEY_EVENT_TIMEL M2P_MESSAGE_ACCESS(60)
#define M2P_CTMU_HOLD_KEY_EVENT_TIMEH M2P_MESSAGE_ACCESS(61)
#define M2P_CTMU_SOFTOFF_WAKEUP_TIMEL M2P_MESSAGE_ACCESS(62)
#define M2P_CTMU_SOFTOFF_WAKEUP_TIMEH M2P_MESSAGE_ACCESS(63)
#define M2P_CTMU_LONG_PRESS_RESET_TIMEL M2P_MESSAGE_ACCESS(64)//长按复位
#define M2P_CTMU_LONG_PRESS_RESET_TIMEH M2P_MESSAGE_ACCESS(65)//长按复位
#define M2P_CTMU_INEAR_VALUE_L M2P_MESSAGE_ACCESS(66)
#define M2P_CTMU_INEAR_VALUE_H M2P_MESSAGE_ACCESS(67)
#define M2P_CTMU_OUTEAR_VALUE_L M2P_MESSAGE_ACCESS(68)
#define M2P_CTMU_OUTEAR_VALUE_H M2P_MESSAGE_ACCESS(69)
#define M2P_CTMU_EARTCH_TRIM_VALUE_L M2P_MESSAGE_ACCESS(70)
#define M2P_CTMU_EARTCH_TRIM_VALUE_H M2P_MESSAGE_ACCESS(71)
#define M2P_MASSAGE_CTMU_CH0_CFG0L 72
#define M2P_MASSAGE_CTMU_CH0_CFG0H 73
#define M2P_MASSAGE_CTMU_CH0_CFG1L 74
#define M2P_MASSAGE_CTMU_CH0_CFG1H 75
#define M2P_MASSAGE_CTMU_CH0_CFG2L 76
#define M2P_MASSAGE_CTMU_CH0_CFG2H 77
#define M2P_CTMU_CH0_CFG0L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0L + 0 * 8))
#define M2P_CTMU_CH0_CFG0H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0H + 0 * 8))
#define M2P_CTMU_CH0_CFG1L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1L + 0 * 8))
#define M2P_CTMU_CH0_CFG1H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1H + 0 * 8))
#define M2P_CTMU_CH0_CFG2L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2L + 0 * 8))
#define M2P_CTMU_CH0_CFG2H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2H + 0 * 8))
#define M2P_CTMU_CH1_CFG0L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0L + 1 * 8))
#define M2P_CTMU_CH1_CFG0H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0H + 1 * 8))
#define M2P_CTMU_CH1_CFG1L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1L + 1 * 8))
#define M2P_CTMU_CH1_CFG1H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1H + 1 * 8))
#define M2P_CTMU_CH1_CFG2L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2L + 1 * 8))
#define M2P_CTMU_CH1_CFG2H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2H + 1 * 8))
#define M2P_CTMU_CH2_CFG0L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0L + 2 * 8))
#define M2P_CTMU_CH2_CFG0H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0H + 2 * 8))
#define M2P_CTMU_CH2_CFG1L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1L + 2 * 8))
#define M2P_CTMU_CH2_CFG1H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1H + 2 * 8))
#define M2P_CTMU_CH2_CFG2L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2L + 2 * 8))
#define M2P_CTMU_CH2_CFG2H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2H + 2 * 8))
#define M2P_CTMU_CH3_CFG0L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0L + 3 * 8))
#define M2P_CTMU_CH3_CFG0H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0H + 3 * 8))
#define M2P_CTMU_CH3_CFG1L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1L + 3 * 8))
#define M2P_CTMU_CH3_CFG1H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1H + 3 * 8))
#define M2P_CTMU_CH3_CFG2L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2L + 3 * 8))
#define M2P_CTMU_CH3_CFG2H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2H + 3 * 8))
#define M2P_CTMU_CH4_CFG0L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0L + 4 * 8))
#define M2P_CTMU_CH4_CFG0H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG0H + 4 * 8))
#define M2P_CTMU_CH4_CFG1L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1L + 4 * 8))
#define M2P_CTMU_CH4_CFG1H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG1H + 4 * 8))
#define M2P_CTMU_CH4_CFG2L M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2L + 4 * 8))
#define M2P_CTMU_CH4_CFG2H M2P_MESSAGE_ACCESS((M2P_MASSAGE_CTMU_CH0_CFG2H + 4 * 8))//0x56
/*
* Must Sync to P11 code
*/
enum {
M2P_LP_INDEX = 0,
M2P_PF_INDEX,
M2P_LLP_INDEX,
M2P_P33_INDEX,
M2P_SF_INDEX,
M2P_CTMU_INDEX,
M2P_CCMD_INDEX, //common cmd
M2P_VAD_INDEX,
M2P_USER_INDEX,
M2P_WDT_INDEX,
M2P_SYNC_INDEX,
M2P_APP_INDEX,
};
enum {
P2M_LP_INDEX = 0,
P2M_PF_INDEX,
P2M_LLP_INDEX,
P2M_WK_INDEX,
P2M_WDT_INDEX,
P2M_LP_INDEX2,
P2M_CTMU_INDEX,
P2M_CTMU_POWUP,
P2M_REPLY_CCMD_INDEX, //reply common cmd
P2M_VAD_INDEX,
P2M_USER_INDEX,
P2M_BANK_INDEX,
P2M_REPLY_SYNC_INDEX,
P2M_APP_INDEX,
};
enum {
CLOSE_P33_INTERRUPT = 1,
OPEN_P33_INTERRUPT,
LOWPOWER_PREPARE,
M2P_SPIN_LOCK,
M2P_SPIN_UNLOCK,
P2M_SPIN_LOCK,
P2M_SPIN_UNLOCK,
};
#include "m2p_msg.h"
#include "p2m_msg.h"
void msys_to_p11_sync_cmd(u8 cmd);
void lp_ipc_init();
void lp_lock();
void lp_unlock();
void config_post_ack_flag(u32 enable);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/m2p_msg.h
+36
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#ifndef __M2P_MSG_H__
#define __M2P_MSG_H__
#define REGISTER_M2P_MSG_HANDLER(pri, _type, fn) \
const struct lp_msg_handler _##fn SEC_USED(.m2p_msg_handler)= { \
.handler = fn, \
.priv = pri, \
.type = _type, \
}
extern struct lp_msg_handler m2p_msg_handler_begin[];
extern struct lp_msg_handler m2p_msg_handler_end[];
#define list_for_each_m2p_msg_handler(p) \
for (p = m2p_msg_handler_begin; p < m2p_msg_handler_end; p++)
int m2p_get_msg(struct lp_msg_head *head, void *msg, u32 len);
int m2p_post_msg(u32 type, u32 ack, const void *msg, u32 len);
void msys_to_p11_sys_cmd(u8 cmd);
int m2p_msg_hdl();
u32 msys_ack_p11(u32 index);
/*
* function:主系统向P11发送消息，往消息池丢数据
*
* param name: null
* param argc：参数个数
*/
int task_post_msg2p11(char *name, int argc, ...);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p11_api.h
+24
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#ifndef __P11_API_H__
#define __P11_API_H__
#define P11_P2M_INT_IE P11_SYSTEM->P2M_INT_IE
#define P11_M2P_INT_IE P11_SYSTEM->M2P_INT_IE
#define P11_M2P_INT_SET P11_SYSTEM->M2P_INT_SET
#define P11_P2M_INT_SET P11_SYSTEM->P2M_INT_SET
#define P11_P2M_INT_CLR P11_SYSTEM->P2M_INT_CLR
#define P11_P2M_INT_PND P11_SYSTEM->P2M_INT_PND
enum P11_SYS_CLK_TABLE {
P11_SYS_CLK_RC16M = 0,
P11_SYS_CLK_RC250K,
P11_SYS_CLK_LRC_OSC,
P11_SYS_CLK_BTOSC_24M,
P11_SYS_CLK_BTOSC_48M,
P11_SYS_CLK_LRC24M,
P11_SYS_CLK_CLK_X2,
P11_SYS_CLK_TEST,
};
void p11_sys_clk_sel(u32 sel);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p11_csfr.h
+180
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//*********************************************************************************//
// Module name : csfr.h //
// Description : q32small core sfr define //
// By Designer : zequan_liu //
// Dat changed : //
//*********************************************************************************//
#ifndef __P11_Q32S_CSFR__
#define __P11_Q32S_CSFR__
#define __RW volatile // read write
#define __RO volatile const // only read
#define __WO volatile // only write
#define __u8 unsigned int // u8 to u32 special for struct
#define __u16 unsigned int // u16 to u32 special for struct
#define __u32 unsigned int
#define CPU_CORE_NUM 1
//---------------------------------------------//
// q32small define
//---------------------------------------------//
#ifdef PMU_SYSTEM
#define p11_q32s_sfr_base 0x00a000
#define p11_q32s_sfr_offset 0x000000 // multi_core used
#else
#define p11_q32s_sfr_base 0xf2a000
#define p11_q32s_sfr_offset 0x000000 // multi_core used
#endif
#define p11_q32s_cpu_base (p11_q32s_sfr_base + 0x00)
#define p11_q32s_mpu_base (p11_q32s_sfr_base + 0x80)
#define p11_q32s(n) ((JL_TypeDef_p11_q32s *)(p11_q32s_sfr_base + p11_q32s_sfr_offset*n))
#define p11_q32s_mpu(n) ((JL_TypeDef_p11_q32s_MPU *)(p11_q32s_mpu_base + p11_q32s_sfr_offset*n))
//---------------------------------------------//
// q32small core sfr
//---------------------------------------------//
typedef struct {
/* 00 */ __RO __u32 DR00;
/* 01 */ __RO __u32 DR01;
/* 02 */ __RO __u32 DR02;
/* 03 */ __RO __u32 DR03;
/* 04 */ __RO __u32 DR04;
/* 05 */ __RO __u32 DR05;
/* 06 */ __RO __u32 DR06;
/* 07 */ __RO __u32 DR07;
/* 08 */ __RO __u32 DR08;
/* 09 */ __RO __u32 DR09;
/* 0a */ __RO __u32 DR10;
/* 0b */ __RO __u32 DR11;
/* 0c */ __RO __u32 DR12;
/* 0d */ __RO __u32 DR13;
/* 0e */ __RO __u32 DR14;
/* 0f */ __RO __u32 DR15;
/* 10 */ __RO __u32 RETI;
/* 11 */ __RO __u32 RETE;
/* 12 */ __RO __u32 RETX;
/* 13 */ __RO __u32 RETS;
/* 14 */ __RO __u32 SR04;
/* 15 */ __RO __u32 PSR;
/* 16 */ __RO __u32 CNUM;
/* 17 */ __RO __u32 SR07;
/* 18 */ __RO __u32 SR08;
/* 19 */ __RO __u32 SR09;
/* 1a */ __RO __u32 SR10;
/* 1b */ __RO __u32 ICFG;
/* 1c */ __RO __u32 USP;
/* 1d */ __RO __u32 SSP;
/* 1e */ __RO __u32 SP;
/* 1f */ __RO __u32 PCRS;
/* 20 */ __RW __u32 BPCON;
/* 21 */ __RW __u32 BSP;
/* 22 */ __RW __u32 BP0;
/* 23 */ __RW __u32 BP1;
/* 24 */ __RW __u32 BP2;
/* 25 */ __RW __u32 BP3;
/* 26 */ __WO __u32 CMD_PAUSE;
/* */ __RO __u32 REV_30_26[0x30 - 0x26 - 1];
/* 30 */ __RW __u32 PMU_CON0;
/* 31 */ __RW __u32 PMU_CON1;
/* 32 */ __RW __u32 RST_ADDR;
/* */ __RO __u32 REV_3b_30[0x3b - 0x32 - 1];
/* 3b */ __RW __u8 TTMR_CON;
/* 3c */ __RW __u32 TTMR_CNT;
/* 3d */ __RW __u32 TTMR_PRD;
/* 3e */ __RW __u32 BANK_CON;
/* 3f */ __RW __u32 BANK_NUM;
/* 40 */ __RW __u32 ICFG00;
/* 41 */ __RW __u32 ICFG01;
/* 42 */ __RW __u32 ICFG02;
/* 43 */ __RW __u32 ICFG03;
/* 44 */ __RW __u32 ICFG04;
/* 45 */ __RW __u32 ICFG05;
/* 46 */ __RW __u32 ICFG06;
/* 47 */ __RW __u32 ICFG07;
/* 48 */ __RW __u32 ICFG08;
/* 49 */ __RW __u32 ICFG09;
/* 4a */ __RW __u32 ICFG10;
/* 4b */ __RW __u32 ICFG11;
/* 4c */ __RW __u32 ICFG12;
/* 4d */ __RW __u32 ICFG13;
/* 4e */ __RW __u32 ICFG14;
/* 4f */ __RW __u32 ICFG15;
/* 50 */ __RW __u32 ICFG16;
/* 51 */ __RW __u32 ICFG17;
/* 52 */ __RW __u32 ICFG18;
/* 53 */ __RW __u32 ICFG19;
/* 54 */ __RW __u32 ICFG20;
/* 55 */ __RW __u32 ICFG21;
/* 56 */ __RW __u32 ICFG22;
/* 57 */ __RW __u32 ICFG23;
/* 58 */ __RW __u32 ICFG24;
/* 59 */ __RW __u32 ICFG25;
/* 5a */ __RW __u32 ICFG26;
/* 5b */ __RW __u32 ICFG27;
/* 5c */ __RW __u32 ICFG28;
/* 5d */ __RW __u32 ICFG29;
/* 5e */ __RW __u32 ICFG30;
/* 5f */ __RW __u32 ICFG31;
/* 60 */ __RO __u32 IPND0;
/* 61 */ __RO __u32 IPND1;
/* 62 */ __RO __u32 IPND2;
/* 63 */ __RO __u32 IPND3;
/* 64 */ __RO __u32 IPND4;
/* 65 */ __RO __u32 IPND5;
/* 66 */ __RO __u32 IPND6;
/* 67 */ __RO __u32 IPND7;
/* 68 */ __WO __u32 ILAT_SET;
/* 69 */ __WO __u32 ILAT_CLR;
/* 6a */ __RW __u32 IPMASK;
/* 6b */ __RW __u32 GIEMASK;
/* 6c */ __RW __u32 IWKUP_NUM;
/* */ __RO __u32 REV_70_6c[0x70 - 0x6c - 1];
/* 70 */ __RW __u32 ETM_CON;
/* 71 */ __RO __u32 ETM_PC0;
/* 72 */ __RO __u32 ETM_PC1;
/* 73 */ __RO __u32 ETM_PC2;
/* 74 */ __RO __u32 ETM_PC3;
/* 75 */ __RW __u32 WP0_ADRH;
/* 76 */ __RW __u32 WP0_ADRL;
/* 77 */ __RW __u32 WP0_DATH;
/* 78 */ __RW __u32 WP0_DATL;
/* 79 */ __RW __u32 WP0_PC;
/* */ __RO __u32 REV_80_79[0x80 - 0x79 - 1];
/* 80 */ __RW __u32 EMU_CON;
/* 81 */ __RW __u32 EMU_MSG;
/* 82 */ __RO __u32 EMU_SSP_H;
/* 83 */ __RO __u32 EMU_SSP_L;
/* 84 */ __RO __u32 EMU_USP_H;
/* 85 */ __RO __u32 EMU_USP_L;
} JL_TypeDef_p11_q32s;
#undef __RW
#undef __RO
#undef __WO
#undef __u8
#undef __u16
#undef __u32
#endif
//*********************************************************************************//
// //
// end of this module //
// //
//*********************************************************************************//
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p11_io_imap.h
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//===============================================================================//
//
// input IO define
//
//===============================================================================//
#define P11_PB0_IN 1
#define P11_PB1_IN 2
#define P11_PB2_IN 3
#define P11_PB3_IN 4
#define P11_PB4_IN 5
#define P11_PB5_IN 6
#define P11_PB6_IN 7
#define P11_PB7_IN 8
#define P11_PB8_IN 9
//===============================================================================//
//
// function input select sfr
//
//===============================================================================//
typedef struct {
__RW __u8 P11_FI_GP_ICH0;
__RW __u8 P11_FI_GP_ICH1;
__RW __u8 P11_FI_GP_ICH2;
__RW __u8 P11_FI_UART0_RX;
__RW __u8 P11_FI_UART1_RX;
__RW __u8 P11_FI_SPI_DI;
__RW __u8 P11_FI_IIC_SCL;
__RW __u8 P11_FI_IIC_SDA;
} P11_IMAP_TypeDef;
#define P11_IMAP_BASE (p11_sfr_base + map_adr(0x17, 0x00))
#define P11_IMAP ((P11_IMAP_TypeDef *)P11_IMAP_BASE)
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p11_io_omap.h
+35
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@@ -0,0 +1,35 @@
//===============================================================================//
//
// output function define
//
//===============================================================================//
#define P11_FO_GP_OCH0 ((0 << 2)|BIT(1))
#define P11_FO_GP_OCH1 ((1 << 2)|BIT(1))
#define P11_FO_GP_OCH2 ((2 << 2)|BIT(1))
#define P11_FO_UART0_TX ((3 << 2)|BIT(1)|BIT(0))
#define P11_FO_UART1_TX ((4 << 2)|BIT(1)|BIT(0))
#define P11_FO_SPI_CLK ((5 << 2)|BIT(1)|BIT(0))
#define P11_FO_SPI_DO ((6 << 2)|BIT(1)|BIT(0))
#define P11_FO_IIC_SCL ((7 << 2)|BIT(1)|BIT(0))
#define P11_FO_IIC_SDA ((8 << 2)|BIT(1)|BIT(0))
//===============================================================================//
//
// IO output select sfr
//
//===============================================================================//
typedef struct {
__RW __u8 P11_PB0_OUT;
__RW __u8 P11_PB1_OUT;
__RW __u8 P11_PB2_OUT;
__RW __u8 P11_PB3_OUT;
__RW __u8 P11_PB4_OUT;
__RW __u8 P11_PB5_OUT;
__RW __u8 P11_PB6_OUT;
__RW __u8 P11_PB7_OUT;
__RW __u8 P11_PB8_OUT;
} P11_OMAP_TypeDef;
#define P11_OMAP_BASE (p11_sfr_base + map_adr(0x16, 0x00))
#define P11_OMAP ((P11_OMAP_TypeDef *)P11_OMAP_BASE)
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p11_mmap.h
+39
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#ifndef __P11_MMAP_H__
#define __P11_MMAP_H__
/////////////////////////////////////////////////////////////////////////////////
#ifdef PMU_SYSTEM
#define P11_RAM_BASE 0
#else
#define P11_RAM_BASE 0xF20000
#endif
#define P11_RAM_BEGIN (P11_RAM_BASE)
#define P11_RAM_SIZE (0x8000)
#define P11_RAM_END (P11_RAM_BASE+P11_RAM_SIZE)
/////////////////////////////////////////////////////////////////////////////////
#define MSYS_POFF_RAM_END P11_RAM_END
#define MSYS_POFF_RAM_SIZE 0x20
#define MSYS_POFF_RAM_BEGIN (MSYS_POFF_RAM_END - MSYS_POFF_RAM_SIZE)
/////////////////////////////////////////////////////////////////////////////////
#define M2P_MESSAGE_END MSYS_POFF_RAM_BEGIN
#define M2P_MESSAGE_SIZE 0xe0
#define M2P_MESSAGE_RAM_BEGIN (M2P_MESSAGE_END - M2P_MESSAGE_SIZE)
/////////////////////////////////////////////////////////////////////////////////
#define P2M_MESSAGE_END M2P_MESSAGE_RAM_BEGIN
#define P2M_MESSAGE_SIZE 0x40
#define P2M_MESSAGE_RAM_BEGIN (P2M_MESSAGE_END - P2M_MESSAGE_SIZE)
//////////////////////////////////////////////////////////////////////////////
#define P11_RAM0_END P2M_MESSAGE_RAM_BEGIN
#define P11_RAM0_BEGIN (P11_RAM_BASE+P11_ISR_SIZE)
#define P11_RAM0_SIZE (P11_RAM0_END - P11_RAM0_BEGIN)
//////////////////////////////////////////////////////////////////////////////
#define P11_ISR_END P11_RAM0_BEGIN
#define P11_ISR_SIZE 0x80
#define P11_ISR_BEGIN P11_RAM_BASE
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p11_sfr.h
+331
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#ifndef __P11_SFR_H__
#define __P11_SFR_H__
//===============================================================================//
//
// sfr define
//
//===============================================================================//
#ifdef PMU_SYSTEM
#define p11_base 0x000000
#define p11_ram_base p11_base
#define p11_sfr_base 0x00a000
#else
#define p11_base 0xf20000
#define p11_ram_base p11_base
#define p11_sfr_base 0xf2a000
#endif
#define __RW volatile // read write
#define __RO volatile const // only read
#define __WO volatile // only write
#define __u8 unsigned int // u8 to u32 special for struct
#define __u16 unsigned int // u16 to u32 special for struct
#define __u32 unsigned int
#define __s8(x) char(x); char(reserved_1_##x); char(reserved_2_##x); char(reserved_3_##x)
#define __s16(x) short(x); short(reserved_1_##x)
#define __s32(x) int(x)
#define map_adr(grp, adr) ((64 * grp + adr) * 4) // grp(0x0-0xff), adr(0x0-0x3f)
#define P11_ACCESS(x) (*(volatile u32 *)(p11_base + x))
#define P11_RAM(x) (*(volatile u32 *)(p11_ram_base + x))
//===============================================================================//
//
// sfr address define
//
//===============================================================================//
//............. 0x0000 - 0x03ff............ for cpu
// #include ../core/csfr.h
//............. 0x0400 - 0x04ff............ for clock
typedef struct {
__RW __u32 PWR_CON;
__RW __u32 RST_SRC;
__RW __u32 WKUP_EN;
__RW __u32 WKUP_SRC;
__RW __u32 SYS_DIV;
__RW __u32 CLK_CON0;
__RW __u32 CLK_CON1;
__RW __u32 CLK_CON2;
__RW __u32 XOSC_CFG0;
__RW __u32 XOSC_CFG1;
__RW __u32 LRC24M_CFG0;
__RW __u32 CLKCFG_CFG0;
} P11_CLOCK_TypeDef;
#define P11_CLOCK_BASE (p11_sfr_base + map_adr(0x04, 0x00))
#define P11_CLOCK ((P11_CLOCK_TypeDef *)P11_CLOCK_BASE)
#define P11_PWR_CON P11_CLOCK->PWR_CON
#define P11_CLK_CON0 P11_CLOCK->CLK_CON0
//............. 0x0600 - 0x06ff............ for system
typedef struct {
__RW __u32 P2M_INT_IE;
__RW __u32 P2M_INT_SET;
__RW __u32 P2M_INT_CLR;
__RO __u32 P2M_INT_PND;
__RW __u32 P2M_CLK_CON0;
__RW __u32 M2P_INT_IE;
__RW __u32 M2P_INT_SET;
__RW __u32 M2P_INT_CLR;
__RO __u32 M2P_INT_PND;
__RW __u32 P11_SYS_CON0;
__RW __u32 P11_SYS_CON1;
__RW __u32 PMU_KEY;
} P11_SYSTEM_TypeDef;
#define P11_SYSTEM_BASE (p11_sfr_base + map_adr(0x06, 0x00))
#define P11_SYSTEM ((P11_SYSTEM_TypeDef *)P11_SYSTEM_BASE)
//............. 0x0700 - 0x07ff............ for mbist
typedef struct {
__RW __u32 CON;
__RW __u32 SEL;
__RW __u32 BEG;
__RW __u32 END;
__RW __u32 DAT_VLD0;
__RW __u32 DAT_VLD1;
__RW __u32 DAT_VLD2;
__RW __u32 DAT_VLD3;
__RO __u32 ROM_CRC;
__RW __u32 MCFG0_RF1P;
__RW __u32 MCFG0_RF2P;
__RW __u32 MCFG0_RM1P;
__RW __u32 MCFG0_RM2P;
__RW __u32 MCFG0_VROM;
__RW __u32 MCFG0_CON[3];
} P11_MBIST_TypeDef;
#define P11_MBIST_BASE (p11_sfr_base + map_adr(0x07, 0x00))
#define P11_MBIST ((P11_MBIST_TypeDef *)P11_MBIST_BASE)
//............. 0x0800 - 0x08ff............ for watch dog
typedef struct {
__RW __u32 CON;
__RW __u32 KEY;
__RW __u32 DUMMY;
} P11_WDT_TypeDef;
#define P11_WDT_BASE (p11_sfr_base + map_adr(0x08, 0x00))
#define P11_WDT ((P11_WDT_TypeDef *)P11_WDT_BASE)
#define P11_SIM_END P11_WDT->DUMMY
//............. 0x0900 - 0x0cff............ for lp timer
typedef struct {
__RW __u32 CON0;
__RW __u32 CON1;
__RW __u32 CON2;
__RW __u32 PRD;
__RW __u32 RSC;
__RO __u32 CNT;
} P11_LPTMR_TypeDef;
#define P11_LPTMR0_BASE (p11_sfr_base + map_adr(0x09, 0x00))
#define P11_LPTMR1_BASE (p11_sfr_base + map_adr(0x0a, 0x00))
#define P11_LPTMR2_BASE (p11_sfr_base + map_adr(0x0b, 0x00))
#define P11_LPTMR3_BASE (p11_sfr_base + map_adr(0x0c, 0x00))
#define P11_LPTMR0 ((P11_LPTMR_TypeDef *)P11_LPTMR0_BASE)
#define P11_LPTMR1 ((P11_LPTMR_TypeDef *)P11_LPTMR1_BASE)
#define P11_LPTMR2 ((P11_LPTMR_TypeDef *)P11_LPTMR2_BASE)
#define P11_LPTMR3 ((P11_LPTMR_TypeDef *)P11_LPTMR3_BASE)
//............. 0x0d00 - 0x0dff............ for irflt
typedef struct {
__RW __u32 CON;
} P11_IRFLT_TypeDef;
#define P11_IRFLT_BASE (p11_sfr_base + map_adr(0x0d, 0x00))
#define P11_IRFLT ((P11_IRFLT_TypeDef *)P11_IRFLT_BASE)
//............. 0x0e00 - 0x0eff............ for spi
typedef struct {
__RW __u32 CON;
__RW __u32 BAUD;
__RW __u32 BUF;
__WO __u32 ADR;
__RW __u32 CNT;
__RW __u32 CON1;
} P11_SPI_TypeDef;
#define P11_SPI_BASE (p11_sfr_base + map_adr(0x0e, 0x00))
#define P11_SPI ((P11_SPI_TypeDef *)P11_SPI_BASE)
//............. 0x0f00 - 0x10ff............ for uart
typedef struct {
__RW __u16 CON0;
__RW __u16 CON1;
__RW __u16 CON2;
__RW __u16 BAUD;
__RW __u8 BUF;
__RW __u32 OTCNT;
//__RW __u32 TXADR;
//__WO __u16 TXCNT;
//__RW __u32 RXSADR;
//__RW __u32 RXEADR;
//__RW __u32 RXCNT;
//__RO __u16 HRXCNT;
//__RO __u16 RX_ERR_CNT;
} P11_UART_TypeDef;
#define P11_UART0_BASE (p11_sfr_base + map_adr(0x0f, 0x00))
#define P11_UART1_BASE (p11_sfr_base + map_adr(0x10, 0x00))
#define P11_UART0 ((P11_UART_TypeDef *)P11_UART0_BASE)
#define P11_UART1 ((P11_UART_TypeDef *)P11_UART1_BASE)
//............. 0x1100 - 0x11ff............ for iic
typedef struct {
__RW __u32 CON ;
__RW __u32 PND ;
__RW __u32 TX_BUF ;
__RW __u32 TASK ;
__RO __u32 RX_BUF ;
__RW __u32 ADDR ;
__RW __u32 BAUD ;
__RW __u32 TSU ;
__RW __u32 THD ;
__RO __u32 DBG ;
} P11_IIC_TypeDef;
#define P11_IIC_BASE (p11_sfr_base + map_adr(0x11, 0x00))
#define P11_IIC ((P11_IIC_TypeDef *)P11_IIC_BASE)
//............. 0x1200 - 0x12ff............ for port
typedef struct {
__RW __u32 OCH_CON0 ;
__RW __u32 ICH_CON0 ;
__RW __u32 P33_PORT ;
__RW __u32 PB_SEL ;
__RO __u32 PB_IN ;
__RW __u32 PB_OUT ;
__RW __u32 PB_DIR ;
__RW __u32 PB_DIE ;
__RW __u32 PB_DIEH ;
__RW __u32 PB_PU0 ;
__RW __u32 PB_PU1 ;
__RW __u32 PB_PD0 ;
__RW __u32 PB_PD1 ;
__RW __u32 PB_HD0 ;
__RW __u32 PB_HD1 ;
__RW __u32 PB_SPL ;
} P11_PORT_TypeDef;
#define P11_PORT_BASE (p11_sfr_base + map_adr(0x12, 0x00))
#define P11_PORT ((P11_PORT_TypeDef *)P11_PORT_BASE)
//............. 0x1300 - 0x14ff............ for lp ctmu
typedef struct {
__RW __u32 CON0 ;
__RW __u32 CHEN ;
__RW __u32 CNUM ;
__RW __u32 PPRD ;
__RW __u32 DPRD ;
__RW __u32 ECON ;
__RW __u32 EXEN ;
__RW __u32 CHIS ;
__RW __u32 CLKC ;
__WO __u32 WCON ;
__RW __u32 ANA0 ;
__RW __u32 ANA1 ;
__RO __u32 RES ;
__RW __u32 DMA_START_ADR;
__RW __u32 DMA_HALF_ADR;
__RW __u32 DMA_END_ADR;
__RW __u32 DMA_CON;
__RW __u32 MSG_CON;
__RO __u32 DMA_WADR;
__RW __u32 SLEEP_CON;
} P11_LPCTM_TypeDef;
#define P11_LPCTM0_BASE (p11_sfr_base + map_adr(0x13, 0x00))
#define P11_LPCTM0 ((P11_LPCTM_TypeDef *)P11_LPCTM0_BASE)
// #define P11_LPCTM1_BASE (p11_sfr_base + map_adr(0x14, 0x00))
// #define P11_LPCTM1 ((P11_LPCTM_TypeDef *)P11_LPCTM1_BASE)
//............. 0x1500 - 0x15ff............ for lpvad
typedef struct {
__RW __u32 VAD_CON;
__RW __u32 VAD_ACON0;
__RW __u32 VAD_ACON1;
__RW __u32 AVAD_CON;
__RW __u32 AVAD_DATA;
__RW __u32 DVAD_CON0;
__RW __u32 DVAD_CON1;
__RW __u32 DMA_BADR;
__RW __u32 DMA_LEN;
__RW __u32 DMA_HPTR;
__RW __u32 DMA_SPTR;
__RW __u32 DMA_SPN;
__RW __u32 DMA_SHN;
} P11_LPVAD_TypeDef;
#define P11_LPVAD_BASE (p11_sfr_base + map_adr(0x15, 0x00))
#define P11_LPVAD ((P11_LPVAD_TypeDef *)P11_LPVAD_BASE)
//............. 0x1600 - 0x17ff............ for crossbar
#include "p11_io_omap.h"
#include "p11_io_imap.h"
//............. 0x1800 - 0x19ff............ for gp timer
typedef struct {
__RW __u32 CON;
__RW __u32 CNT;
__RW __u32 PRD;
__RW __u32 PWM;
__RW __u32 IRFLT;
} P11_GPTMR_TypeDef;
#define P11_GPTMR0_BASE (p11_sfr_base + map_adr(0x18, 0x00))
#define P11_GPTMR1_BASE (p11_sfr_base + map_adr(0x18, 0x05))
#define P11_GPTMR0 ((P11_GPTMR_TypeDef *)P11_GPTMR0_BASE)
#define P11_GPTMR1 ((P11_GPTMR_TypeDef *)P11_GPTMR1_BASE)
//............. 0x1a00 - 0x1aff............ for NFC
typedef struct {
__RW __u32 CON0;
__RW __u32 CON1;
__RW __u32 CON2;
__RW __u32 CON3;
__RW __u32 BUF0;
__RW __u32 BUF1;
__RW __u32 BUF2;
__RW __u32 BUF3;
} P11_NFC_TypeDef;
#define P11_NFC_BASE (p11_sfr_base + map_adr(0x1a, 0x00))
#define P11_NFC ((P11_NFC_TypeDef *)P11_NFC_BASE)
//............. 0x1b00 - 0x1bff............ for RESLOCK
typedef struct {
__RW __u32 LOCK[16];
} P11_RESLOCK_TypeDef;
#define P11_RESLOCK_BASE (p11_sfr_base + map_adr(0x1b,0x00))
#define P11_RESLOCK ((P11_RESLOCK_TypeDef *)P11_RESLOCK_BASE)
//............. 0x1c00 - 0x1cff............ for lp_gpcnt0
typedef struct {
__RW __u32 CON;
__RO __u32 NUM;
} P11_GPCNT_TypeDef;
#define P11_GPCNT0_BASE (p11_sfr_base + map_adr(0x1c, 0x00))
#define P11_GPCNT0 ((P11_GPCNT_TypeDef *)P11_GPCNT0_BASE)
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p11/p2m_msg.h
+25
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@@ -0,0 +1,25 @@
#ifndef __P2M_MSG_H__
#define __P2M_MSG_H__
#define REGISTER_P2M_MSG_HANDLER(pri, _type, fn) \
const struct lp_msg_handler _##fn SEC_USED(.p2m_msg_handler)= { \
.handler = fn, \
.priv = pri,\
.type = _type, \
}
extern struct lp_msg_handler p2m_msg_handler_begin[];
extern struct lp_msg_handler p2m_msg_handler_end[];
#define list_for_each_p2m_msg_handler(p) \
for (p = p2m_msg_handler_begin; p < p2m_msg_handler_end; p++)
int p2m_get_msg(struct lp_msg_head *head, void *msg, u32 len);
int p2m_post_msg(u32 type, u32 ack, const void *msg, u32 len);
int p2m_msg_hdl();
u32 set_p2m_ack_flag(u32 index);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p33/charge_hw.h
+74
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@@ -0,0 +1,74 @@
#ifndef __CHARGE_HW_H__
#define __CHARGE_HW_H__
/************************P3_ANA_MFIX*****************************/
#define PMU_MFIXI_SET_1(en) p33_fast_access(P3_ANA_MFIX, BIT(1), en)
/************************P3_CHG_CON0*****************************/
#define CHARGE_EN(en) p33_fast_access(P3_CHG_CON0, BIT(0), en)
#define CHGGO_EN(en) p33_fast_access(P3_CHG_CON0, BIT(1), en)
#define IS_CHARGE_EN() ((P33_CON_GET(P3_CHG_CON0) & BIT(0)) ? 1: 0 )
#define CHG_HV_MODE(mode) p33_fast_access(P3_CHG_CON0, BIT(2), mode)
#define CHG_TRICKLE_EN(en) p33_fast_access(P3_CHG_CON0, BIT(3), en)
#define CHG_CCLOOP_EN(en) p33_fast_access(P3_CHG_CON0, BIT(4), en)
#define CHG_VILOOP_EN(en) p33_fast_access(P3_CHG_CON0, BIT(5), en)
#define CHG_VILOOP2_EN(en) p33_fast_access(P3_CHG_CON0, BIT(6), en)
#define CHG_VINLOOP_SLT(sel) p33_fast_access(P3_CHG_CON0, BIT(7), sel)
/************************P3_CHG_CON1*****************************/
#define CHARGE_mA_SEL(a) P33_CON_SET(P3_CHG_CON1, 0, 4, a)
/************************P3_CHG_CON2*****************************/
#define CHARGE_FULL_V_SEL(a) P33_CON_SET(P3_CHG_CON2, 4, 4, a)
/************************P3_CHG_CON3*****************************/
#define CHARGE_FOLLOWC_SLT(en) p33_fast_access(P3_CHG_CON3, BIT(3), en)
enum {
CHARGE_DET_VOL_365V,
CHARGE_DET_VOL_375V,
CHARGE_DET_VOL_385V,
CHARGE_DET_VOL_395V,
};
#define CHARGE_DET_VOL(a) P33_CON_SET(P3_CHG_CON3, 1, 2, a)
#define CHARGE_DET_EN(en) p33_fast_access(P3_CHG_CON3, BIT(0), en)
/************************P3_CHG_CON4*****************************/
#define CHGI_TRIM_SEL(a) P33_CON_SET(P3_CHG_CON4, 0, 4, a)
/************************P3_VPWR_CON0*****************************/
#define L5V_IO_MODE(a) p33_fast_access(P3_VPWR_CON0, BIT(2), a)
#define IS_L5V_LOAD_EN() ((P33_CON_GET(P3_VPWR_CON0) & BIT(0)) ? 1: 0)
#define L5V_LOAD_EN(a) p33_fast_access(P3_VPWR_CON0, BIT(0), a)
/************************P3_VPWR_CON1*****************************/
#define L5V_RES_DET_S_SEL(a) P33_CON_SET(P3_VPWR_CON1, 0, 2, a)
#define GET_L5V_RES_DET_S_SEL() (P33_CON_GET(P3_VPWR_CON1) & 0x03)
/************************P3_AWKUP_LEVEL*****************************/
#define VBAT_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(2)) ? 1: 0)
#define LVCMP_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(1)) ? 1: 0)
#define LDO5V_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(0)) ? 1: 0)
/************************P3_ANA_READ*****************************/
#define VBAT_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(0)) ? 1: 0 )
#define LVCMP_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(1)) ? 1: 0 )
#define LDO5V_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(2)) ? 1: 0 )
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p33/p33_access.h
+70
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@@ -0,0 +1,70 @@
#ifndef __P33_ACCESS_H__
#define __P33_ACCESS_H__
//
//
// for p33 access
//
//
//
/**************************************************************/
//ROM
u8 p33_buf(u8 buf);
#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0); asm volatile ("csync")
//#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0)
// #define p33_xor_1byte(addr, data0) addr ^= (data0)
#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0); asm volatile ("csync")
//#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0)
// #define p33_or_1byte(addr, data0) addr |= (data0)
#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0)); asm volatile ("csync")
//#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0))
//#define p33_and_1byte(addr, data0) addr &= (data0)
// void p33_tx_1byte(u16 addr, u8 data0);
#define p33_tx_1byte(addr, data0) addr = data0
// u8 p33_rx_1byte(u16 addr);
#define p33_rx_1byte(addr) addr
#define P33_CON_SET(sfr, start, len, data) (sfr = (sfr & ~((~(0xff << (len))) << (start))) | \
(((data) & (~(0xff << (len)))) << (start)))
#define P33_CON_GET(sfr) (sfr)
#if 1
#define p33_fast_access(reg, data, en) \
{ \
if (en) { \
p33_or_1byte(reg, (data)); \
} else { \
p33_and_1byte(reg, (u8)~(data)); \
} \
}
#else
#define p33_fast_access(reg, data, en) \
{ \
if (en) { \
reg |= (data); \
} else { \
reg &= ~(data); \
} \
}
#endif
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p33/p33_api.h
+248
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@@ -0,0 +1,248 @@
#ifndef __P33_API_H__
#define __P33_API_H__
//
//
// vol
//
//
//
/****************************************************************/
enum DVDD_VOL {
DVDD_VOL_0840MV = 0,
DVDD_VOL_0870MV,
DVDD_VOL_0900MV,
DVDD_VOL_0930MV,
DVDD_VOL_0960MV,
DVDD_VOL_0990MV,
DVDD_VOL_1020MV,
DVDD_VOL_1050MV,
DVDD_VOL_1080MV,
DVDD_VOL_1110MV,
DVDD_VOL_1140MV,
DVDD_VOL_1170MV,
DVDD_VOL_1200MV,
DVDD_VOL_1230MV,
DVDD_VOL_1260MV,
DVDD_VOL_1290MV,
};
/*enum DVDD2_VOL {*/
/*};*/
/*enum RVDD_VOL {*/
/*};*/
/*enum RVDD2_VOL {*/
/*};*/
/*enum BTVDD_VOL {*/
/*};*/
enum DCVDD_VOL {
DCVDD_VOL_1000MV = 0,
DCVDD_VOL_1050MV,
DCVDD_VOL_1100MV,
DCVDD_VOL_1150MV,
DCVDD_VOL_1200MV,
DCVDD_VOL_1250MV,
DCVDD_VOL_1300MV,
DCVDD_VOL_1350MV,
DCVDD_VOL_1400MV,
DCVDD_VOL_1450MV,
DCVDD_VOL_1500MV,
DCVDD_VOL_1550MV,
DCVDD_VOL_1600MV,
};
enum VDDIOM_VOL {
VDDIOM_VOL_21V = 0,
VDDIOM_VOL_22V,
VDDIOM_VOL_23V,
VDDIOM_VOL_24V,
VDDIOM_VOL_25V,
VDDIOM_VOL_26V,
VDDIOM_VOL_27V,
VDDIOM_VOL_28V,
VDDIOM_VOL_29V,
VDDIOM_VOL_30V,
VDDIOM_VOL_31V,
VDDIOM_VOL_32V,
VDDIOM_VOL_33V,
VDDIOM_VOL_34V,
VDDIOM_VOL_35V,
VDDIOM_VOL_36V,
};
enum VDDIOW_VOL {
VDDIOW_VOL_21V = 0,
VDDIOW_VOL_22V,
VDDIOW_VOL_23V,
VDDIOW_VOL_24V,
VDDIOW_VOL_25V,
VDDIOW_VOL_26V,
VDDIOW_VOL_27V,
VDDIOW_VOL_28V,
VDDIOW_VOL_29V,
VDDIOW_VOL_30V,
VDDIOW_VOL_31V,
VDDIOW_VOL_32V,
VDDIOW_VOL_33V,
VDDIOW_VOL_34V,
VDDIOW_VOL_35V,
VDDIOW_VOL_36V,
};
enum WVDD_VOL {
WVDD_VOL_0500MV = 0,
WVDD_VOL_0550MV,
WVDD_VOL_0600MV,
WVDD_VOL_0650MV,
WVDD_VOL_0700MV,
WVDD_VOL_0750MV,
WVDD_VOL_0800MV,
WVDD_VOL_0850MV,
WVDD_VOL_0900MV,
WVDD_VOL_0950MV,
WVDD_VOL_1000MV,
WVDD_VOL_1050MV,
WVDD_VOL_1100MV,
WVDD_VOL_1150MV,
WVDD_VOL_1200MV,
WVDD_VOL_1250MV,
};
enum PVDD_VOL {
PVDD_VOL_0500MV = 0,
PVDD_VOL_0550MV,
PVDD_VOL_0600MV,
PVDD_VOL_0650MV,
PVDD_VOL_0700MV,
PVDD_VOL_0750MV,
PVDD_VOL_0800MV,
PVDD_VOL_0850MV,
PVDD_VOL_0900MV,
PVDD_VOL_0950MV,
PVDD_VOL_1000MV,
PVDD_VOL_1050MV,
PVDD_VOL_1100MV,
PVDD_VOL_1150MV,
PVDD_VOL_1200MV,
PVDD_VOL_1250MV,
};
void dvdd_vol_sel(enum DVDD_VOL vol);
enum DVDD_VOL get_dvdd_vol_sel();
/*void dvdd2_vol_sel(enum DVDD2_VOL vol);*/
/*enum DVDD2_VOL get_dvdd2_vol_sel();*/
/*void rvdd_vol_sel(enum RVDD_VOL vol);*/
/*enum RVDD_VOL get_rvdd_vol_sel();*/
/*void rvdd2_vol_sel(enum RVDD2_VOL vol);*/
/*enum RVDD2_VOL get_rvdd2_vol_sel();*/
void dcvdd_vol_sel(enum DCVDD_VOL vol);
enum DCVDD_VOL get_dcvdd_vol_sel();
/*void btvdd_vol_sel(enum BTVDD_VOL vol);*/
/*enum BTVDD_VOL get_btvdd_vol_sel();*/
void pvdd_config(u32 lev, u32 low_lev, u32 output);
void pvdd_output(u32 output);
void vddiom_vol_sel(enum VDDIOM_VOL vol);
enum VDDIOM_VOL get_vddiom_vol_sel();
void vddiow_vol_sel(enum VDDIOW_VOL vol);
enum VDDIOW_VOL get_vddiow_vol_sel();
//
//
// lvd
//
//
//
/****************************************************************/
typedef enum {
LVD_RESET_MODE, //复位模式
LVD_EXCEPTION_MODE, //异常模式，进入异常中断
LVD_WAKEUP_MODE, //唤醒模式，进入唤醒中断，callback参数为回调函数
} LVD_MODE;
typedef enum {
VLVD_SEL_166V = 0,
VLVD_SEL_177V,
VLVD_SEL_188V,
VLVD_SEL_199V,
VLVD_SEL_210V,
VLVD_SEL_221V,
VLVD_SEL_232V,
VLVD_SEL_243V,
VLVD_SEL_254V,
VLVD_SEL_265V,
VLVD_SEL_276V,
VLVD_SEL_287V,
VLVD_SEL_298V,
VLVD_SEL_309V,
VLVD_SEL_320V,
VLVD_SEL_331V,
} LVD_VOL;
void lvd_en(u8 en);
void lvd_config(LVD_VOL vol, u8 expin_en, LVD_MODE mode, void (*callback));
//
//
// pinr
//
//
//
//******************************************************************
void gpio_longpress_pin0_reset_config(u32 pin, u32 level, u32 time, u32 release, u32 pull_enable);
void gpio_longpress_pin1_reset_config(u32 pin, u32 level, u32 time, u32 release);
//
//
// dcdc
//
//
//
//******************************************************************
enum POWER_MODE {
//LDO模式
PWR_LDO15,
//DCDC模式
PWR_DCDC15,
};
enum POWER_DCDC_TYPE {
PWR_DCDC12 = 2,
PWR_DCDC18_DCDC12 = 6,
PWR_DCDC18_DCDC12_DCDC09 = 7,
};
enum {
DCDC09 = 1,
DCDC12 = 2,
DCDC18 = 4,
};
void power_set_dcdc_type(enum POWER_DCDC_TYPE type);
void power_set_mode(enum POWER_MODE mode);
enum DVD_SHORT_DCV_MODE {
DVDD_SHORT_DCVDDDIS = 0,
DVDD_SHORT_DCVDD_EN,
};
void dcvdd_level_cfg(u8 dcvdd_level_set);
void dvdd_short_dcvdd(enum DVD_SHORT_DCV_MODE short_mode, u8 dcvdd_level_set);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p33/p33_hw.h
+157
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/**@file p33_app.h
* @brief hw sfr layer
* @details
* @author app / ic
* @date 2021-10-13
* @version V1.0
* @copyright Copyright(c)2010-2031 JIELI
*/
#ifndef __P33_HW_H__
#define __P33_HW_H__
//
//
// for p33_analog
//
//
//
/************************P3_PSW_CON0*****************************/
#define DVD2SVD_SHORT_EN(en) p33_fast_access(P3_PSW_CON0, BIT(6), en)
//#define SVD2RVD2_SHORT_EN(en) p33_fast_access(P3_PSW_CON0, BIT(5), en)
//
//#define SVD2RVD_SHORT_EN(en) p33_fast_access(P3_PSW_CON0, BIT(4), en)
//#define RVDD2_CAP_EN(en) p33_fast_access(P3_PSW_CON0, BIT(3), en)
//#define RVD2_EN(en) p33_fast_access(P3_PSW_CON0, BIT(2), en)
//
//#define RVDD_CAP_EN(en) p33_fast_access(P3_PSW_CON0, BIT(1), en)
//
//#define RVD_EN(en) p33_fast_access(P3_PSW_CON0, BIT(0), en)
#define NVD2IO_SHORT_EN(en) p33_fast_access(P3_PSW_CON1, BIT(7), en)
//#define DVDD2_IFULL_EN(en) p33_fast_access(P3_PSW_CON1, BIT(6), en)
//#define DVDD2_BYPASS_EN(en) p33_fast_access(P3_PSW_CON1, BIT(5), en)
//#define DVDD2_EN(en) p33_fast_access(P3_PSW_CON1, BIT(4), en)
//
//#define RVDD2_BYPASS_EN(en) p33_fast_access(P3_PSW_CON1, BIT(3), en)
//
//#define RVDD_BYPASS_EN(en) p33_fast_access(P3_PSW_CON1, BIT(2), en)
#define WVD2SVD_SHORT_EN(en) p33_fast_access(P3_PSW_CON1, BIT(1), en)
#define WVDD_EN(en) p33_fast_access(P3_PSW_CON1, BIT(0), en)
#define WVDD_PDOWN_ENTER() P33_CON_SET(P3_PSW_CON1, 0, 2, 0x03); P33_CON_SET(P3_PSW_CON0, 4, 3, 0x7)
#define WVDD_POFF_ENTER() P33_CON_SET(P3_PSW_CON1, 0, 2, 0x03); P33_CON_SET(P3_PSW_CON0, 4, 3, 0x1)
#define WVDD_PDOWN_POFF_EXIT() P33_CON_SET(P3_PSW_CON0, 4, 3, 0x07); P33_CON_SET(P3_PSW_CON1, 1, 1, 0x00)
/************************P3_PSW_CON2*****************************/
//SS: soft start of VPQS
//#define VQPS_SS_EN(en) p33_fast_access(P3_PSW_CON2, BIT(1), en)
//
//#define VQPS_EN(en) p33_fast_access(P3_PSW_CON2, BIT(0), en)
/************************P3_ANA_CON*****************************/
//#define EVDD_IFULL_EN(en) p33_fast_access(P3_ANA_CON, BIT(0), en)
//DS: decrease undershoot and overshoot
//#define DVD_DS_EN(en) p33_fast_access(P3_ANA_CON, BIT(1), en)
//#define RVD_DS_EN(en) p33_fast_access(P3_ANA_CON, BIT(2), en)
/************************P3_VBG_CON0*****************************/
#define MVBG_SEL(sel) P33_CON_SET(P3_VBG_CON0, 0, 4, sel)
#define WVBG_SEL(sel) P33_CON_SET(P3_VBG_CON1, 4, 4, sel)
/************************P3_CLK_CON0*****************************/
#define LRC24M_GATE_EN(a) p33_fast_access(P3_CLK_CON0, BIT(6), a)
#define WDT_CLK_SEL(sel) P33_CON_SET(P3_CLK_CON0, 5, 1, sel)
#define SOFF_RC250K_GATE(en) p33_fast_access(P3_CLK_CON0, BIT(4), en)
#define D2SH_EN(a) p33_fast_access(P3_CLK_CON0, BIT(3), a)
#define RCLK_SEL(sel) P33_CON_SET(P3_CLK_CON0, 2, 1, sel)
#define RC_200K_SW_EN(a) p33_fast_access(P3_CLK_CON0, BIT(1), a)
#define RC_250K_SW_EN(a) p33_fast_access(P3_CLK_CON0, BIT(0), a)
/************************P3_VLD_KEEP*****************************/
#define RTC_WKUP_KEEP(a) p33_fast_access(P3_VLD_KEEP, BIT(1), a)
#define P33_WKUP_P11_EN(a) p33_fast_access(P3_VLD_KEEP, BIT(2), a)
#define VLD_KEEP_WDT_EXPT(en) p33_fast_access(P3_VLD_KEEP, BIT(6), en)
//
//
// for pmu flow
//
//
//
/************************P3_P11_CPU*****************************/
#define P11_CPU_BRANCH_POWEROFF(en) p33_fast_access(P3_P11_CPU, BIT(1), en)
#define P11_CPU_RELEASE(en) p33_fast_access(P3_P11_CPU, BIT(0), en)
/************************P3_LP_CTL*****************************/
//控制p11的低功耗
#define LP_FLOW_EN(en) p33_fast_access(P3_LP_CTL, BIT(0), en)
#define LP_FLOW_CPND() p33_fast_access(P3_LP_CTL, BIT(6), 1)
#define POWER_ON_END() ((P33_CON_GET(P3_LP_CTL) & BIT(5)) ? 1: 0 )
/************************P3_ANA_FLOW0*****************************/
#define DVD_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(0), en)
#define DCVD_TO_DIG_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(0)|BIT(1), en)
#define DCVD_LDO_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(2), en)
#define PAVD_LDO_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(3), en)
#define GET_DCDC12_STA() ((P33_CON_GET(P3_BUCK2_CON1) & (BIT(0))) ? 1:0)
#define GET_LDO12_STA() ((P33_CON_GET(P3_ANA_FLOW0) & (BIT(2))) ? 1:0)
#define GET_DCVD_STA() (GET_DCDC12_STA()|GET_LDO12_STA())
#define GET_PAVD_LDO_EN() ((P33_CON_GET(P3_ANA_FLOW0) & BIT(3)) ? 1:0)
#define PVDD_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(4), en)
#define MVIO_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(5), en)
#define VIN_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(6), en)
#define PW_GATE_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(5)|BIT(6), en)
#define MBG_EN(en) p33_fast_access(P3_ANA_FLOW0, BIT(7), en)
#define MVIO_PVDD_MVBG_ONLY() p33_tx_1byte(P3_ANA_FLOW0, BIT(4) | BIT(5) | BIT(6) | BIT(7))
#define PVDD_MVBG_ONLY() p33_tx_1byte(P3_ANA_FLOW0, BIT(4) | BIT(7))
#define PVDD_ONLY() p33_tx_1byte(P3_ANA_FLOW0, BIT(4))
/************************P3_ANA_FLOW1*****************************/
#define WVIO_SHORT_EN(en) p33_fast_access(P3_ANA_FLOW1, BIT(5), en)
#define MIOV_VLMT_EN(en) p33_fast_access(P3_ANA_FLOW1, BIT(4), en)
#define MIOV_IFULL_EN(en) p33_fast_access(P3_ANA_FLOW1, BIT(3), en)
#define PAVD_IFULL_EN(en) p33_fast_access(P3_ANA_FLOW1, BIT(2), en)
#define DCVD_IFULL_EN(en) p33_fast_access(P3_ANA_FLOW1, BIT(1), en)
#define DVD_IFULL_EN(en) p33_fast_access(P3_ANA_FLOW1, BIT(0), en)
/************************P3_ANA_FLOW2*****************************/
#define NVD2PVD_WSHORT_EN(en) p33_fast_access(P3_ANA_FLOW2, BIT(1), en)
#define NVD2PVD_SHORT_EN(en) p33_fast_access(P3_ANA_FLOW2, BIT(0), en)
/************************P3_NVRAM_PWR*****************************/
#define NVRAM_PWR_MODE(sel) P33_CON_SET(P3_NVRAM_PWR, 4, 2, sel)
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/p33/p33_sfr.h
+336
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#ifndef __P33_SFR_H__
#define __P33_SFR_H__
#ifdef PMU_SYSTEM
#define P33_ACCESS(x) (*(volatile u32 *)(0xc000 + x*4))
#else
#define P33_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xc000 + x*4))
#endif
#ifdef PMU_SYSTEM
#define RTC_ACCESS(x) (*(volatile u32 *)(0xd000 + x*4))
#else
#define RTC_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xd000 + x*4))
#endif
//===========
//===============================================================================//
//
//
//
//===============================================================================//
//............. 0x0000 - 0x000f............
#define P3_VLMT_CON P33_ACCESS(0x01)
#define P3_POR_CON P33_ACCESS(0x02)
#define P3_VLVD_CON0 P33_ACCESS(0x03)
#define P3_VLVD_CON1 P33_ACCESS(0x04)
#define P3_VLVD_FLT P33_ACCESS(0x05)
#define P3_WDT_CON P33_ACCESS(0x06)
#define P3_OCP_CON0 P33_ACCESS(0x07)
#define P3_ANA_FLOW0 P33_ACCESS(0x08)
#define P3_ANA_FLOW1 P33_ACCESS(0x09)
#define P3_ANA_FLOW2 P33_ACCESS(0x0a)
#define P3_ANA_KEEP0 P33_ACCESS(0x0c)
#define P3_ANA_KEEP1 P33_ACCESS(0x0d)
#define P3_ANA_KEEP2 P33_ACCESS(0x0e)
//............. 0X0010 - 0X001F.........for analog others
#define P3_OSL_CON P33_ACCESS(0x10)
#define P3_RST_FLAG P33_ACCESS(0x11)
#define P3_VBAT_TYPE P33_ACCESS(0x12)
#define P3_LRC_CON0 P33_ACCESS(0x13)
#define P3_LRC_CON1 P33_ACCESS(0x14)
#define P3_RST_CON0 P33_ACCESS(0x15)
#define P3_RST_CON1 P33_ACCESS(0x16)
#define P3_RST_CON2 P33_ACCESS(0x17)
#define P3_VLD_KEEP P33_ACCESS(0x18)
#define P3_CLK_CON0 P33_ACCESS(0x19)
#define P3_ANA_READ P33_ACCESS(0x1a)
#define P3_CHG_CON0 P33_ACCESS(0x1b)
#define P3_CHG_CON1 P33_ACCESS(0x1c)
#define P3_CHG_CON2 P33_ACCESS(0x1d)
#define P3_CHG_CON3 P33_ACCESS(0x1e)
#define P3_CHG_CON4 P33_ACCESS(0x1f)
//............. 0X0020 - 0X002F............ for buck circuit
//#define P3_BUCK1_CON0 P33_ACCESS(0x20)
//#define P3_BUCK1_CON1 P33_ACCESS(0x21)
//#define P3_BUCK1_CON2 P33_ACCESS(0x22)
//#define P3_BUCK1_CON3 P33_ACCESS(0x23)
//#define P3_BUCK1_CON4 P33_ACCESS(0x24)
//#define P3_BUCK1_CON5 P33_ACCESS(0x25)
//#define P3_BUCK1_CON6 P33_ACCESS(0x26)
//#define P3_BUCK1_CON7 P33_ACCESS(0x27)
#define P3_BUCK2_CON0 P33_ACCESS(0x20)
#define P3_BUCK2_CON1 P33_ACCESS(0x21)
#define P3_BUCK2_CON2 P33_ACCESS(0x22)
#define P3_BUCK2_CON3 P33_ACCESS(0x23)
#define P3_BUCK2_CON4 P33_ACCESS(0x24)
#define P3_BUCK2_CON5 P33_ACCESS(0x25)
#define P3_BUCK2_CON6 P33_ACCESS(0x26)
#define P3_BUCK2_CON7 P33_ACCESS(0x27)
//#define P3_BUCK3_CON0 P33_ACCESS(0x28)
//#define P3_BUCK3_CON1 P33_ACCESS(0x29)
//#define P3_BUCK3_CON2 P33_ACCESS(0x2a)
//#define P3_BUCK3_CON3 P33_ACCESS(0x2b)
//#define P3_BUCK3_CON4 P33_ACCESS(0x2c)
//#define P3_BUCK3_CON5 P33_ACCESS(0x2d)
//#define P3_BUCK3_CON6 P33_ACCESS(0x2e)
//#define P3_BUCK3_CON7 P33_ACCESS(0x2f)
//............. 0X0030 - 0X003F............ for PMU manager
#define P3_SFLAG0 P33_ACCESS(0x30)
#define P3_SFLAG1 P33_ACCESS(0x31)
#define P3_SFLAG2 P33_ACCESS(0x32)
#define P3_SFLAG3 P33_ACCESS(0x33)
#define P3_SFLAG4 P33_ACCESS(0x34)
#define P3_SFLAG5 P33_ACCESS(0x35)
#define P3_SFLAG6 P33_ACCESS(0x36)
#define P3_SFLAG7 P33_ACCESS(0x37)
#define P3_SFLAG8 P33_ACCESS(0x38)
#define P3_SFLAG9 P33_ACCESS(0x39)
#define P3_SFLAGA P33_ACCESS(0x3a)
#define P3_SFLAGB P33_ACCESS(0x3b)
//............. 0X0040 - 0X004F............ for
#define P3_IVS_RD P33_ACCESS(0x40)
#define P3_IVS_SET P33_ACCESS(0x41)
#define P3_IVS_CLR P33_ACCESS(0x42)
#define P3_PVDD0_AUTO P33_ACCESS(0x43)
#define P3_PVDD1_AUTO P33_ACCESS(0x44)
#define P3_WKUP_DLY P33_ACCESS(0x45)
#define P3_PCNT_FLT P33_ACCESS(0x48)
#define P3_PCNT_CON P33_ACCESS(0x49)
#define P3_PCNT_SET0 P33_ACCESS(0x4a)
#define P3_PCNT_SET1 P33_ACCESS(0x4b)
#define P3_PCNT_DAT0 P33_ACCESS(0x4c)
#define P3_PCNT_DAT1 P33_ACCESS(0x4d)
#define P3_P11_CPU P33_ACCESS(0x4f)
//............. 0X0050 - 0X005F............ for port wake up
#define P3_WKUP_FLT_EN0 P33_ACCESS(0x50)
#define P3_WKUP_P_IE0 P33_ACCESS(0x51)
#define P3_WKUP_N_IE0 P33_ACCESS(0x52)
#define P3_WKUP_LEVEL0 P33_ACCESS(0x53)
#define P3_WKUP_P_CPND0 P33_ACCESS(0x54)
#define P3_WKUP_N_CPND0 P33_ACCESS(0x55)
#define P3_WKUP_P_PND0 P33_ACCESS(0x56)
#define P3_WKUP_N_PND0 P33_ACCESS(0x57)
#define P3_WKUP_FLT_EN1 P33_ACCESS(0x58)
#define P3_WKUP_P_IE1 P33_ACCESS(0x59)
#define P3_WKUP_N_IE1 P33_ACCESS(0x5a)
#define P3_WKUP_LEVEL1 P33_ACCESS(0x5b)
#define P3_WKUP_P_CPND1 P33_ACCESS(0x5c)
#define P3_WKUP_N_CPND1 P33_ACCESS(0x5d)
#define P3_WKUP_P_PND1 P33_ACCESS(0x5e)
#define P3_WKUP_N_PND1 P33_ACCESS(0x5f)
//............. 0X0060 - 0X006F............ for analog wake up
#define P3_AWKUP_FLT_EN P33_ACCESS(0x60)
#define P3_AWKUP_P_IE P33_ACCESS(0x61)
#define P3_AWKUP_N_IE P33_ACCESS(0x62)
#define P3_AWKUP_LEVEL P33_ACCESS(0x63)
#define P3_AWKUP_P_PND P33_ACCESS(0x64)
#define P3_AWKUP_N_PND P33_ACCESS(0x65)
#define P3_AWKUP_P_CPND P33_ACCESS(0x66)
#define P3_AWKUP_N_CPND P33_ACCESS(0x67)
#define P3_WKUP_CLK_SEL P33_ACCESS(0x68)
#define P3_AWKUP_CLK_SEL P33_ACCESS(0x69)
#define P3_SYS_PWR0 P33_ACCESS(0x6a)
#define P3_SYS_PWR1 P33_ACCESS(0x6b)
#define P3_SYS_PWR2 P33_ACCESS(0x6c)
#define P3_SYS_PWR3 P33_ACCESS(0x6d)
#define P3_SYS_PWR4 P33_ACCESS(0x6e)
#define P3_SYS_PWR5 P33_ACCESS(0x6f)
//............. 0X0070 - 0X007F............ for
#define P3_PGDR_CON0 P33_ACCESS(0x70)
#define P3_PGDR_CON1 P33_ACCESS(0x71)
#define P3_PGSD_CON P33_ACCESS(0x72)
#define P3_LP_CTL P33_ACCESS(0x74)
#define P3_LP_CFG P33_ACCESS(0x75)
#define P3_NVRAM_PWR P33_ACCESS(0x76)
#define P3_WVD_CON0 P33_ACCESS(0x77)
#define P3_PVD_CON0 P33_ACCESS(0x78)
#define P3_EVD_CON0 P33_ACCESS(0x79)
#define P3_PMU_CON0 P33_ACCESS(0x7a)
#define P3_PMU_CON4 P33_ACCESS(0x7e)
#define P3_PMU_CON5 P33_ACCESS(0x7f)
//............. 0X0080 - 0X008F............ for
#define P3_PINR_CON P33_ACCESS(0x80)
#define P3_PINR_CON1 P33_ACCESS(0x81)
#define P3_PINR_SAFE P33_ACCESS(0x82)
#define P3_PINR_SAFE1 P33_ACCESS(0x83)
#define P3_PINR_PND1 P33_ACCESS(0x84)
#define P3_RST_SRC0 P33_ACCESS(0x8e)
#define P3_RST_SRC1 P33_ACCESS(0x8f)
//............. 0X0090 - 0X009F............ for
#define P3_PSW_CON0 P33_ACCESS(0x90)
#define P3_PSW_CON1 P33_ACCESS(0x91)
#define P3_PSW_CON2 P33_ACCESS(0x92)
#define P3_PMU_ADC0 P33_ACCESS(0x93)
#define P3_PMU_ADC1 P33_ACCESS(0x94)
#define P3_VBG_CON0 P33_ACCESS(0x95)
#define P3_VBG_CON1 P33_ACCESS(0x96)
#define P3_IOV_CON0 P33_ACCESS(0x97)
#define P3_IOV_CON1 P33_ACCESS(0x98)
#define P3_PAVD_CON0 P33_ACCESS(0x99)
#define P3_DCV_CON0 P33_ACCESS(0x9a)
#define P3_DVD_CON0 P33_ACCESS(0x9b)
#define P3_DVD2_CON0 P33_ACCESS(0x9c)
#define P3_RVD_CON0 P33_ACCESS(0x9d)
#define P3_RVD_CON1 P33_ACCESS(0x9e)
#define P3_RVD2_CON0 P33_ACCESS(0x9f)
//............. 0X00A0 - 0X00AF............
#define P3_PR_PWR P33_ACCESS(0xa0)
#define P3_VPWR_CON0 P33_ACCESS(0xa1)
#define P3_VPWR_CON1 P33_ACCESS(0xa2)
#define P3_RTC_ADC0 P33_ACCESS(0xa3)
#define P3_LS_P11 P33_ACCESS(0xa4)
#define P3_LS_EN P33_ACCESS(0xa5)
#define P3_EXT_EFUSE_CON P33_ACCESS(0xa6)
#define P3_WKUP_SRC P33_ACCESS(0xa8)
#define P3_ANA_MFIX P33_ACCESS(0xa9)
#define P3_DBG_CON0 P33_ACCESS(0xaa)
#define P3_DBG_CON1 P33_ACCESS(0xab)
#define P3_MFIX_OPT P33_ACCESS(0xac)
//............. 0X00B0 - 0X00BF............ for EFUSE
#define P3_EFUSE_CON0 P33_ACCESS(0xb0)
#define P3_EFUSE_CON1 P33_ACCESS(0xb1)
#define P3_EFUSE_CON2 P33_ACCESS(0xb2)
#define P3_EFUSE_RDAT P33_ACCESS(0xb3)
#define P3_EFUSE_PU_DAT0 P33_ACCESS(0xb4)
#define P3_EFUSE_PU_DAT1 P33_ACCESS(0xb5)
#define P3_EFUSE_PU_DAT2 P33_ACCESS(0xb6)
#define P3_EFUSE_PU_DAT3 P33_ACCESS(0xb7)
#define P3_FUNC_EN P33_ACCESS(0xb8)
#define P3_FUNC_CTL0 P33_ACCESS(0xb9)
#define P3_FUNC_CTL1 P33_ACCESS(0xba)
#define P3_FUNC_CTL2 P33_ACCESS(0xbb)
#define P3_EFUSE_ANA0 P33_ACCESS(0xbc)
//............. 0X00C0 - 0X00CF............ for port input select
#define P3_PORT_SEL0 P33_ACCESS(0xc0)
#define P3_PORT_SEL1 P33_ACCESS(0xc1)
#define P3_PORT_SEL2 P33_ACCESS(0xc2)
#define P3_PORT_SEL3 P33_ACCESS(0xc3)
#define P3_PORT_SEL4 P33_ACCESS(0xc4)
#define P3_PORT_SEL5 P33_ACCESS(0xc5)
#define P3_PORT_SEL6 P33_ACCESS(0xc6)
#define P3_PORT_SEL7 P33_ACCESS(0xc7)
//............. 0x00d0 - 0x00df............
#define P3_LS_IO_USR P33_ACCESS(0xd0) //TODO: check sync with verilog head file chip_def.v LEVEL_SHIFTER
#define P3_LS_IO_ROM P33_ACCESS(0xd1)
#define P3_LS_IO_PINR P33_ACCESS(0xd2)
#define P3_LS_CTMU P33_ACCESS(0xd3)
#define P3_LS_IO_SHA P33_ACCESS(0xd4)
#define P3_LS_LRC24M P33_ACCESS(0xd5)
#define P3_LS_BT P33_ACCESS(0xd6)
#define P3_LS_PLL P33_ACCESS(0xd7)
//............. 0X00E0 - 0X00FF............ for p33 lp timer
#define P3_LP_RSC00 P33_ACCESS(0xe0)
#define P3_LP_RSC01 P33_ACCESS(0xe1)
#define P3_LP_RSC02 P33_ACCESS(0xe2)
#define P3_LP_RSC03 P33_ACCESS(0xe3)
#define P3_LP_PRD00 P33_ACCESS(0xe4)
#define P3_LP_PRD01 P33_ACCESS(0xe5)
#define P3_LP_PRD02 P33_ACCESS(0xe6)
#define P3_LP_PRD03 P33_ACCESS(0xe7)
#define P3_LP_RSC10 P33_ACCESS(0xe8)
#define P3_LP_RSC11 P33_ACCESS(0xe9)
#define P3_LP_RSC12 P33_ACCESS(0xea)
#define P3_LP_RSC13 P33_ACCESS(0xeb)
#define P3_LP_RSC14 P33_ACCESS(0xec)
#define P3_LP_RSC15 P33_ACCESS(0xed)
#define P3_LP_PRD10 P33_ACCESS(0xee)
#define P3_LP_PRD11 P33_ACCESS(0xef)
#define P3_LP_PRD12 P33_ACCESS(0xf0)
#define P3_LP_PRD13 P33_ACCESS(0xf1)
#define P3_LP_PRD14 P33_ACCESS(0xf2)
#define P3_LP_PRD15 P33_ACCESS(0xf3)
#define P3_LP_TMR0_CLK P33_ACCESS(0xf4)
#define P3_LP_TMR1_CLK P33_ACCESS(0xf5)
#define P3_LP_TMR0_CON P33_ACCESS(0xf6)
#define P3_LP_TMR1_CON P33_ACCESS(0xf7)
#define P3_LP_TMR_CFG P33_ACCESS(0xf8)
#define P3_LP_CNTRD0 P33_ACCESS(0xf9)
#define P3_LP_CNT0 P33_ACCESS(0xfa)
#define P3_LP_CNT1 P33_ACCESS(0xfb)
#define P3_LP_CNT2 P33_ACCESS(0xfc)
#define P3_LP_CNT3 P33_ACCESS(0xfd)
#define P3_LP_CNT4 P33_ACCESS(0xfe)
#define P3_LP_CNT5 P33_ACCESS(0xff)
//===============================================================================//
//
// P33 RTCVDD
//
//===============================================================================//
//............. 0X0080 - 0X008F............ for RTC
#define R3_ALM_CON RTC_ACCESS(0x80)
#define R3_RTC_CON0 RTC_ACCESS(0x84)
#define R3_RTC_CON1 RTC_ACCESS(0x85)
#define R3_RTC_DAT0 RTC_ACCESS(0x86)
#define R3_RTC_DAT1 RTC_ACCESS(0x87)
#define R3_RTC_DAT2 RTC_ACCESS(0x88)
#define R3_RTC_DAT3 RTC_ACCESS(0x89)
#define R3_RTC_DAT4 RTC_ACCESS(0x8a)
#define R3_ALM_DAT0 RTC_ACCESS(0x8b)
#define R3_ALM_DAT1 RTC_ACCESS(0x8c)
#define R3_ALM_DAT2 RTC_ACCESS(0x8d)
#define R3_ALM_DAT3 RTC_ACCESS(0x8e)
#define R3_ALM_DAT4 RTC_ACCESS(0x8f)
//............. 0X0090 - 0X009F............ for wake up
#define R3_WKUP_EN RTC_ACCESS(0x90)
#define R3_WKUP_EDGE RTC_ACCESS(0x91)
#define R3_WKUP_CPND RTC_ACCESS(0x92)
#define R3_WKUP_PND RTC_ACCESS(0x93)
#define R3_WKUP_LEVEL RTC_ACCESS(0x94)
//............. 0X00A0 - 0X00AF............ for system
#define R3_TIME_CON RTC_ACCESS(0xa0)
#define R3_TIME_CPND RTC_ACCESS(0xa1)
#define R3_TIME_PND RTC_ACCESS(0xa2)
#define R3_ADC_CON RTC_ACCESS(0xa4)
#define R3_OSL_CON RTC_ACCESS(0xa5)
#define R3_WKUP_SRC RTC_ACCESS(0xa8)
#define R3_RST_SRC RTC_ACCESS(0xa9)
#define R3_RST_CON RTC_ACCESS(0xab)
#define R3_CLK_CON RTC_ACCESS(0xac)
//............. 0X00B0 - 0X00BF............ for PORT control
#define R3_PR_IN RTC_ACCESS(0xb0)
#define R3_PR_OUT RTC_ACCESS(0xb1)
#define R3_PR_DIR RTC_ACCESS(0xb2)
#define R3_PR_DIE RTC_ACCESS(0xb3)
#define R3_PR_PU0 RTC_ACCESS(0xb4)
#define R3_PR_PU1 RTC_ACCESS(0xb5)
#define R3_PR_PD0 RTC_ACCESS(0xb6)
#define R3_PR_PD1 RTC_ACCESS(0xb7)
#define R3_PR_HD0 RTC_ACCESS(0xb8)
#define R3_PR_HD1 RTC_ACCESS(0xb9)
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/power_api.h
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#ifndef __POWER_API_H__
#define __POWER_API_H__
#define AT_VOLATILE_RAM_POWER AT(.power_driver.data)
#define AT_VOLATILE_RAM_BSS_POWER AT(.power_driver.data.bss)
#define AT_VOLATILE_RAM_CODE_POWER AT(.power_driver.text.cache.L1)
#define AT_VOLATILE_RAM_LOWPOWER AT_VOLATILE_RAM_POWER //AT(.power_driver.data.overlay)
#define AT_VOLATILE_RAM_BSS_LOWPOWER AT_VOLATILE_RAM_BSS_POWER //AT(.power_driver.data.bss.overlay)
#define AT_VOLATILE_RAM_CODE_LOWPOWER AT_VOLATILE_RAM_CODE_POWER //AT(.power_driver.text.cache.L1.overlay)
//
//
// platform_data
//
//
//
//******************************************************************
//config
enum LOWPOWER_CONFIG {
LOWPOWER_CLOSE,
SLEEP_EN,
DEEP_SLEEP_EN,
};
//osc_type
enum LOWPOWER_OSC_TYPE {
OSC_TYPE_LRC,
OSC_TYPE_BT_OSC,
OSC_TYPE_NULL,
};
struct _power_param {
//sleep
u32 btosc_hz; //蓝牙晶振频率(默认使用24M)
u32 osc_delay_us; //低功耗晶振起振延时，为预留配置。
u32 t1; //低功耗参数，预留配置
u32 t2; //低功耗参数，预留配置
u32 t3; //低功耗参数，预留配置
u32 t4; //低功耗参数，预留配置
//power
//vddiom\vddiow在进出低功耗时使用 VDDIO_KEEP_TYPE 配置
u8 vddiom_lev; //vddiom，系统工作时使用vddiom ldo(使用enum VDDIOM_VOL配置)
u8 vddiow_lev; //vddiow，系统低功耗时使用vddiow ldo(使用enum VDDIOW_VOL配置)
//sleep
u8 config; //低功耗使能，蓝牙&&系统空闲可进入低功耗(使用LOWPOWER_CONFIG配置)
u8 osc_type; //低功耗晶振类型(使用enum LOWPOWER_OSC_TYPE配置)
u8 lptmr_flow; //低功耗参数由用户配置
};
struct _power_pdata {
struct _power_param *power_param_p;
struct _wakeup_param *wakeup_param_p;
};
//
//
// power_api
//
//
//
//******************************************************************
enum VDDIO_KEEP_TYPE {
VDDIO_KEEP_TYPE_NULL, //vddiow使用配置值
VDDIO_KEEP_TYPE_NORMAL, //vddiow使用配置值使用vddiom挡位，即vddiom_lev
VDDIO_KEEP_TYPE_TRIM, //vddiow使用trim值
VDDIO_KEEP_TYPE_PG, //保持vddiom不关闭
VDDIO_KEEP_TYPE_CLOSE, //vddio关闭
};
//#include "power/low_power.h"
void power_early_init(u32 arg);
void power_later_init(u32 arg);
void power_init(struct _power_pdata *pdata);
enum PCONTROL_CMD {
PCONTROL_POWER_DRIVER_RESERVE = 0,
PCONTROL_P_PUTBYTE, //串口调试函数
//*****************************************************
/* power
*/
PCONTROL_POWER_MODE = 0x100,
PCONTROL_DCVDD_CAP_SW, //0：DCVDD上没有外挂电容 1：DCVDD上有外挂电容
PCONTROL_FLASH_PG_VDDIO, //0：FLASH电源引脚使用IO 1：FLASH电源引脚没有使用IO
PCONTROL_RTC_CLK, //RTC_CLK类型，配置开机、关机晶振流程
PCONTROL_POWER_SUPPLY, //供电方式，0：IOVDD供电，1：VPWR供电
//*****************************************************
/* sleep
*/
PCONTROL_PD_VDDIO_KEEP, //pdown vddio切换流程(使用enum VDDIO_KEEP_TYPE配置)
PCONTROL_PD_WDVDD_LEV, //pdown wvdd挡位
PCONTROL_PD_DVDD_LEV, //pdown dvdd挡位
PCONTROL_PD_KEEP_LPCTMU, //pdown 触摸是否保持 0：不保持 1：保持
//*****************************************************
/* soff
*/
PCONTROL_SF_KEEP_LRC, //soff lrc是否保持 0：不保持 1：保持
PCONTROL_SF_VDDIO_KEEP, //soff vddio切换流程(使用enum VDDIO_KEEP_TYPE配置)
PCONTROL_SF_KEEP_NVDD, //soff nvdd是否保持 0：不保持 1：保持
PCONTROL_SF_KEEP_PVDD, //soff pvdd是否保持 0：不保持 1：保持
//*****************************************************
/* 以下配置为对应子模块的预留配置
*/
PCONTROL_PHW_RESERVE = 0x100, //使用enum POWER_MODE配置
PCONTROL_P33_RESERVE = 0x200, //使用PCONTROL_P33_CMD配置
PCONTROL_P11_RESERVE = 0x300, //使用PCONTROL_P11_CMD配置
PCONTROL_LP_FLOW_IC_RESERVE = 0x400, //使用PCONTROL_IC_CMD配置
};
u32 power_control(enum PCONTROL_CMD cmd, u32 arg);
void dvdd2_bypass_en(u8 mode);
//
//
// lowpower
//
//
//
//******************************************************************
void pmu_trim(u32 force_trim, u32 vddio_tieup_vbat);
//
//
// soff
//
//
//
//******************************************************************
//p33 soft flag
enum soft_flag_io_stage {
SOFTFLAG_HIGH_RESISTANCE,
SOFTFLAG_PU,
SOFTFLAG_PD,
SOFTFLAG_OUT0,
SOFTFLAG_OUT0_HD0,
SOFTFLAG_OUT0_HD,
SOFTFLAG_OUT0_HD0_HD,
SOFTFLAG_OUT1,
SOFTFLAG_OUT1_HD0,
SOFTFLAG_OUT1_HD,
SOFTFLAG_OUT1_HD0_HD,
SOFTFLAG_PU100K,
SOFTFLAG_PU1M,
SOFTFLAG_PD100K,
SOFTFLAG_PD1M,
};
struct app_soft_flag_t {
u8 sfc_fast_boot;
u8 flash_stable_delay_sel;
u8 usbdp;
u8 usbdm;
u8 pp0;
};
void mask_softflag_config(struct app_soft_flag_t *softflag);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/power_compat.h
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#ifndef __POWER_COMPAT_H__
#define __POWER_COMPAT_H__
int cpu_reset_by_soft();
void wdt_close();
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/power_gate.h
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#ifndef __POWER_GATE_H__
#define __POWER_GATE_H__
#include "typedef.h"
//STPG define bit
#define STPG_A 0 //STPG output bit
#define STPG_HD0 2 //STPG HD0
#define STPG_HD1 3 //STPG HD1
#define STPG_OE 4 //STPG output enable bit
#define STPG_PD 5 //STPG pull down enable bit
#define STPG_PD1 6 //STPG pull down enable bit
/*
*@brief 初始化pg_io送出高阻+低电平的pwm
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
*@param freq : pwm的频率
*@param duty : pwm的低电平的占空比，0~10000对应0%~100%
*@return 0:成功 非0:失败
*/
int power_gate_pwm_init(u32 pg_io, u32 freq, u32 duty);
/*
*@brief 设置pg_io的pwm的低电平占空比
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
*@param duty : pwm的低电平的占空比，0~10000对应0%~100%
*/
void power_gate_pwm_set_duty(u32 pg_io, u32 duty);
/*
*@brief 关闭pwm, pg_io为高阻
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
*/
void power_gate_pwm_close(u32 pg_io);
/*
*@brief 设置pg_io的开漏输出
*@param pg_io : 可选IO_LCD_PG, IO_MT_PG
*@param value : 0,输出低电平 1,则高阻
*/
void power_gate_open_drain_output(u32 pg_io, u32 value);
/*
*@brief 初始化stpg供电给psram
*@param udly_time : us延时
*@param mdly_time : ms延时
*@param *custom_udelay :us延时回调函数
*@param *custom_mdelay :ms延时回调函数
*/
void power_gate_psram_base(u32 udly_time, u32 mdly_time, void (*custom_udelay)(u32), void (*custom_mdelay)(u32));
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power/power_port.h
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#ifndef __POWER_PORT_H__
#define __POWER_PORT_H__
//
//
// FLASH PIN
//
//
//
//*****************************************************************************/
#define GET_SFC_PORT() ((JL_SFC_IOMC->IOMC0 & BIT(1)) ? 1:0)
/******************************************************************************/
#define _PORT(p) JL_PORT##p
#define _PORT_IN(p,b) P##p##b##_IN
#define _PORT_OUT(p,b) JL_OMAP->P##p##b##_OUT
/****************************spi boot *****************************************/
#define SPI_PORT(p) _PORT(p)
#define SPI0_FUNC_OUT(p,b) _PORT_OUT(p,b)
#define SPI0_FUNC_IN(p,b) _PORT_IN(p,b)
// | func\port | A | B |
// |-----------|------|------|
// | VCC | FSPG | |
// | CS | PD3 | |
// | CLK | PD0 | |
// | DO(D0) | PD1 | |
// | DI(D1) | PD2 | |
// | WP(D2) | PA5 | |
// | HOLD(D3) | PA6 | |
//FSPG define bit
#define FSPG_A 0 //FSPG output bit
#define FSPG_CS_EN 1 //FSPG CS connect enable bit
#define FSPG_HD0 2 //FSPG HD0
#define FSPG_HD1 3 //FSPG HD1
#define FSPG_OE 4 //FSPG output enable bit
#define FSPG_PD 5 //FSPG pull down enable bit
#define FSPG_PD1 6 //FSPG pull down enable bit
#define FSPG_18V 7 //flash supply power domain 1: DCVDD 1.8V; 0: IOVDD;
////////////////////////////////////////////////////////////////////////////////
//group a
#define PORT_SPI0_CSA F
#define SPI0_CSA 0
#define PORT_SPI0_CLKA F
#define SPI0_CLKA 4
#define PORT_SPI0_DOA F
#define SPI0_DOA 5
#define PORT_SPI0_DIA F
#define SPI0_DIA 1
#define PORT_SPI0_D2A F
#define SPI0_D2A 2
#define PORT_SPI0_D3A F
#define SPI0_D3A 3
//#define SPI0_PWR_A IO_PORTD_04
#define SPI0_CS_A IO_PORTF_00
#define SPI0_CLK_A IO_PORTF_04
#define SPI0_DO_D0_A IO_PORTF_05
#define SPI0_DI_D1_A IO_PORTF_01
#define SPI0_WP_D2_A IO_PORTF_02
#define SPI0_HOLD_D3_A IO_PORTF_03
////////////////////////////////////////////////////////////////////////////////
//group b
#define PORT_SPI0_CSB F
#define SPI0_CSB 3
#define PORT_SPI0_CLKB F
#define SPI0_CLKB 1
#define PORT_SPI0_DOB F
#define SPI0_DOB 0
#define PORT_SPI0_DIB F
#define SPI0_DIB 4
#define PORT_SPI0_D2B F
#define SPI0_D2B 5
#define PORT_SPI0_D3B F
#define SPI0_D3B 2
//#define SPI0_PWR_B IO_PORTD_04
#define SPI0_CS_B IO_PORTF_03
#define SPI0_CLK_B IO_PORTF_01
#define SPI0_DO_D0_B IO_PORTF_00
#define SPI0_DI_D1_B IO_PORTF_04
#define SPI0_WP_D2_B IO_PORTF_05
#define SPI0_HOLD_D3_B IO_PORTF_02
////////////////////////////////////////////////////////////////////////////////
//
//
// PSRAM
//
//
//
//*****************************************************************************/
#define PSRAM_CS IO_PORTC_06
#define PSRAM_CLK IO_PORTC_05
#define PSRAM_D0A IO_PORTC_09
#define PSRAM_D1A IO_PORTC_07
#define PSRAM_D2A IO_PORTC_08
#define PSRAM_D3A IO_PORTC_04
#define PINR_DEFAULT_IO IO_PORTB_01
#define MCLR_PORT IO_PORTB_06
//A B C F P USB
#define PORT_TABLE(arg) u32 gpio_confi##arg[6] = {0xffff, 0xffff,0xffff, 0xffff, 0xffff, 0xffff}
void port_protect(u32 *gpio_config, u32 gpio);
#define PORT_PROTECT(gpio) port_protect(gpio_config, gpio)
void init_boot_rom();
u8 get_boot_rom();
void *__port_init(u32 arg);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/power_interface.h
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#ifndef __POWER_INTERFACE_H__
#define __POWER_INTERFACE_H__
#include "generic/typedef.h"
#include "gpio.h"
//-------------------------------------------------------
/* p33
*/
#include "power/p33/p33_sfr.h"
#include "power/p33/p33_access.h"
#include "power/p33/charge_hw.h"
#include "power/p33/p33_api.h"
//#include "power/wdt.h"
//-------------------------------------------------------
/* p11
*/
#include "power/p11/p11_csfr.h"
#include "power/p11/p11_sfr.h"
#include "power/p11/p11_mmap.h"
#include "power/p11/p11_api.h"
#include "power/p11/lp_ipc.h"
#include "power/p11/ipc_spin_lock.h"
//-------------------------------------------------------
/* power
*/
#include "power/power_api.h"
//#include "power/power_wakeup.h"
//#include "power/power_reset.h"
#include "power/power_port.h"
#include "power/power_gate.h"
//-------------------------------------------------------
/* other
*/
//#include "power/power_app.h"
#include "power/power_compat.h"
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/rdec_hw.h
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#ifndef _RDEC_HW_H
#define _RDEC_HW_H
#include "typedef.h"
typedef JL_QDEC_TypeDef RDEC;
#define RDEC0 JL_QDEC0
#define RDEC_MAX_NUM 1
#define RDEC_REG_BASE_ADDR JL_QDEC0
#define RDEC_REG_OFFSET 0
#define IRQ_RDECx_IDX_LIST IRQ_QDEC0_IDX
//RDECx_CON reg
#define RDEC_SPND 16 //bit16~bit31
// #define RDEC_RESERVED 11 //bit11~bit15
#define RDEC_INT_MODE 10
#define RDEC_MODE 8 //bit8~bit9
#define RDEC_PND 7
#define RDEC_CPND 6
// #define RDEC_RESERVED 2 //bit2~bit5
#define RDEC_POL 1
#define RDEC_EN 0
//RDECx_SMP 8bit
//RDECx_DAT 8bit
//RDECx_DBE 8bit
typedef enum : u8 {
RDEC_0 = 0,
RDEC_x,
} rdec_dev;
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/sdmmc.h
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#ifndef ARCH_SDMMC_H
#define ARCH_SDMMC_H
#include "device/sdmmc/sdmmc.h"
struct sdmmc_platform_data {
char port[6];
u8 irq;
u8 data_width;
u8 priority;
u8 detect_mode;
u8 detect_io;
u8 detect_io_level;
u8 detect_time_interval;
u32 detect_timeout;
u32 speed;
volatile u16 *sfr;
int (*detect_func)(const struct sdmmc_platform_data *);
void (*port_init)(const struct sdmmc_platform_data *, int mode);
void (*power)(u8 on);
};
#define SD0_PLATFORM_DATA_BEGIN(data) \
static const struct sdmmc_platform_data data
#define SD0_PLATFORM_DATA_END() \
.irq = IRQ_SD0_IDX, \
.sfr = (volatile u16 *)JL_SD0, \
.port_init = sdmmc_0_port_init, \
.detect_time_interval = 250, \
.detect_timeout = 1000, \
extern const struct device_operations sd_dev_ops;
void sdmmc_0_port_init(const struct sdmmc_platform_data *, int mode);
int sdmmc_0_clk_detect(const struct sdmmc_platform_data *);
int sdmmc_0_io_detect(const struct sdmmc_platform_data *);
int sdmmc_0_cmd_detect(const struct sdmmc_platform_data *);
int sdmmc_cmd_detect(const struct sdmmc_platform_data *data);
void sd_set_power(u8 enable);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/sfc_norflash_api.h
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#ifndef __SFC_NORFLASH_API_H__
#define __SFC_NORFLASH_API_H__
#include "typedef.h"
#include "device.h"
int sfc_norflash_init(const struct dev_node *node, void *arg);
int sfc_norflash_open(const char *name, struct device **device, void *arg);
int sfc_norflash_read(struct device *device, void *buf, u32 len, u32 offset);
int sfc_norflash_write(struct device *device, void *buf, u32 len, u32 offset);
int sfc_norflash_ioctl(struct device *device, u32 cmd, u32 arg);
u32 sfc0_flash_addr2cpu_addr(u32 offset);
u32 sfc_norflash_read_uuid(u8 *uuid);
u8 *sfc_norflash_get_uuid(void);
u32 sfc_norflash_erase_otp();
u32 sfc_norflash_read_otp(void *buf, u32 len, u32 addr);
u32 sfc_norflash_write_otp(const u8 *buf, u32 len, u32 addr);
void sfc_norflash_set_early_unenc_zone(void *_arg);
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/sfc_spi.h
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#ifndef _SFC1_INTERFACE_H_
#define _SFC1_INTERFACE_H_
#include "typedef.h"
#include "generic/ioctl.h"
enum SFC_DATA_WIDTH {
SFC_DATA_WIDTH_2 = 2,
SFC_DATA_WIDTH_4 = 4,
};
enum SFC_READ_MODE {
SFC_RD_OUTPUT = 0,
SFC_RD_IO,
SFC_RD_IO_CONTINUE,
};
struct sfc_spi_platform_data {
u8 spi_hw_index;
enum SFC_DATA_WIDTH sfc_data_width;
enum SFC_READ_MODE sfc_read_mode;
u8 sfc_encry; //是否加密
u16 sfc_clk_div; //时钟分频: sfc_fre = sys_clk / div;
u32 unencry_start_addr; //不加密起始地址
u32 unencry_size; //不加密大小
};
#define SFC_SPI_PLATFORM_DATA_BEGIN(data) \
const struct sfc_spi_platform_data data = {
#define SFC_SPI_PLATFORM_DATA_END() \
};
//sfc1 API:
int sfc_spi_init(struct sfc_spi_platform_data *sfc_spi_data);
int sfc_spi_open(void *sfc_spi_data);
int sfc_spi_close(void);
u32 sfc_spi_read_id(void);
int sfc_spi_read(u32 addr, void *buf, u32 len);
int sfc_spi_write_pages(u32 addr, void *buf, u32 len);
int sfc_spi_eraser(u32 cmd, u32 addr);
u32 sfc1_flash_addr2cpu_addr(u32 offset);
u32 sfc1_cpu_addr2flash_addr(u32 offset);
void sfc_suspend(u32 enable_spi);
void sfc_resume(u32 disable_spi);
void sfc1_suspend();
#endif /* #ifndef _SFC1_INTERFACE_H_ */
loader/update_ui/include_lib/driver/cpu/br35/asm/spi_hw.h
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#ifndef _SPI_HW_H_
#define _SPI_HW_H_
#include "typedef.h"
#include "generic/ioctl.h"
#define SUPPORT_SPI0 0 //是否使能SPI0
#define SUPPORT_SPI1 1 //是否使能SPI1
#define SPI1_SUPPORT_UNIDIR_4BIT 1 //spi 4bit
#define SUPPORT_SPI2 1 //是否使能spi2
#define SPI2_SUPPORT_UNIDIR_4BIT 1 //spi 4bit
typedef enum spi_index {
HW_SPI0, //SPI0系统已使用
HW_SPI1,
HW_SPI2,
HW_SPI_MAX_NUM,
} hw_spi_dev;
enum spi_bit_mode {
SPI_FIRST_BIT_MSB, //7,6,5,4,3,2,1,0
SPI_FIRST_BIT_LSB, //0,1,2,3,4,5,6,7
SPI_FIRST_BIT_BIT3, //3,2,1,0,7,6,5,4
SPI_FIRST_BIT_BIT4, //4,5,6,7,0,1,2,3
};
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/spiflash.h
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#ifndef ASM_SPIFLASH_H
#define ASM_SPIFLASH_H
#include "device/device.h"
extern const struct device_operations spiflash_dev_ops;
extern const struct device_operations sfcflash_dev_ops;
extern const struct device_operations sdfile_dev_ops;
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/uart_dev.h
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#ifndef _UART_DEV_H_
#define _UART_DEV_H_
#include "typedef.h"
#include "os/os_api.h"
#include "jiffies.h"
#include "irq.h"
/* #include "jtime.h" */
#define CONFIG_ENABLE_UART_SEM 1
#define SET_INTERRUPT ___interrupt
#define irq_disable(x) bit_clr_ie(x)
#define irq_enable(x) bit_set_ie(x)
#ifndef time_after
#define time_after(a,b) (((long)(b) - (long)(a)) < 0)
#endif
#ifndef time_before
#define time_before(a,b) time_after(b,a)
#endif
#ifndef MIN
#define MIN(a, b) ((a) < (b) ? (a) : (b))
#endif
#ifndef MAX
#define MAX(a, b) ((a) > (b) ? (a) : (b))
#endif
static inline u32 ut_get_jiffies(void)
{
#if 1
return jiffies;
#endif
#if 0
return Jtime_updata_jiffies();
#endif
}
static inline u32 ut_msecs_to_jiffies(u32 msecs)
{
if (msecs >= 10) {
msecs /= 10;
} else if (msecs) {
msecs = 1;
}
return msecs;
}
#if CONFIG_ENABLE_UART_SEM
typedef OS_SEM UT_Semaphore ;
static inline void UT_OSSemCreate(UT_Semaphore *sem, u32 count)
{
os_sem_create(sem, count);
}
static inline void UT_OSSemPost(UT_Semaphore *sem)
{
os_sem_post(sem);
}
static inline u32 UT_OSSemPend(UT_Semaphore *sem, u32 timeout)
{
return os_sem_pend(sem, timeout);
}
static inline void UT_OSSemSet(UT_Semaphore *sem, u32 count)
{
os_sem_set(sem, count);
}
static inline void UT_OSSemClose(UT_Semaphore *sem)
{
}
static inline void ut_sleep()
{
os_time_dly(1);
}
#else
typedef volatile u32 UT_Semaphore;
static inline void UT_OSSemCreate(UT_Semaphore *sem, u32 count)
{
*sem = count;
}
static inline void UT_OSSemPost(UT_Semaphore *sem)
{
(*sem)++;
}
static inline u32 UT_OSSemPend(UT_Semaphore *sem, u32 timeout)
{
u32 _timeout = timeout + ut_get_jiffies();
extern void clr_wdt();
while (1) {
if (*sem) {
(*sem) --;
break;
}
if ((timeout != 0) && time_before(_timeout, ut_get_jiffies())) {
return -1;
}
clr_wdt();
}
return 0;
}
static inline void UT_OSSemSet(UT_Semaphore *sem, u32 count)
{
*sem = count;
}
static inline void UT_OSSemClose(UT_Semaphore *sem)
{
}
static inline void ut_sleep()
{
extern void clr_wdt();
clr_wdt();
}
#endif
typedef void (*ut_isr_cbfun)(void *ut_bus, u32 status);
struct uart_platform_data_t {
u8 tx_pin; ///< 作为发送引脚的引脚号，可从参考gpio.h枚举中选，当引脚为空时，则填 -1
u8 rx_pin; ///< 作为接收引脚的引脚号，可从参考gpio.h枚举中选，当引脚为空时，则填 -1
void *rx_cbuf; ///< 如果使用中断DMA接收，则写入循环buf的首地址，ut中断使能；如果不使用，则写入NULL，无中断
u32 rx_cbuf_size; ///< 循环buf的大小,必须为2的多少几次幂，如果不用循环buf，该值无效，可写NULL
u32 frame_length; ///< 产生RT中断的字节数，如无中断，该值无效
u32 rx_timeout; ///< 产生OT中断的时间值，单位ms，如无中断，该值无效
ut_isr_cbfun isr_cbfun; ///< ut中断的回调函数句柄，不用回调函数则写入NULL，如无中断，句柄无效
void *argv; ///< ut中断的回调函数的一个扩展形参，可供用户设定，如无回调函数，此参数无效
u32 is_9bit: 1; ///< ut九位模式使能位，0：关闭；1：使能
u32 baud: 24; ///< ut的波特率
};
/**
* @brief 循环buf结构体类型定义
*/
typedef struct {
u8 *buffer; ///<循环buf的首地址
u32 buf_size; ///<循环buf的大小
u32 buf_in; ///<循环buf的写偏移量
u32 buf_out; ///<循环buf的读偏移量
} KFIFO;
enum {
UT_TX = 1,
UT_RX,
UT_RX_OT
};
/**
* @brief ut初始化函数的返回结构体，含各函数指针，供外部使用
*/
typedef struct {
ut_isr_cbfun isr_cbfun; ///< ut中断的回调函数句柄，不用回调函数则写入NULL，如无中断，句柄无效
void *argv; ///< ut中断的回调函数的一个扩展形参,在此返回
void (*putbyte)(char a); ///< ut发送一个byte
u8(*getbyte)(u8 *buf, u32 timeout); ///< ut接收一个byte，buf：字节存放地址；timeout：超时时间，单位ms；返回0：失败；返回1：成功
u32(*read)(u8 *inbuf, u32 len, u32 timeout); ///< ut接收一个字符串，inbuf：字符串存放首地址；len：预接收长度；timeout：超时时间，单位ms；返回实际接收的长度
void (*write)(const u8 *outbuf, u32 len); ///< ut发送一个字符串，outbuf：字符串首地址；len：发送的字符串长度；
void (*set_baud)(u32 baud); ///< ut设置波特率，baud：波特率值
u32 frame_length;
u32 rx_timeout;
KFIFO kfifo; ///< ut用的循环buf结构体的指针
UT_Semaphore sem_rx;
UT_Semaphore sem_tx;
u32(*get_data_len)(void);
} uart_bus_t;
uart_bus_t *uart_dev_open(const struct uart_platform_data_t *arg);
u32 uart_dev_close(uart_bus_t *ut);
////////////////////////////////////////////////////////////////////////////////
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/usb_hw.h
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#ifndef _USB_HW_H_
#define _USB_HW_H_
#include "typedef.h"
#include "generic/ioctl.h"
#define USB_MAX_HW_EPNUM 5
/* #define ep_regs JL_USB_EP_TypeDef */
typedef struct {
volatile u32 TXMAXP;
volatile u32 TXCSR1;
volatile u32 TXCSR2;
volatile u32 RXMAXP;
volatile u32 RXCSR1;
volatile u32 RXCSR2;
volatile const u32 RXCOUNT1;
volatile const u32 RXCOUNT2;
volatile u32 TXTYPE;
volatile u32 TXINTERVAL;
volatile u32 RXTYPE;
volatile u32 RXINTERVAL;
u32 RESERVED[0xd0 / 4];
} ep_regs;
#define PHY_ON 0
#define LOW_SPEED 1
#define USB_NRST 2
#define TM1 3
#define CID 4
#define VBUS 5
#define USB_TEST 6
#define PDCHKDP 9
#define SOFIE 10
#define SIEIE 11
#define CLR_SOF_PND 12
#define SOF_PND 13
#define SIE_PND 14
#define CHKDPO 15
#define DM_SE 16
#define DP_SE 17
#define MC_RNW 14
#define MACK 15
#define DPOUT 0
#define DMOUT 1
#define DPIE 2
#define DMIE 3
#define DPPU 4
#define DMPU 5
#define DPPD 6
#define DMPD 7
#define DPDIE 8
#define DMDIE 9
#define DPDIEH 10
#define DMDIEH 11
#define IO_MODE 12
#define SR 13
#define IO_PU_MODE 14
enum {
USB0,
};
#define USB_MAX_HW_NUM 1
#endif
loader/update_ui/include_lib/driver/cpu/br35/asm/wdt.h
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#ifndef ___WDT_H__
#define ___WDT_H__
#include "asm/power_interface.h"
#endif
loader/update_ui/include_lib/driver/device/uart.h
+131
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#ifndef DEVICE_UART_H
#define DEVICE_UART_H
#include "typedef.h"
#include "device/device.h"
#include "generic/ioctl.h"
//#include "system/task.h"
#define UART_DISABLE 0x00000000
#define UART_DMA_SUPPORT 0x00000001
#define UART_TX_USE_DMA 0x00000003
#define UART_RX_USE_DMA 0x00000005
#define UART_DEBUG 0x00000008
struct uart_outport {
u8 tx_pin;
u8 rx_pin;
u16 value;
};
extern void putbyte(char a);
enum uart_clk_src {
LSB_CLK,
OSC_CLK,
PLL_48M,
};
enum _uart_port_out {
//uart0
PORTC_0_1 = 0x00001000,
PORTG_6_7 = 0x00002000,
PORTH_12_13 = 0x00003000,
PORTB_14_15 = 0x00004000,
//uart1
PORTC_2_3 = 0x00005000,
PORTH_2_5 = 0x00006000,
PORTH_14_15 = 0x00007000,
PORTC_6_7 = 0x00008000,
//uart3
PORTE_0_1 = 0x00009000,
PORTB_4_3 = 0x0000A000,
PORTD_9_10 = 0x0000B000,
PORTD_14_15 = 0x0000C000,
PORT_REMAP = 0x0000D000,
};
struct uart_platform_data {
u8 *name;
u8 irq;
u8 tx_pin;
u8 rx_pin;
u32 flags;
u32 baudrate;
enum _uart_port_out port;
void (*port_remap_func)(void);
u32 max_continue_recv_cnt;
u32 idle_sys_clk_cnt;
enum uart_clk_src clk_src;
};
enum {
UART_CIRCULAR_BUFFER_WRITE_OVERLAY = -1,
UART_RECV_TIMEOUT = -2,
UART_RECV_EXIT = -3,
};
#define UART_MAGIC 'U'
#define UART_FLUSH _IO(UART_MAGIC,1)
#define UART_SET_RECV_ALL _IOW(UART_MAGIC,2,bool)
#define UART_SET_RECV_BLOCK _IOW(UART_MAGIC,3,bool)
#define UART_SET_RECV_TIMEOUT _IOW(UART_MAGIC,4,u32)
#define UART_SET_RECV_TIMEOUT_CB _IOW(UART_MAGIC,5,int (*)(void))
#define UART_GET_RECV_CNT _IOR(UART_MAGIC,6,u32)
#define UART_START _IO(UART_MAGIC,7)
#define UART_SET_CIRCULAR_BUFF_ADDR _IOW(UART_MAGIC,8,void *)
#define UART_SET_CIRCULAR_BUFF_LENTH _IOW(UART_MAGIC,9,u32)
#define UART_PLATFORM_DATA_BEGIN(data) \
static const struct uart_platform_data data = {
#define UART_PLATFORM_DATA_END() \
};
struct uart_device {
char *name;
const struct uart_operations *ops;
struct device dev;
const struct uart_platform_data *priv;
// OS_MUTEX mutex;
};
struct uart_operations {
int (*init)(struct uart_device *);
int (*read)(struct uart_device *, void *buf, u32 len);
int (*write)(struct uart_device *, void *buf, u16 len);
int (*ioctl)(struct uart_device *, u32 cmd, u32 arg);
int (*close)(struct uart_device *);
};
#define REGISTER_UART_DEVICE(dev) \
static struct uart_device dev sec(.uart)
extern struct uart_device uart_device_begin[], uart_device_end[];
#define list_for_each_uart_device(p) \
for (p=uart_device_begin; p<uart_device_end; p++)
extern const struct device_operations uart_dev_ops;
#endif
loader/update_ui/include_lib/liba/br35/cpu.a
BIN
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loader/update_ui/include_lib/liba/br35/cpu.a.objs.txt
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obj/Release/lib/common/gpio.o obj/Release/lib/common/gpio_hw.o obj/Release/lib/common/hwi.o obj/Release/lib/common/math_fast_function.o obj/Release/lib/common/mem_heap.o obj/Release/lib/common/wdt.o obj/Release/lib/dbi/dbi.o obj/Release/lib/dbi/dbi_mcu.o obj/Release/lib/dbi/dbi_rgb.o obj/Release/lib/dbi/dbi_spi.o obj/Release/lib/dbi/dbi_spi_ramless.o obj/Release/lib/dbi/lcd_buffer_manager.o
loader/update_ui/include_lib/system/debug.h
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#ifndef _DEBUG_H_
#define _DEBUG_H_
#include "asm/cpu.h"
#include "generic/typedef.h"
#define LOG_ASSERT_ENABLE
void printf_buf(u8 *buf, u32 len);
#define PRINTF(format, ...) printf(format, ## __VA_ARGS__)
#define LOG_VERBOSE v
#define LOG_INFO i
#define LOG_DEBUG d
#define LOG_WARN w
#define LOG_ERROR e
#define LOG_CHAR c
#define _STR(x) #x
#define STR(x) "["_STR(x)"]"
#define _LOG_TAG_CONST_DECLARE(level, name) extern const char log_tag_const_##level##_##name
#define LOG_TAG_CONST_DECLARE(level, name) _LOG_TAG_CONST_DECLARE(level, name)
#define ___LOG_IS_ENABLE(level, name) (log_tag_const_##level##_##name)
#define __LOG_IS_ENABLE(level, name) ___LOG_IS_ENABLE(level, name)
#define _LOG_IS_ENABLE(level) __LOG_IS_ENABLE(level, LOG_TAG_CONST)
#ifdef LOG_TAG_CONST
LOG_TAG_CONST_DECLARE(LOG_VERBOSE, LOG_TAG_CONST);
LOG_TAG_CONST_DECLARE(LOG_INFO, LOG_TAG_CONST);
LOG_TAG_CONST_DECLARE(LOG_DEBUG, LOG_TAG_CONST);
LOG_TAG_CONST_DECLARE(LOG_WARN, LOG_TAG_CONST);
LOG_TAG_CONST_DECLARE(LOG_ERROR, LOG_TAG_CONST);
LOG_TAG_CONST_DECLARE(LOG_CHAR, LOG_TAG_CONST);
#define _LOG_TAG STR(LOG_TAG_CONST)
#define LOG_IS_ENABLE(level) _LOG_IS_ENABLE(level)
#else
#define _LOG_TAG LOG_TAG
#define LOG_IS_ENABLE(x) 1
#endif
#define LOG_BY_MACRO 1
#define LOG_BY_CONST 2
// #define LOG_MODE LOG_BY_MACRO
#define LOG_MODE LOG_BY_CONST
/*
* LOG 通过宏控制
*/
#if (LOG_MODE == LOG_BY_MACRO)
#ifdef LOG_INFO_ENABLE
#define log_info(format, ...) PRINTF("[Info] :" _LOG_TAG format "\r\n", ## __VA_ARGS__)
#else
#define log_info(...)
#endif
#ifdef LOG_DEBUG_ENABLE
#define log_debug(format, ...) PRINTF("[Debug] :" _LOG_TAG format "\r\n", ## __VA_ARGS__)
#define log_debug_hexdump(x, y) printf_buf(x, y)
#else
#define log_debug(...)
#define log_debug_hexdump(x, y)
#endif
#ifdef LOG_ERROR_ENABLE
#define log_error(format, ...) PRINTF("<Error> :" _LOG_TAG format "\r\n", ## __VA_ARGS__)
#define log_error_hexdump(x, y) printf_buf(x, y)
#else
#define log_error(...)
#define log_error_hexdump(...)
#endif
#ifdef LOG_DUMP_ENABLE
#define log_info_hexdump(x,y) printf_buf(x,y)
#else
#define log_info_hexdump(...)
#endif
#ifdef LOG_CHAR_ENABLE
#define log_char(x) putchar(x)
#else
#define log_char(x)
#endif
/*
* LOG 通过常量控制
*/
#elif (LOG_MODE == LOG_BY_CONST)
#define log_info(format, ...) \
if (LOG_IS_ENABLE(LOG_INFO)) \
log_print(__LOG_INFO,NULL,"[Info]: " _LOG_TAG format "\r\n", ## __VA_ARGS__)
#define log_info_hexdump(x, y) \
if (LOG_IS_ENABLE(LOG_INFO)) \
printf_buf(x, y)
#define log_debug(format, ...) \
if (LOG_IS_ENABLE(LOG_DEBUG)) \
log_print(__LOG_DEBUG,NULL,"[Debug]: " _LOG_TAG format "\r\n", ## __VA_ARGS__)
#define log_debug_hexdump(x, y) \
if (LOG_IS_ENABLE(LOG_DEBUG)) \
printf_buf(x, y)
#define log_error(format, ...) \
if (LOG_IS_ENABLE(LOG_ERROR)) \
log_print(__LOG_ERROR,NULL,"<Error>: " _LOG_TAG format "\r\n", ## __VA_ARGS__)
#define log_error_hexdump(x, y) \
if (LOG_IS_ENABLE(LOG_ERROR)) \
printf_buf(x, y)
#define log_char(x) \
if (LOG_IS_ENABLE(LOG_CHAR)) \
putchar(x)
#endif
#define traceSUPER_MODE() \
/*{int icfg, rets, reti; \
__asm__ volatile("%0 = icfg" : "=r"(icfg)); \
__asm__ volatile("%0 = rets" :"=r"(rets)); \
__asm__ volatile("%0 = reti" :"=r"(reti)); \
ASSERT(icfg & BIT(10), "icfg 0x%x/ rets 0x%x / reti 0x%x", icfg, rets, reti)}*/
void watchdog_close(void);
#endif//__DEBUG_LOG_H_
loader/update_ui/include_lib/system/device/device.h
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#ifndef CHRDEV_H
#define CHRDEV_H
#include "generic/typedef.h"
#include "generic/list.h"
//#include "generic/ioctl.h"
#include "generic/atomic.h"
//#include "sys/task.h"
#include "device/ioctl_cmds.h"
struct dev_node;
struct device;
/**@struct device_operations
* @brief device_operations结构体 \n
* otg设备执行哪种类型的操作
*/
struct device_operations {
bool (*online)(const struct dev_node *node); ///<设备在线状态查询
int (*init)(const struct dev_node *node, void *); ///<设备初始化
int (*open)(const char *name, struct device **device, void *arg); ///<设备开启
int (*read)(struct device *device, void *buf, u32 len, u32); ///<读操作
int (*write)(struct device *device, void *buf, u32 len, u32); ///<写操作
int (*seek)(struct device *device, u32 offset, int orig); ///<设备搜索
int (*ioctl)(struct device *device, u32 cmd, u32 arg); ///<I/O控制
int (*close)(struct device *device); ///<设备关闭
};
struct dev_node {
const char *name;
const struct device_operations *ops;
void *priv_data;
};
struct device {
atomic_t ref;
void *private_data;
const struct device_operations *ops;
void *platform_data;
void *driver_data;
};
#define REGISTER_DEVICE(node) \
const struct dev_node node sec(.device)
#define REGISTER_DEVICES(node) \
const struct dev_node node[] sec(.device)
int devices_init();
bool dev_online(const char *name);
void *dev_open(const char *name, void *arg);
int dev_read(void *device, void *buf, u32 len);
int dev_write(void *device, void *buf, u32 len);
int dev_seek(void *device, u32 offset, int orig);
int dev_ioctl(void *device, int cmd, u32 arg);
int dev_close(void *device);
int dev_bulk_read(void *_device, void *buf, u32 offset, u32 len);
int dev_bulk_write(void *_device, void *buf, u32 offset, u32 len);
#endif
loader/update_ui/include_lib/system/device/ioctl_cmds.h
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#ifndef IOCTL_INF_H
#define IOCTL_INF_H
#define IOCTL_SET_IRQ_NUM 1
#define IOCTL_SET_PRIORITY 2
#define IOCTL_SET_DATA_WIDTH 3
#define IOCTL_SET_SPEED 4
#define IOCTL_SET_DETECT_MODE 5
#define IOCTL_SET_DETECT_FUNC 6
#define IOCTL_SET_DETECT_TIME_INTERVAL 7
#define IOCTL_SET_PORT 8
#define IOCTL_SET_PORT_FUNC 9
#define IOCTL_SET_CS_PORT_FUNC 10
#define IOCTL_SET_READ_MODE 11
#define IOCTL_SET_WRITE_MODE 12
#define IOCTL_SET_WRITE_PROTECT 13
#define IOCTL_SET_START_BIT 14
#define IOCTL_SET_STOP_BIT 15
#define IOCTL_FLUSH 16
#define IOCTL_REGISTER_IRQ_HANDLER 17
#define IOCTL_UNREGISTER_IRQ_HANDLER 18
#define IOCTL_GET_SYS_TIME 19
#define IOCTL_SET_SYS_TIME 20
#define IOCTL_GET_ALARM 21
#define IOCTL_SET_ALARM 22
#define IOCTL_SET_CAP_LOWSPEED_CARD 23
#define IOCTL_SET_VDD50_EN 30
#define IOCTL_GET_WEEKDAY 32
#define IOCTL_CLR_READ_MODE 33
#define IOCTL_SET_READ_CRC 34
#define IOCTL_GET_READ_CRC 35
#define IOCTL_GET_VOLUME 36
#define IOCTL_SET_VOLUME 37
#define IOCTL_SET_ALARM_ENABLE 38
#define IOCTL_CMD_RESUME 39
#define IOCTL_CMD_SUSPEND 40
#define IOCTL_SET_BASE_ADDR 41
#define IOCTL_SET_ASYNC_MODE 42
#define IOCTL_GET_SPEED 43
#define IOCTL_SET_ACTIVE_STATUS 44
#define IOCTL_POWER_RESUME 45
#define IOCTL_POWER_SUSPEND 46
#define IOCTL_GET_ID 100
#define IOCTL_GET_SECTOR_SIZE 101
#define IOCTL_GET_BLOCK_SIZE 102
#define IOCTL_GET_CAPACITY 103
#define IOCTL_GET_WIDTH 104
#define IOCTL_GET_HEIGHT 105
#define IOCTL_GET_BLOCK_NUMBER 106
#define IOCTL_CHECK_WRITE_PROTECT 107
#define IOCTL_GET_STATUS 108
#define IOCTL_GET_TYPE 109
#define IOCTL_GET_MAX_LUN 110
#define IOCTL_GET_CUR_LUN 111
#define IOCTL_SET_CUR_LUN 112
#define IOCTL_SET_FORCE_RESET 113
#define IOCTL_SET_CAPACITY 114
#define IOCTL_ENTER_4BYTE_ADDR_MODE 115
#define IOCTL_EXIT_4BYTE_ADDR_MODE 116
#define IOCTL_ERASE_SECTOR 200
#define IOCTL_ERASE_BLOCK 201
#define IOCTL_ERASE_CHIP 202
#define IOCTL_SET_ENC_END 203
#define IOCTL_ERASE_PAGE 204
#define IOCTL_SET_DATA_CALLBACK 301
#define IOCTL_GET_PART_INFO 320
struct ioctl_irq_handler {
void *priv;
void *handler;
};
#endif
loader/update_ui/include_lib/system/event.h
+352
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@@ -0,0 +1,352 @@
#ifndef SYS_EVENT_H
#define SYS_EVENT_H
#include "generic/typedef.h"
#include "generic/list.h"
#include "generic/rect.h"
#define KEY_POWER_START 0
#define KEY_POWER 1
#define KEY_PREV 2
#define KEY_NEXT 3
#define KEY_OK 4
#define KEY_CANCLE 5
#define KEY_MENU 6
#define KEY_MODE 7
#define KEY_PHOTO 8
#define KEY_ENC 9
#define KEY_VOLUME_DEC 10
#define KEY_VOLUME_INC 11
#define KEY_PHONE 12
#define KEY_LEFT 37
#define KEY_UP 38
#define KEY_RIGHT 39
#define KEY_DOWN 40
#define KEY_0 48
#define KEY_1 49
#define KEY_2 50
#define KEY_3 51
#define KEY_4 52
#define KEY_5 53
#define KEY_6 54
#define KEY_7 55
#define KEY_8 56
#define KEY_9 57
#define KEY_F1 60
#define SYS_ALL_EVENT 0xffff
#define SYS_KEY_EVENT 0x0001
#define SYS_TOUCH_EVENT 0x0002
#define SYS_DEVICE_EVENT 0x0004
#define SYS_NET_EVENT 0x0008
#define SYS_BT_EVENT 0x0010
#define SYS_IR_EVENT 0x0020
#define SYS_PBG_EVENT 0x0040
#define SYS_BT_AI_EVENT 0x0080
#define SYS_AI_EVENT 0x0100
#define SYS_MATRIX_KEY_EVENT 0x0200
#define SYS_TOUCHPAD_EVENT 0x0400
#define DEVICE_EVENT_FROM_AT_UART (('A' << 24) | ('T' << 16) | ('U' << 8) | '\0')
#define DEVICE_EVENT_FROM_CHARGE (('C' << 24) | ('H' << 16) | ('G' << 8) | '\0')
#define DEVICE_EVENT_FROM_POWER (('P' << 24) | ('O' << 16) | ('W' << 8) | '\0')
#define DEVICE_EVENT_FROM_CI_UART (('C' << 24) | ('I' << 16) | ('U' << 8) | '\0')
#define DEVICE_EVENT_FROM_CI_TWS (('C' << 24) | ('I' << 16) | ('T' << 8) | '\0')
#define DEVICE_EVENT_CHARGE_STORE (('S' << 24) | ('T' << 16) | ('O' << 8) | '\0')
#define DEVICE_EVENT_FROM_TONE (('T' << 24) | ('N' << 16) | ('E' << 8) | '\0')
#define DEVICE_EVENT_FROM_FM (('F' << 24) | ('M' << 16) | ('\0'<< 8) | '\0')
#define KEY_EVENT_FROM_TWS (('T' << 24) | ('W' << 16) | ('S' << 8) | '\0')
#define SYS_BT_EVENT_FROM_TWS (('T' << 24) | ('W' << 16) | ('S' << 8) | '\0')
#define DEVICE_EVENT_FROM_LINEIN (('A' << 24) | ('U' << 16) | ('X' << 8) | '\0')
#define DRIVER_EVENT_FROM_SD0 (('S' << 24) | ('D' << 16) | ('0' << 8) | '\0')
#define DRIVER_EVENT_FROM_SD1 (('S' << 24) | ('D' << 16) | ('1' << 8) | '\0')
#define DRIVER_EVENT_FROM_SD2 (('S' << 24) | ('D' << 16) | ('2' << 8) | '\0')
#define DEVICE_EVENT_FROM_MUSIC (('M' << 24) | ('S' << 16) | ('C' << 8) | '\0')
#define DEVICE_EVENT_FROM_USB_HOST (('U' << 24) | ('H' << 16) | '\0' | '\0')
#define DEVICE_EVENT_FROM_OTG (('O' << 24) | ('T' << 16) | ('G' << 8) | '\0')
#define DEVICE_EVENT_FROM_PC (('P' << 24) | ('C' << 16) | '\0' | '\0')
#define DEVICE_EVENT_FROM_UAC (('U' << 24) | ('A' << 16) | ('C' << 8) | '\0')
#define DEVICE_EVENT_FROM_ALM (('A' << 24) | ('L' << 16) | ('M' << 8) | '\0')
#define SYS_BT_EVENT_TYPE_CON_STATUS (('C' << 24) | ('O' << 16) | ('N' << 8) | '\0')
#define SYS_BT_EVENT_TYPE_HCI_STATUS (('H' << 24) | ('C' << 16) | ('I' << 8) | '\0')
#define SYS_BT_EVENT_BLE_STATUS (('B' << 24) | ('L' << 16) | ('E' << 8) | '\0')
#define DEVICE_EVENT_FROM_KEY (('K' << 24) | ('E' << 16) | ('Y' << 8) | '\0')
#define SYS_BT_AI_EVENT_TYPE_STATUS (('B' << 24) | ('A' << 16) | ('I' << 8) | '\0')
#define DEVICE_EVENT_FROM_UART_RX_OVERFLOW (('U' << 24) | ('R' << 16) | ('F' << 8) | '\0')
#define DEVICE_EVENT_FROM_UART_RX_OUTTIME (('U' << 24) | ('R' << 16) | ('T' << 8) | '\0')
#define DEVICE_EVENT_FROM_DAC (('D' << 24) | ('A' << 16) | ('C' << 8) | '\0')
#define SYS_EVENT_FROM_CTRLER (('C' << 24) | ('T' << 16) | ('R' << 8) | '\0')
#define SYS_EVENT_FROM_RECORD (('R' << 24) | ('E' << 16) | ('C' << 8) | '\0')
#define DEVICE_EVENT_FROM_ENDLESS_LOOP_DEBUG (('E' << 24) | ('L' << 16) | ('D' << 8) | '\0')
#define DEVICE_EVENT_FROM_EARTCH (('E' << 24) | ('T' << 16) | ('H' << 8) | '\0')
#define DEVICE_EVENT_ONLINE_DATA (('O' << 24) | ('L' << 16) | ('D' << 8) | '\0')
#define SYS_BT_EVENT_FROM_KEY (('K' << 24) | ('E' << 16) | ('Y' << 8) | '\0')
#define SYS_BT_EVENT_FORM_SELF (('S' << 24) | ('E' << 16) | ('F' << 8) | '\0')
#define DEVICE_EVENT_FROM_ANC (('A' << 24) | ('N' << 16) | ('C' << 8) | '\0')
enum {
KEY_EVENT_CLICK,
KEY_EVENT_LONG,
KEY_EVENT_HOLD,
KEY_EVENT_UP,
KEY_EVENT_DOUBLE_CLICK,
KEY_EVENT_TRIPLE_CLICK,
KEY_EVENT_FOURTH_CLICK,
KEY_EVENT_FIRTH_CLICK,
KEY_EVENT_USER,
KEY_EVENT_MAX,
};
enum {
DEVICE_EVENT_IN,
DEVICE_EVENT_OUT,
DEVICE_EVENT_ONLINE,
DEVICE_EVENT_OFFLINE,
DEVICE_EVENT_CHANGE,
};
enum {
TOUCH_EVENT_DOWN,
TOUCH_EVENT_MOVE,
TOUCH_EVENT_HOLD,
TOUCH_EVENT_UP,
TOUCH_EVENT_CLICK,
TOUCH_EVENT_DOUBLE_CLICK,
};
enum {
NET_EVENT_CMD,
NET_EVENT_DATA,
NET_EVENT_CONNECTED,
NET_EVENT_DISCONNECTED,
NET_EVENT_SMP_CFG_TIMEOUT,
};
struct key_event {
u8 init;
u8 type;
u16 event;
u32 value;
u32 tmr;
};
struct ir_event {
u8 event;
};
struct msg_event {
u8 event;
u8 value;
};
#if EVENT_TOUCH_ENABLE_CONFIG
struct touch_event {
u8 event;
struct position pos;
};
#endif
struct device_event {
u8 event;
int value;
};
struct chargestore_event {
u8 event;
u8 *packet ;
u8 size;
};
struct ancbox_event {
u8 event;
u32 value;
};
struct net_event {
u8 event;
u8 value;
};
struct bt_event {
u8 event;
u8 args[7];
u32 value;
};
struct axis_event {
u8 event;
s16 x;
s16 y;
};
struct codesw_event {
u8 event;
s8 value;
};
struct pbg_event {
u8 event;
u8 args[3];
};
struct uart_event {
void *ut_bus;
};
struct uart_cmd_event {
u8 type;
u8 cmd;
};
struct ai_event {
u32 value;
};
struct ear_event {
u8 value;
};
struct rcsp_event {
u8 event;
u8 args[6];
u8 size;
};
struct chargebox_event {
u8 event;
};
struct matrix_key_event {
u16 args[6]; //最多推6个按键出来，如果需要推多个按键需要自行修改，每个u16 低八位标识row 高八位标识col
u8 *map;
};
struct touchpad_event {
u8 gesture_event; //手势事件
s8 x;
s8 y;
};
struct sys_event {
u16 type;
u8 consumed;
void *arg;
union {
struct key_event key;
struct axis_event axis;
struct codesw_event codesw;
#if EVENT_TOUCH_ENABLE_CONFIG
struct touch_event touch;
#endif
struct device_event dev;
struct net_event net;
struct bt_event bt;
struct msg_event msg;
struct chargestore_event chargestore;
struct ir_event ir;
struct pbg_event pbg;
struct uart_event uart;
struct uart_cmd_event uart_cmd;
struct ai_event ai;
struct ear_event ear;
struct rcsp_event rcsp;
struct chargebox_event chargebox;
struct ancbox_event ancbox;
struct matrix_key_event matrix_key;
struct touchpad_event touchpad;
} u;
};
struct static_event_handler {
int event_type;
void (*handler)(struct sys_event *);
};
#define SYS_EVENT_HANDLER(type, fn, pri) \
const struct static_event_handler __event_handler_##fn sec(.sys_event.pri.handler) = { \
.event_type = type, \
.handler = fn, \
}
extern struct static_event_handler sys_event_handler_begin[];
extern struct static_event_handler sys_event_handler_end[];
#define list_for_each_static_event_handler(p) \
for (p = sys_event_handler_begin; p < sys_event_handler_end; p++)
u16 register_sys_event_handler(int event_type, u8 priority, void *priv,
void (*handler)(struct sys_event *, void *));
void unregister_sys_event_handler(u16 id);
/*
* 事件通知函数,系统有事件发生时调用此函数
*/
void sys_event_notify(struct sys_event *e);
void sys_event_clear(struct sys_event *e);
void sys_key_event_disable();
void sys_key_event_enable();
void sys_key_event_filter_disable();
void sys_key_event_filter_enable();
void sys_touch_event_disable();
void sys_touch_event_enable();
/*
*下面四个为系统事件消耗函数，调用此函数后则对应的事件不在分发给其它任务
*
*/
void sys_event_consume(struct sys_event *e);
void sys_key_event_consume(struct key_event *e);
#if EVENT_TOUCH_ENABLE_CONFIG
void sys_touch_event_consume(struct touch_event *e);
#endif
void sys_device_event_consume(struct device_event *e);
/*
* 下面两个函数为按键和触摸事件接管函数，调用此函数后则对应的事件只发到当前任务
*
* on=true: 开始接管， on=false: 取消接管
*
* once: on = false 时有效，当前这次不接管, 事件可以继续发送到其它任务
*
*/
void sys_key_event_takeover(bool on, bool once);
void sys_touch_event_takeover(bool on, bool once);
int sys_key_event_map(struct key_event *org, struct key_event *new);
int sys_key_event_unmap(struct key_event *org, struct key_event *new);
#endif
loader/update_ui/include_lib/system/fs/fs.h
+19
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@@ -0,0 +1,19 @@
#ifndef __FS_H__
#define __FS_H__
typedef struct {
void *private_data;
} FILE;
#endif /* VFS_ENABLE */
loader/update_ui/include_lib/system/generic/ascii.h
+44
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@@ -0,0 +1,44 @@
#ifndef ASCII_LIB_H
#define ASCII_LIB_H
#ifdef __cplusplus
extern "C" {
#endif
#include "typedef.h"
void ASCII_ToLower(void *buf, u32 len);
void ASCII_ToUpper(void *buf, u32 len);
u32 ASCII_StrCmp(const char *src, const char *dst, u32 len);
int ASCII_StrCmpNoCase(const char *src, const char *dst, int len);
void ASCII_IntToStr(void *pStr, u32 intNum, u32 strLen, u32 bufLen);
u32 ASCII_StrToInt(const void *pStr, u32 *pRint, u32 strLen);
u32 ASCII_StrLen(void *str, u32 len);
u32 ASCII_WStrLen(void *str, u32 len);
#ifdef __cplusplus
}
#endif
#endif
loader/update_ui/include_lib/system/generic/atomic.h
+81
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@@ -0,0 +1,81 @@
#ifndef ATOMIC_H
#define ATOMIC_H
#include "cpu.h"
#include "irq.h"
typedef struct {
int counter;
} atomic_t;
static inline int atomic_add_return(int i, atomic_t *v)
{
int val;
CPU_SR_ALLOC();
CPU_CRITICAL_ENTER();
val = v->counter;
v->counter = val += i;
CPU_CRITICAL_EXIT();
return val;
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
int val;
CPU_SR_ALLOC();
CPU_CRITICAL_ENTER();
val = v->counter;
v->counter = val -= i;
CPU_CRITICAL_EXIT();
return val;
}
static inline int atomic_set(atomic_t *v, int i)
{
int val = 0;
CPU_SR_ALLOC();
CPU_CRITICAL_ENTER();
v->counter = i;
CPU_CRITICAL_EXIT();
return val;
}
#define DEFINE_ATOMIC(x) \
atomic_t x = {.counter = 0}
#define atomic_add(i, v) atomic_add_return(i, v)
#define atomic_sub(i, v) atomic_sub_return(i, v)
#define atomic_read(v) arch_atomic_read(v)
/*#define atomic_set(v,i) (((v)->counter) = (i))*/
#define atomic_inc(v) atomic_add(1, v)
#define atomic_dec(v) atomic_sub(1, v)
#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
#define atomic_inc_return(v) (atomic_add_return(1, v))
#define atomic_dec_return(v) (atomic_sub_return(1, v))
#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
#endif
loader/update_ui/include_lib/system/generic/circular_buf.h
+65
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@@ -0,0 +1,65 @@
#ifndef CIRCULAR_BUF_INTERFACE_H
#define CIRCULAR_BUF_INTERFACE_H
#include "typedef.h"
//#include "system/spinlock.h"
typedef struct _cbuffer {
u8 *begin;
u8 *end;
u8 *read_ptr;
u8 *write_ptr;
u8 *tmp_ptr ;
u32 tmp_len;
u32 data_len;
u32 total_len;
//spinlock_t lock;
} cbuffer_t;
extern void cbuf_init(cbuffer_t *cbuffer, void *buf, u32 size);
extern u32 cbuf_read(cbuffer_t *cbuffer, void *buf, u32 len);
extern u32 cbuf_write(cbuffer_t *cbuffer, void *buf, u32 len);
extern u32 cbuf_is_write_able(cbuffer_t *cbuffer, u32 len);
extern void *cbuf_write_alloc(cbuffer_t *cbuffer, u32 *len);
extern void cbuf_write_updata(cbuffer_t *cbuffer, u32 len);
extern void *cbuf_read_alloc(cbuffer_t *cbuffer, u32 *len);
extern void cbuf_read_updata(cbuffer_t *cbuffer, u32 len);
extern void cbuf_clear(cbuffer_t *cbuffer);
extern u32 cbuf_rewrite(cbuffer_t *cbuffer, void *begin, void *buf, u32 len);
extern void cbuf_discard_prewrite(cbuffer_t *cbuffer);
extern void cbuf_updata_prewrite(cbuffer_t *cbuffer);
extern u32 cbuf_prewrite(cbuffer_t *cbuffer, void *buf, u32 len);
extern void *cbuf_get_writeptr(cbuffer_t *cbuffer);
extern u32 cbuf_get_data_size(cbuffer_t *cbuffer);
extern void *cbuf_get_readptr(cbuffer_t *cbuffer);
extern u32 cbuf_read_goback(cbuffer_t *cbuffer, u32 len);
extern u32 cbuf_get_data_len(cbuffer_t *cbuffer);
extern u32 cbuf_read_alloc_len(cbuffer_t *cbuffer, void *buf, u32 len);
extern void cbuf_read_alloc_len_updata(cbuffer_t *cbuffer, u32 len);
#endif
loader/update_ui/include_lib/system/generic/cpu.h
+22
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@@ -0,0 +1,22 @@
#ifndef GENERIC_CPU_H
#define GENERIC_CPU_H
#include <asm/cpu.h>
#endif
loader/update_ui/include_lib/system/generic/debug_lite.h
+10
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@@ -0,0 +1,10 @@
#ifndef _LITE_DEBUG_H_
#define _LITE_DEBUG_H_
extern void puts_lite(const char *out);
extern void put_buf_lite(void *_buf, u32 len);
extern int printf_lite(const char *format, ...);
#endif /* #ifdef _LITE_DEBUG_H_ */
loader/update_ui/include_lib/system/generic/errno-base.h
+40
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@@ -0,0 +1,40 @@
#ifndef _ASM_GENERIC_ERRNO_BASE_H
#define _ASM_GENERIC_ERRNO_BASE_H
#define EPERM 1 /* Operation not permitted */
#define ENOENT 2 /* No such file or directory */
#define ESRCH 3 /* No such process */
#define EINTR 4 /* Interrupted system call */
#define EIO 5 /* I/O error */
#define ENXIO 6 /* No such device or address */
#define E2BIG 7 /* Argument list too long */
#define ENOEXEC 8 /* Exec format error */
#define EBADF 9 /* Bad file number */
#define ECHILD 10 /* No child processes */
#define EAGAIN 11 /* Try again */
#define ENOMEM 12 /* Out of memory */
#define EACCES 13 /* Permission denied */
#define EFAULT 14 /* Bad address */
#define ENOTBLK 15 /* Block device required */
#define EBUSY 16 /* Device or resource busy */
#define EEXIST 17 /* File exists */
#define EXDEV 18 /* Cross-device link */
#define ENODEV 19 /* No such device */
#define ENOTDIR 20 /* Not a directory */
#define EISDIR 21 /* Is a directory */
#define EINVAL 22 /* Invalid argument */
#define ENFILE 23 /* File table overflow */
#define EMFILE 24 /* Too many open files */
#define ENOTTY 25 /* Not a typewriter */
#define ETXTBSY 26 /* Text file busy */
#define EFBIG 27 /* File too large */
#define ENOSPC 28 /* No space left on device */
#define ESPIPE 29 /* Illegal seek */
#define EROFS 30 /* Read-only file system */
#define EMLINK 31 /* Too many links */
#define EPIPE 32 /* Broken pipe */
#define EDOM 33 /* Math argument out of domain of func */
#define ERANGE 34 /* Math result not representable */
#define ETIMEDOUT 35 /* Connection timed out */
#endif

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