huxi
204 lines
6.0 KiB
C
204 lines
6.0 KiB
C
#ifndef __CLOCK_H__
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#define __CLOCK_H__
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#include "asm/clock_hal.h"
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#include "gpcnt_trim.h"
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#define KHz_UNIT (1000L)
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#define MHz (1000000L)
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enum pll_ref_source : u8 {
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PLL_REF_XOSC, //外部晶振，单端模式
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PLL_REF_XOSC_DIFF, //外部晶振，差分模式
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PLL_REF_LRC,
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PLL_REF_HRC,
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PLL_REF_RTC_OSC,
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PLL_REF_XCLK,
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PLL_REF_STD24M,
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};
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extern const int clock_sys_src_use_lrc_hw;
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///VAD时钟源
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#define VAD_CLOCK_USE_CLOSE 0 //VAD关闭
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#define VAD_CLOCK_USE_BTOSC 1 //DVAD、ANALOG使用BTOSC
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#define VAD_CLOCK_USE_RC_AND_BTOSC 2 //DVAD使用RC、BTOSC直连ANALOG
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#define VAD_CLOCK_USE_PMU_STD12M 3 //DVAD使用BTOSC通过PMU配置的STD12M
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#define VAD_CLOCK_USE_LRC 4 //DVAD使用LRC
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//ANC时钟源
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#define ANC_CLOCK_USE_CLOSE 0 //ANC关闭，无需保持相关时钟
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#define ANC_CLOCK_USE_BTOSC 1 //ANC使用BTOSCX2时钟
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#define ANC_CLOCK_USE_PLL 2 //ANC使用PLL时钟
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#define SYS_24M (24 * MHz)
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#define SYS_48M (48 * MHz)
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#define SYS_60M (60 * MHz)
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#define SYS_64M (64 * MHz)
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#define SYS_96M (96 * MHz)
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#define SYS_128M (128 * MHz)
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#define SYS_160M (160 * MHz)
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#define SPI0_MAX_CLK (12 * MHz)
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void clock_dump(void);
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void clock_core_voltage_dump();
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//返回芯片支持的最高时钟频率
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u32 clk_get_max_frequency();
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int clk_early_init(enum pll_ref_source pll_ref, u32 ref_frequency, u32 pll_frequency);
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/**
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* @brief clk_set 设置对应name时钟节点的时钟频率，实际频率会大于等于配置频率
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*
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* @param name
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* @param frequency 单位为Hz
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*
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* @return 小于0，标识对应时钟节点频率设置失败,整数为实际频率,
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*/
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int clk_set_api(const char *name, u32 frequency);
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/**
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* @brief clk_get 获取对应name的时钟节点时钟频率
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*
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* @param name
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*
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* @return 返回频率，单位为Hz
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*/
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u32 clk_get(const char *name);
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/**
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* @brief clock_set_sfc_max_freq
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* 使用前需要保证所使用的flash支持4bit 100Mhz 模式
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*
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* @param dual_max_freq for cmd 3BH BBH
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* @param quad_max_freq for cmd 6BH EBH
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*/
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void clk_set_sfc_max_freq(u32 dual_max_freq, u32 quad_max_freq);
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enum clk_mode {
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CLOCK_MODE_ADAPTIVE = 0,
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CLOCK_MODE_USR,
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};
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/* ***************************************************************************/
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/**
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* \Brief : 频率电压适配模式接口，支持动态配置频率电压为自适应或用户设置
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*
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* \Param : mode : CLOCK_MODE_ADAPTIVE 频率电压自适应使能 / CLOCK_MODE_USR 频率电压用户控制
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* \Param : sys_dvdd: 用户设置值
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*/
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/* *****************************************************************************/
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void clk_voltage_init(u8 mode, u8 sys_dvdd);
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void clk_voltage_mode(u8 mode, u8 sys_dvdd);
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/**
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* @brief clk_set_lowest_voltage 设置dvdd工作的最低 工作电压
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*
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* @param dvdd_lev mic 工作时候 建议 SYSVDD_VOL_SEL_105V，关闭的时候设置为 SYSVDD_VOL_SEL_084V
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*/
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void clk_set_lowest_voltage(u32 dvdd_lev);
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/*
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* system enter critical and exit critical handle
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* */
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struct clock_critical_handler {
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void (*enter)();
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void (*exit)();
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};
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#define CLOCK_CRITICAL_HANDLE_REG(name, enter, exit) \
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const struct clock_critical_handler clock_##name \
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SEC_USED(.clock_critical_txt) = {enter, exit};
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extern struct clock_critical_handler clock_critical_handler_begin[];
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extern struct clock_critical_handler clock_critical_handler_end[];
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#define list_for_each_loop_clock_critical(h) \
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for (h=clock_critical_handler_begin; h<clock_critical_handler_end; h++)
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#ifdef CLK_TREE_MODE
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extern struct clock_critical_handler hsb_critical_handler_begin[];
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extern struct clock_critical_handler hsb_critical_handler_end[];
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#define HSB_CRITICAL_HANDLE_REG(name, enter, exit) \
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const struct clock_critical_handler hsb_##name \
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SEC_USED(.hsb_critical_txt) = {enter, exit};
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extern struct clock_critical_handler hsb_critical_handler_begin[];
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extern struct clock_critical_handler hsb_critical_handler_end[];
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#define list_for_each_loop_hsb_critical(h) \
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for (h=hsb_critical_handler_begin; h<hsb_critical_handler_end; h++)
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#define LSB_CRITICAL_HANDLE_REG(name, enter, exit) \
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const struct clock_critical_handler lsb_##name \
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SEC_USED(.lsb_critical_txt) = {enter, exit};
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extern struct clock_critical_handler lsb_critical_handler_begin[];
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extern struct clock_critical_handler lsb_critical_handler_end[];
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#define list_for_each_loop_lsb_critical(h) \
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for (h=lsb_critical_handler_begin; h<lsb_critical_handler_end; h++)
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#else
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#define HSB_CRITICAL_HANDLE_REG CLOCK_CRITICAL_HANDLE_REG
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#define list_for_each_loop_hsb_critical list_for_each_loop_clock_critical
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#define LSB_CRITICAL_HANDLE_REG CLOCK_CRITICAL_HANDLE_REG
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#define list_for_each_loop_lsb_critical list_for_each_loop_clock_critical
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#endif
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// 阻塞式延时
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void delay_nops(u32 nops);
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//delay function does not guarantee accuracy. The application may sleep longer than msecs under heavy load conditions.
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void udelay(u32 us);
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void mdelay(u32 ms);
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/**
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* @brief 不需要输出时钟时需调clk_out_close关闭,否则一直占用och
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* @param gpio:参见枚举,固定io带入固定io; 有chx的可以选择任意io; 都有选择任意io
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* @param clk_src:详见枚举,备注多通道的可同时输出多路clk
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* @param div:详见枚举各通道div注释
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* return: 0:error(通道被占用,无法输出)
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*/
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int clk_out(u32 gpio, enum CLK_OUT_SOURCE clk_src, u32 div);
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/**
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* @brief clk_out_close将关闭所有正在输出的clk_src时钟
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* @param gpio:不检查gpio,当clk_src正确直接配置高祖
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* @param clk_src:详见枚举,关闭该时钟输出
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*return: 0:error(时钟未曾输出)*/
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int clk_out_close(u32 gpio, enum CLK_OUT_SOURCE clk_src);
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/**
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* @brief 设置电压频率电压表最大挡位
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*/
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void clock_voltage_rising_step_max();
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/**
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* @brief 设置电压频率电压表最小挡位
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*/
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void clock_voltage_falling_step_min();
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void update_vdd_table(u8 val);
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#endif /*CLOCK_H*/
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