huxi
125 lines
3.4 KiB
C
125 lines
3.4 KiB
C
#ifndef __CLOCK_HAL_H__
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#define __CLOCK_HAL_H__
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#include "typedef.h"
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enum CLK_OUT_SOURCE0 {
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CLK_OUT_SRC0_NULL = 0,
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CLK_OUT_SRC0_LRC_CLK,
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CLK_OUT_SRC0_STD_12M,
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CLK_OUT_SRC0_STD_24M,
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CLK_OUT_SRC0_STD_48M,
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CLK_OUT_SRC0_BTOSC_24M,
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CLK_OUT_SRC0_BTOSC_48M,
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CLK_OUT_SRC0_HSB_CLK,
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CLK_OUT_SRC0_LSB_CLK,
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CLK_OUT_SRC0_PLL_96M,
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CLK_OUT_SRC0_RC_250K,
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CLK_OUT_SRC0_RC_16M,
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CLK_OUT_SRC0_LRC_24M,
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CLK_OUT_SRC0_ALNK0_CLK,
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CLK_OUT_SRC0_RF_CKO_CLK,
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CLK_OUT_SRC0_USB_CLK,
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};
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enum CLK_OUT_SOURCE1 {
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CLK_OUT_SRC2_NULL = 0,
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CLK_OUT_SRC2_SYS_PLL_D3P5 = 4,
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CLK_OUT_SRC2_SYS_PLL_D2P5,
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CLK_OUT_SRC2_SYS_PLL_D2P0,
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CLK_OUT_SRC2_SYS_PLL_D1P5,
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CLK_OUT_SRC2_SYS_PLL_D1P0,
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};
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void clk_out0(u8 gpio, enum CLK_OUT_SOURCE0 clk);
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void clk_out2(u8 gpio, enum CLK_OUT_SOURCE1 clk, u8 div);
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//无 clk_out1
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void clk_out0_close(u8 gpio);
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void clk_out2_close(u8 gpio);
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enum CLK_OUT_SOURCE {
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//ch0,ch1. no div
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CLK_OUT_NULL = 0x0100,
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CLK_OUT_LRC_CLK,
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CLK_OUT_STD_12M,
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CLK_OUT_STD_24M,
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CLK_OUT_STD_48M,
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CLK_OUT_BTOSC_24M,
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CLK_OUT_BTOSC_48M,
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CLK_OUT_HSB_CLK,
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CLK_OUT_LSB_CLK,
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CLK_OUT_PLL_96M,
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CLK_OUT_RC_250K,
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CLK_OUT_RC_16M,
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CLK_OUT_LRC_24M,
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CLK_OUT_ALNK0_CLK,
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CLK_OUT_RF_CKO_CLK,
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CLK_OUT_USB_CLK,
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//ch2. div:0~63(div1~div64)
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CLK_OUT_NULL_DIV = 0x0400,
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CLK_OUT_SYS_PLL_D3P5_DIV = 0x0404,
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CLK_OUT_SYS_PLL_D2P5_DIV,
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CLK_OUT_SYS_PLL_D2P0_DIV,
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CLK_OUT_SYS_PLL_D1P5_DIV,
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CLK_OUT_SYS_PLL_D1P0_DIV,
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};
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#define CLK_OUT_CH_MASK 0b111
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#define CLK_OUT_CH0_SEL(clk) SFR(JL_LSBCLK->STD_CON1,0,5,clk)
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#define CLK_OUT_CH0_GET_CLK() ((JL_LSBCLK->STD_CON1>>0)&0x01f)
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#define CLK_OUT_CH0_DIV(div) //no div
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#define CLK_OUT_CH0_EN(en) //no en
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#define CLK_OUT0_FIXED_IO_EN(en) //no en
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#define IS_CLK_OUT0_FIXED_IO() (0)//no fix
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#define CLK_OUT_CH1_SEL(clk) SFR(JL_LSBCLK->STD_CON1,5,5,clk)
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#define CLK_OUT_CH1_GET_CLK() ((JL_LSBCLK->STD_CON1>>5)&0x01f)
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#define CLK_OUT_CH1_DIV(div) //no div
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#define CLK_OUT_CH1_EN(en) //no en
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#define CLK_OUT1_FIXED_IO_EN(en) //no en
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#define IS_CLK_OUT1_FIXED_IO() (0)//no fix
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#define CLK_OUT_CH2_SEL(clk) SFR(JL_LSBCLK->STD_CON1,10,4,clk)
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#define CLK_OUT_CH2_GET_CLK() ((JL_LSBCLK->STD_CON1>>10)&0x0f)
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#define CLK_OUT_CH2_DIV(div) SFR(JL_LSBCLK->STD_CON1,14,6,div)
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#define CLK_OUT_CH2_EN(en) //no en
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#define CLK_OUT2_FIXED_IO_EN(en) //no en
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#define IS_CLK_OUT2_FIXED_IO() (0)//no fix
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#define CLK_OUT_CH3_SEL(clk) //no ch3
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#define CLK_OUT_CH3_GET_CLK() (0)//no ch3
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#define CLK_OUT_CH3_DIV(div) //no div
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#define CLK_OUT_CH3_EN(en) //no en
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#define CLK_OUT3_FIXED_IO_EN(en) //no en
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#define IS_CLK_OUT3_FIXED_IO() (0)//no fix
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#define CLK_OUT_CH4_SEL(clk) //no ch4
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#define CLK_OUT_CH4_GET_CLK() (0)//no ch4
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#define CLK_OUT_CH4_DIV(div) //no div
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#define CLK_OUT_CH4_EN(en) //no en
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#define CLK_OUT4_FIXED_IO_EN(en) //no en
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#define IS_CLK_OUT4_FIXED_IO() (0)//no fix
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u32 clk_out_fixed_io_check(u32 gpio);
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//for bt
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void clk_set_osc_cap(u8 sel_l, u8 sel_r);
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u32 clk_get_osc_cap();
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#define BT_CLOCK_IN(x) //SFR(JL_CLOCK->CLK_CON1, 14, 2, x)
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//for MACRO - BT_CLOCK_IN
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enum {
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BT_CLOCK_IN_PLL48M = 0,
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BT_CLOCK_IN_HSB,
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BT_CLOCK_IN_LSB,
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BT_CLOCK_IN_DISABLE,
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};
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#endif /*CLOCK_HAL_H*/
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