huxi
379 lines
8.8 KiB
Plaintext
379 lines
8.8 KiB
Plaintext
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__local_irq_enable = ABSOLUTE(0xffd5c);
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__local_irq_disable = ABSOLUTE(0xffd60);
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request_irq = ABSOLUTE(0xffd64);
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lp_signature_set = ABSOLUTE(0xffd68);
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memcpy = ABSOLUTE(0xffd6c);
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memmove = ABSOLUTE(0xffd70);
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memcmp = ABSOLUTE(0xffd74);
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memset = ABSOLUTE(0xffd78);
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memchr = ABSOLUTE(0xffd7c);
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strcmp = ABSOLUTE(0xffd80);
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strcpy = ABSOLUTE(0xffd84);
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strncpy = ABSOLUTE(0xffd88);
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strlen = ABSOLUTE(0xffd8c);
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strncmp = ABSOLUTE(0xffd90);
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strstr = ABSOLUTE(0xffd94);
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strchr = ABSOLUTE(0xffd98);
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strrchr = ABSOLUTE(0xffd9c);
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strcat = ABSOLUTE(0xffda0);
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__divdi3 = ABSOLUTE(0xffda4);
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__umoddi3 = ABSOLUTE(0xffda8);
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__muldi3 = ABSOLUTE(0xffdac);
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__udivdi3 = ABSOLUTE(0xffdb0);
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__udivmoddi4 = ABSOLUTE(0xffdb4);
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ic_pll_init = ABSOLUTE(0xffdb8);
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sfc_suspend = ABSOLUTE(0xffdbc);
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sfc_resume = ABSOLUTE(0xffdc0);
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sfc_drop_cache = ABSOLUTE(0xffdc4);
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sfc_boot = ABSOLUTE(0xffdc8);
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sfc_entry_continue_mode = ABSOLUTE(0xffdcc);
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ota_jump_mode = ABSOLUTE(0xffdd0);
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DcuInitial = ABSOLUTE(0xffdd4);
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DcuFlushinvAll = ABSOLUTE(0xffdd8);
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DcuWaitIdle = ABSOLUTE(0xffddc);
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IcuInitial = ABSOLUTE(0xffde0);
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IcuFlushinvAll = ABSOLUTE(0xffde4);
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IcuWaitIdle = ABSOLUTE(0xffde8);
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DcuEnable = ABSOLUTE(0xffdec);
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DcuFlushRegion = ABSOLUTE(0xffdf0);
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chip_crc16 = ABSOLUTE(0xffdf4);
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CrcDecode = ABSOLUTE(0xffdf8);
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mask_init = ABSOLUTE(0xffdfc);
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wdt_clear = ABSOLUTE(0xffe00);
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nvram_set_boot_state = ABSOLUTE(0xffe04);
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chip_reset = ABSOLUTE(0xffe08);
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flash_poweron = ABSOLUTE(0xffe0c);
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flash_poweron_base = ABSOLUTE(0xffe10);
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flash_poweroff = ABSOLUTE(0xffe14);
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flash_poweroff_base = ABSOLUTE(0xffe18);
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spi_io_mount = ABSOLUTE(0xffe1c);
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spi_io_unmount = ABSOLUTE(0xffe20);
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get_sfc_read_mode = ABSOLUTE(0xffe24);
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spi_port_io_init = ABSOLUTE(0xffe28);
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spi_port_io_uninit = ABSOLUTE(0xffe2c);
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usb_slave_mode = ABSOLUTE(0xffe30);
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uart_set_dma_dir = ABSOLUTE(0xffe34);
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doe = ABSOLUTE(0xffe38);
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LZ4_setStreamDecode = ABSOLUTE(0xffe3c);
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LZ4_decompress_safe_continue = ABSOLUTE(0xffe40);
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LZ4_decompress_generic = ABSOLUTE(0xffe44);
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LZ4_decompress_safe_usingDict = ABSOLUTE(0xffe48);
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dec_isd_cfg_ini = ABSOLUTE(0xffe4c);
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rom_nand_flash_get_features = ABSOLUTE(0xffe50);
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rom_nand_flash_set_features = ABSOLUTE(0xffe54);
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pmalloc_init = ABSOLUTE(0xfff84);
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pmalloc = ABSOLUTE(0xfff88);
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pfree = ABSOLUTE(0xfff8c);
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pmalloc_get_unused_pages = ABSOLUTE(0xfff90);
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get_physic_address = ABSOLUTE(0xfff94);
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pmalloc_get_hdl = ABSOLUTE(0xfff98);
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vmm_init_ = ABSOLUTE(0xfff9c);
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vmalloc_ = ABSOLUTE(0xfffa0);
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vfree_ = ABSOLUTE(0xfffa4);
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vmem_get_phy_adr = ABSOLUTE(0xfffa8);
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vmem_start = ABSOLUTE(0xfffac);
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vmem_end = ABSOLUTE(0xfffb0);
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vmalloc_get_hdl = ABSOLUTE(0xfffb4);
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vmalloc_v2 = ABSOLUTE(0xfffb8);
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vfree_v2 = ABSOLUTE(0xfffbc);
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vcopy_ = ABSOLUTE(0xfffc0);
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lock_vir_mem = ABSOLUTE(0xfffc4);
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unlock_vir_mem = ABSOLUTE(0xfffc8);
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hw_mmu_disable = ABSOLUTE(0xfffcc);
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get_sbc_frame_info = ABSOLUTE(0xfffd0);
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get_sbc_dec_ops = ABSOLUTE(0xfffd4);
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sbc_dec_loop_u = ABSOLUTE(0xfffd8);
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sbc_unpack_frame_u = ABSOLUTE(0xfffdc);
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sbc_synthesize_audio_u = ABSOLUTE(0xfffe0);
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sbc_oput_deal_normal = ABSOLUTE(0xfffe4);
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sbc_oput_deal_To_ch2 = ABSOLUTE(0xfffe8);
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sbc_bit_offset4 = ABSOLUTE(0xf88c0);
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sbc_bit_offset8 = ABSOLUTE(0xf8900);
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sbc_proto4_m0 = ABSOLUTE(0xf8980);
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sbc_proto4_m1 = ABSOLUTE(0xf89d0);
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sbc_proto8_m0 = ABSOLUTE(0xf8a20);
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sbc_proto8_m1 = ABSOLUTE(0xf8ac0);
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syn_matrix4 = ABSOLUTE(0xf8b60);
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syn_matrix8 = ABSOLUTE(0xf8be0);
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crc8_table = ABSOLUTE(0xf87c0);
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sbc_div_new_table = ABSOLUTE(0xf8de0);
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need_fix_iir_filter_buf = ABSOLUTE(0xfffec);
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fix_iir_filter_init = ABSOLUTE(0xffff0);
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fix_iir_filter_update = ABSOLUTE(0xffff4);
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fix_iir_filter_run = ABSOLUTE(0xffff8);
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fix_iir_filter_clear_mem = ABSOLUTE(0xffffc);
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_SFC_MEMORY_START_ADDR = ABSOLUTE(0xc000000);
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_IRQ_MEM_ADDR = ABSOLUTE(0x100000);
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_RAM_LIMIT_L = ABSOLUTE(0x100000);
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_RAM_LIMIT_H = ABSOLUTE(0x137000);
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_MASK_USED_MEM_END = ABSOLUTE(0x101310);
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_MASK_EXPORT_MEM_BEGIN = ABSOLUTE(0x100200);
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_MASK_EXPORT_MEM_SIZE = ABSOLUTE(0x34c);
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_UBOOT_LOADER_RAM_START = ABSOLUTE(0x102600);
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_UBOOT_LOADER_RAM_END = ABSOLUTE(0x137000);
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_UBOOT_LOADER_RAM_SIZE = ABSOLUTE(0x34a00);
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g_boot_soft_flag = ABSOLUTE(0x100204);
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irq_lock_cnt = ABSOLUTE(0x1002b8);
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efuse_page0 = ABSOLUTE(0x1002ac);
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efuse_page1 = ABSOLUTE(0x1002b0);
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efuse_page2 = ABSOLUTE(0x1002b4);
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nvram_list = ABSOLUTE(0x100214);
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exception_irq_handler = ABSOLUTE(0xf8004);
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EXTERN(
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_start
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source_node_adapter
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mixer_node_adapter
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dac_node_adapter
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classd_node_adapter
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clk_sync_node_adapter
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decoder_node_adapter
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resample_node_adapter
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bt_audio_sync_node_adapter
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adc_file_plug
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tone_file_plug
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ring_file_plug
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key_tone_file_plug
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sbc_decoder_plug
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msbc_decoder_plug
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sine_dec_plug
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cvsd_decoder_plug
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pcm_dec_plug
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zero_file_plug
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msbc_encoder_soft_plug
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cvsd_encoder_plug
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music_file_plug
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wdrc_node_adapter
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g729_dec_plug
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fat_vfs_ops
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fat_sdfile_fat_ops
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fat_sdfile_fat_ops
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sdfile_resfile_ops
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sdfile_vfs_ops
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ex_sdfile_vfs_ops
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wav_package
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sof_eq_node_adapter
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);
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UPDATE_SIZE = 0x80;
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UPDATE_BEG = 0x10c800;
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EX_CODE_BEGIN = 0x10054c;
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EX_CODE_SIZE = 0xa000;
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EX_CODE_END = EX_CODE_BEGIN + EX_CODE_SIZE;
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EX_RAM_BEGIN = EX_CODE_BEGIN + EX_CODE_SIZE;
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EX_RAM_SIZE = UPDATE_BEG - EX_RAM_BEGIN;
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RAM_LIMIT_L = _UBOOT_LOADER_RAM_START;
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RAM_LIMIT_H = _UBOOT_LOADER_RAM_START + 0x8000;
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PHY_RAM_SIZE = 0x8000;
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ISR_BASE = _IRQ_MEM_ADDR;
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ROM_RAM_SIZE = _MASK_EXPORT_MEM_SIZE;
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ROM_RAM_BEG = _MASK_EXPORT_MEM_BEGIN;
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RAM0_BEG = RAM_LIMIT_L;
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RAM0_END = RAM_LIMIT_H;
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RAM0_SIZE = RAM0_END - RAM0_BEG;
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RAM1_BEG = RAM_LIMIT_L;
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RAM1_END = RAM0_BEG;
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RAM1_SIZE = RAM1_END - RAM1_BEG;
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PSRAM_BEGIN = 0x8000000;
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PSRAM_SIZE = 0x0;
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PSRAM_END = PSRAM_BEGIN + PSRAM_SIZE;
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FREE_DACHE_WAY = 2;
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FREE_IACHE_WAY = 0;
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DCACHE_RAM_SIZE = FREE_DACHE_WAY*8K;
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ICACHE_RAM_SIZE = FREE_IACHE_WAY*8K;
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MEMORY
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{
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code0(rx) : ORIGIN = EX_CODE_BEGIN, LENGTH = EX_CODE_SIZE
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ram0(rwx) : ORIGIN = EX_RAM_BEGIN, LENGTH = EX_RAM_SIZE
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psram(rwx) : ORIGIN = PSRAM_BEGIN, LENGTH = PSRAM_SIZE
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dcache_ram(rw) : ORIGIN = 0x370000+((4-FREE_DACHE_WAY)*8K), LENGTH = DCACHE_RAM_SIZE
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icache_ram(rw) : ORIGIN = 0x3C0000+((4-FREE_IACHE_WAY)*8K), LENGTH = ICACHE_RAM_SIZE
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}
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SECTIONS
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{
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. = ORIGIN(code0);
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.text ALIGN(4):
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{
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. = ALIGN(4);
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API_TAB_BEGIN = .;
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KEEP(*(.api_tab))
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API_TAB_END = .;
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. = ALIGN(4);
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lcd_interface_begin = .;
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KEEP(*(.lcd_if_info))
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lcd_interface_end = .;
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. = ALIGN(4);
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lcd_device_begin = .;
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KEEP(*(.lcd_device_info))
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lcd_device_end = .;
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. = ALIGN(4);
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clock_critical_handler_begin = .;
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KEEP(*(.clock_critical_txt))
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clock_critical_handler_end = .;
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. = ALIGN(4);
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KEEP(*(.text*))
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. = ALIGN(4);
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KEEP(*(.rodata*))
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. = ALIGN(4);
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KEEP(*(.data))
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. = ALIGN(4);
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_bss_begin = . ;
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KEEP(*(.bss))
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_bss_end = . ;
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. = ALIGN(4);
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_HEAP_BEGIN = . ;
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_HEAP_END = EX_CODE_END;
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} > code0
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. = ORIGIN(ram0);
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.mmu_tlb ALIGN(0x1000):
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{
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*(.mmu_tlb_segment);
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} > ram0
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.data ALIGN(32):
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{
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. = ALIGN(4);
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*(.data_magic)
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. = ALIGN(4);
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} > ram0
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.data_code ALIGN(32):
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{
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data_code_pc_limit_begin = .;
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*(.flushinv_icache)
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*(.cache)
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*(.os_critical_code)
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*(.fat_data_code)
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*(.fat_data_code_ex)
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*(.ui_ram)
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*(.math_fast_funtion_code)
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. = ALIGN(4);
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_SPI_CODE_START = . ;
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*(.spi_code)
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. = ALIGN(4);
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_SPI_CODE_END = . ;
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. = ALIGN(4);
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} > ram0
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.moveable_slot ALIGN(4):
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{
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*(movable.slot.*)
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} >ram0
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__report_overlay_begin = .;
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data_code_pc_limit_end = .;
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__report_overlay_end = .;
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}
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text_begin = ADDR(.text);
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text_size = SIZEOF(.text);
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text_end = text_begin + text_size;
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/*PROVIDE(bss_begin = _bss_begin);*/
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/*PROVIDE(bss_end = _bss_end);*/
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_bss_size = _bss_end - _bss_begin;
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/*PROVIDE(bss_size = _bss_end - _bss_begin);*/
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data_addr = ADDR(.data);
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data_begin = text_begin + text_size;
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data_size = SIZEOF(.data);
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moveable_slot_addr = ADDR(.moveable_slot);
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moveable_slot_begin = data_begin + data_size;
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moveable_slot_size = SIZEOF(.moveable_slot);
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data_code_addr = ADDR(.data_code);
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data_code_begin = moveable_slot_begin + moveable_slot_size;
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data_code_size = SIZEOF(.data_code);
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PROVIDE(HEAP_BEGIN = _HEAP_BEGIN);
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PROVIDE(HEAP_END = _HEAP_END);
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_MALLOC_SIZE = _HEAP_END - _HEAP_BEGIN;
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PROVIDE(MALLOC_SIZE = _HEAP_END - _HEAP_BEGIN);
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ASSERT(MALLOC_SIZE >= 0x8000, "heap space too small !")
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